Lines Matching refs:args
315 union drm_amdgpu_gem_create *args = data; in amdgpu_gem_create_ioctl() local
316 uint64_t flags = args->in.domain_flags; in amdgpu_gem_create_ioctl()
317 uint64_t size = args->in.bo_size; in amdgpu_gem_create_ioctl()
324 if (args->in.domains & AMDGPU_GEM_DOMAIN_DOORBELL) in amdgpu_gem_create_ioctl()
340 if (args->in.domains & ~AMDGPU_GEM_DOMAIN_MASK) in amdgpu_gem_create_ioctl()
352 if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS | in amdgpu_gem_create_ioctl()
372 initial_domain = (u32)(0xffffffff & args->in.domains); in amdgpu_gem_create_ioctl()
374 r = amdgpu_gem_object_create(adev, size, args->in.alignment, in amdgpu_gem_create_ioctl()
388 size, initial_domain, args->in.alignment, r); in amdgpu_gem_create_ioctl()
408 memset(args, 0, sizeof(*args)); in amdgpu_gem_create_ioctl()
409 args->out.handle = handle; in amdgpu_gem_create_ioctl()
418 struct drm_amdgpu_gem_userptr *args = data; in amdgpu_gem_userptr_ioctl() local
426 args->addr = untagged_addr(args->addr); in amdgpu_gem_userptr_ioctl()
428 if (offset_in_page(args->addr | args->size)) in amdgpu_gem_userptr_ioctl()
432 if (args->flags & ~(AMDGPU_GEM_USERPTR_READONLY | in amdgpu_gem_userptr_ioctl()
437 if (!(args->flags & AMDGPU_GEM_USERPTR_READONLY) && in amdgpu_gem_userptr_ioctl()
438 !(args->flags & AMDGPU_GEM_USERPTR_REGISTER)) { in amdgpu_gem_userptr_ioctl()
445 r = amdgpu_gem_object_create(adev, args->size, 0, AMDGPU_GEM_DOMAIN_CPU, in amdgpu_gem_userptr_ioctl()
453 r = amdgpu_ttm_tt_set_userptr(&bo->tbo, args->addr, args->flags); in amdgpu_gem_userptr_ioctl()
457 r = amdgpu_hmm_register(bo, args->addr); in amdgpu_gem_userptr_ioctl()
461 if (args->flags & AMDGPU_GEM_USERPTR_VALIDATE) { in amdgpu_gem_userptr_ioctl()
482 args->handle = handle; in amdgpu_gem_userptr_ioctl()
485 if (args->flags & AMDGPU_GEM_USERPTR_VALIDATE) in amdgpu_gem_userptr_ioctl()
519 union drm_amdgpu_gem_mmap *args = data; in amdgpu_gem_mmap_ioctl() local
520 uint32_t handle = args->in.handle; in amdgpu_gem_mmap_ioctl()
522 memset(args, 0, sizeof(*args)); in amdgpu_gem_mmap_ioctl()
523 return amdgpu_mode_dumb_mmap(filp, dev, handle, &args->out.addr_ptr); in amdgpu_gem_mmap_ioctl()
557 union drm_amdgpu_gem_wait_idle *args = data; in amdgpu_gem_wait_idle_ioctl() local
560 uint32_t handle = args->in.handle; in amdgpu_gem_wait_idle_ioctl()
561 unsigned long timeout = amdgpu_gem_timeout(args->in.timeout); in amdgpu_gem_wait_idle_ioctl()
578 memset(args, 0, sizeof(*args)); in amdgpu_gem_wait_idle_ioctl()
579 args->out.status = (ret == 0); in amdgpu_gem_wait_idle_ioctl()
590 struct drm_amdgpu_gem_metadata *args = data; in amdgpu_gem_metadata_ioctl() local
595 DRM_DEBUG("%d\n", args->handle); in amdgpu_gem_metadata_ioctl()
596 gobj = drm_gem_object_lookup(filp, args->handle); in amdgpu_gem_metadata_ioctl()
605 if (args->op == AMDGPU_GEM_METADATA_OP_GET_METADATA) { in amdgpu_gem_metadata_ioctl()
606 amdgpu_bo_get_tiling_flags(robj, &args->data.tiling_info); in amdgpu_gem_metadata_ioctl()
607 r = amdgpu_bo_get_metadata(robj, args->data.data, in amdgpu_gem_metadata_ioctl()
608 sizeof(args->data.data), in amdgpu_gem_metadata_ioctl()
609 &args->data.data_size_bytes, in amdgpu_gem_metadata_ioctl()
610 &args->data.flags); in amdgpu_gem_metadata_ioctl()
611 } else if (args->op == AMDGPU_GEM_METADATA_OP_SET_METADATA) { in amdgpu_gem_metadata_ioctl()
612 if (args->data.data_size_bytes > sizeof(args->data.data)) { in amdgpu_gem_metadata_ioctl()
616 r = amdgpu_bo_set_tiling_flags(robj, args->data.tiling_info); in amdgpu_gem_metadata_ioctl()
618 r = amdgpu_bo_set_metadata(robj, args->data.data, in amdgpu_gem_metadata_ioctl()
619 args->data.data_size_bytes, in amdgpu_gem_metadata_ioctl()
620 args->data.flags); in amdgpu_gem_metadata_ioctl()
709 struct drm_amdgpu_gem_va *args = data; in amdgpu_gem_va_ioctl() local
720 if (args->va_address < AMDGPU_VA_RESERVED_BOTTOM) { in amdgpu_gem_va_ioctl()
723 args->va_address, AMDGPU_VA_RESERVED_BOTTOM); in amdgpu_gem_va_ioctl()
727 if (args->va_address >= AMDGPU_GMC_HOLE_START && in amdgpu_gem_va_ioctl()
728 args->va_address < AMDGPU_GMC_HOLE_END) { in amdgpu_gem_va_ioctl()
731 args->va_address, AMDGPU_GMC_HOLE_START, in amdgpu_gem_va_ioctl()
736 args->va_address &= AMDGPU_GMC_HOLE_MASK; in amdgpu_gem_va_ioctl()
740 if (args->va_address + args->map_size > vm_size) { in amdgpu_gem_va_ioctl()
743 args->va_address + args->map_size, vm_size); in amdgpu_gem_va_ioctl()
747 if ((args->flags & ~valid_flags) && (args->flags & ~prt_flags)) { in amdgpu_gem_va_ioctl()
749 args->flags); in amdgpu_gem_va_ioctl()
753 switch (args->operation) { in amdgpu_gem_va_ioctl()
761 args->operation); in amdgpu_gem_va_ioctl()
765 if ((args->operation != AMDGPU_VA_OP_CLEAR) && in amdgpu_gem_va_ioctl()
766 !(args->flags & AMDGPU_VM_PAGE_PRT)) { in amdgpu_gem_va_ioctl()
767 gobj = drm_gem_object_lookup(filp, args->handle); in amdgpu_gem_va_ioctl()
798 } else if (args->operation != AMDGPU_VA_OP_CLEAR) { in amdgpu_gem_va_ioctl()
804 switch (args->operation) { in amdgpu_gem_va_ioctl()
806 va_flags = amdgpu_gem_va_map_flags(adev, args->flags); in amdgpu_gem_va_ioctl()
807 r = amdgpu_vm_bo_map(adev, bo_va, args->va_address, in amdgpu_gem_va_ioctl()
808 args->offset_in_bo, args->map_size, in amdgpu_gem_va_ioctl()
812 r = amdgpu_vm_bo_unmap(adev, bo_va, args->va_address); in amdgpu_gem_va_ioctl()
817 args->va_address, in amdgpu_gem_va_ioctl()
818 args->map_size); in amdgpu_gem_va_ioctl()
821 va_flags = amdgpu_gem_va_map_flags(adev, args->flags); in amdgpu_gem_va_ioctl()
822 r = amdgpu_vm_bo_replace_map(adev, bo_va, args->va_address, in amdgpu_gem_va_ioctl()
823 args->offset_in_bo, args->map_size, in amdgpu_gem_va_ioctl()
829 if (!r && !(args->flags & AMDGPU_VM_DELAY_UPDATE) && !adev->debug_vm) in amdgpu_gem_va_ioctl()
831 args->operation); in amdgpu_gem_va_ioctl()
843 struct drm_amdgpu_gem_op *args = data; in amdgpu_gem_op_ioctl() local
849 gobj = drm_gem_object_lookup(filp, args->handle); in amdgpu_gem_op_ioctl()
859 switch (args->op) { in amdgpu_gem_op_ioctl()
862 void __user *out = u64_to_user_ptr(args->value); in amdgpu_gem_op_ioctl()
875 args->value & AMDGPU_GEM_DOMAIN_VRAM) { in amdgpu_gem_op_ioctl()
894 robj->preferred_domains = args->value & (AMDGPU_GEM_DOMAIN_VRAM | in amdgpu_gem_op_ioctl()
944 struct drm_mode_create_dumb *args) in amdgpu_mode_dumb_create() argument
964 args->pitch = amdgpu_gem_align_pitch(adev, args->width, in amdgpu_mode_dumb_create()
965 DIV_ROUND_UP(args->bpp, 8), 0); in amdgpu_mode_dumb_create()
966 args->size = (u64)args->pitch * args->height; in amdgpu_mode_dumb_create()
967 args->size = ALIGN(args->size, PAGE_SIZE); in amdgpu_mode_dumb_create()
970 r = amdgpu_gem_object_create(adev, args->size, 0, domain, flags, in amdgpu_mode_dumb_create()
981 args->handle = handle; in amdgpu_mode_dumb_create()