• Home
  • Raw
  • Download

Lines Matching +full:mediatek +full:- +full:display

1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015 MediaTek Inc.
7 #include <linux/dma-mapping.h>
11 #include <linux/soc/mediatek/mtk-cmdq.h>
12 #include <linux/soc/mediatek/mtk-mmsys.h>
13 #include <linux/soc/mediatek/mtk-mutex.h>
29 * struct mtk_crtc - MediaTek specific crtc structure.
69 /* lock for display hardware access */
97 struct drm_crtc *crtc = &mtk_crtc->base; in mtk_crtc_finish_page_flip()
100 if (mtk_crtc->event) { in mtk_crtc_finish_page_flip()
101 spin_lock_irqsave(&crtc->dev->event_lock, flags); in mtk_crtc_finish_page_flip()
102 drm_crtc_send_vblank_event(crtc, mtk_crtc->event); in mtk_crtc_finish_page_flip()
104 mtk_crtc->event = NULL; in mtk_crtc_finish_page_flip()
105 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); in mtk_crtc_finish_page_flip()
113 drm_crtc_handle_vblank(&mtk_crtc->base); in mtk_drm_finish_page_flip()
116 if (mtk_crtc->cmdq_client.chan) in mtk_drm_finish_page_flip()
120 spin_lock_irqsave(&mtk_crtc->config_lock, flags); in mtk_drm_finish_page_flip()
121 if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) { in mtk_drm_finish_page_flip()
123 mtk_crtc->pending_needs_vblank = false; in mtk_drm_finish_page_flip()
125 spin_unlock_irqrestore(&mtk_crtc->config_lock, flags); in mtk_drm_finish_page_flip()
133 mtk_mutex_put(mtk_crtc->mutex); in mtk_crtc_destroy()
135 if (mtk_crtc->cmdq_client.chan) { in mtk_crtc_destroy()
136 cmdq_pkt_destroy(&mtk_crtc->cmdq_client, &mtk_crtc->cmdq_handle); in mtk_crtc_destroy()
137 mbox_free_channel(mtk_crtc->cmdq_client.chan); in mtk_crtc_destroy()
138 mtk_crtc->cmdq_client.chan = NULL; in mtk_crtc_destroy()
142 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { in mtk_crtc_destroy()
145 comp = mtk_crtc->ddp_comp[i]; in mtk_crtc_destroy()
156 if (crtc->state) in mtk_crtc_reset()
157 __drm_atomic_helper_crtc_destroy_state(crtc->state); in mtk_crtc_reset()
159 kfree(to_mtk_crtc_state(crtc->state)); in mtk_crtc_reset()
160 crtc->state = NULL; in mtk_crtc_reset()
164 __drm_atomic_helper_crtc_reset(crtc, &state->base); in mtk_crtc_reset()
175 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); in mtk_crtc_duplicate_state()
177 WARN_ON(state->base.crtc != crtc); in mtk_crtc_duplicate_state()
178 state->base.crtc = crtc; in mtk_crtc_duplicate_state()
179 state->pending_config = false; in mtk_crtc_duplicate_state()
181 return &state->base; in mtk_crtc_duplicate_state()
198 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { in mtk_crtc_mode_valid()
199 status = mtk_ddp_comp_mode_valid(mtk_crtc->ddp_comp[i], mode); in mtk_crtc_mode_valid()
216 struct mtk_crtc_state *state = to_mtk_crtc_state(crtc->state); in mtk_crtc_mode_set_nofb()
218 state->pending_width = crtc->mode.hdisplay; in mtk_crtc_mode_set_nofb()
219 state->pending_height = crtc->mode.vdisplay; in mtk_crtc_mode_set_nofb()
220 state->pending_vrefresh = drm_mode_vrefresh(&crtc->mode); in mtk_crtc_mode_set_nofb()
222 state->pending_config = true; in mtk_crtc_mode_set_nofb()
230 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { in mtk_crtc_ddp_clk_enable()
231 ret = mtk_ddp_comp_clk_enable(mtk_crtc->ddp_comp[i]); in mtk_crtc_ddp_clk_enable()
240 while (--i >= 0) in mtk_crtc_ddp_clk_enable()
241 mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]); in mtk_crtc_ddp_clk_enable()
249 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) in mtk_crtc_ddp_clk_disable()
250 mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]); in mtk_crtc_ddp_clk_disable()
261 unsigned int local_index = plane - mtk_crtc->planes; in mtk_ddp_comp_for_plane()
263 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { in mtk_ddp_comp_for_plane()
264 comp = mtk_crtc->ddp_comp[i]; in mtk_ddp_comp_for_plane()
266 *local_layer = local_index - count; in mtk_ddp_comp_for_plane()
272 WARN(1, "Failed to find component for plane %d\n", plane->index); in mtk_ddp_comp_for_plane()
286 if (data->sta < 0) in ddp_cmdq_cb()
289 state = to_mtk_crtc_state(mtk_crtc->base.state); in ddp_cmdq_cb()
291 spin_lock_irqsave(&mtk_crtc->config_lock, flags); in ddp_cmdq_cb()
292 if (mtk_crtc->config_updating) in ddp_cmdq_cb()
295 state->pending_config = false; in ddp_cmdq_cb()
297 if (mtk_crtc->pending_planes) { in ddp_cmdq_cb()
298 for (i = 0; i < mtk_crtc->layer_nr; i++) { in ddp_cmdq_cb()
299 struct drm_plane *plane = &mtk_crtc->planes[i]; in ddp_cmdq_cb()
302 plane_state = to_mtk_plane_state(plane->state); in ddp_cmdq_cb()
304 plane_state->pending.config = false; in ddp_cmdq_cb()
306 mtk_crtc->pending_planes = false; in ddp_cmdq_cb()
309 if (mtk_crtc->pending_async_planes) { in ddp_cmdq_cb()
310 for (i = 0; i < mtk_crtc->layer_nr; i++) { in ddp_cmdq_cb()
311 struct drm_plane *plane = &mtk_crtc->planes[i]; in ddp_cmdq_cb()
314 plane_state = to_mtk_plane_state(plane->state); in ddp_cmdq_cb()
316 plane_state->pending.async_config = false; in ddp_cmdq_cb()
318 mtk_crtc->pending_async_planes = false; in ddp_cmdq_cb()
323 if (mtk_crtc->pending_needs_vblank) { in ddp_cmdq_cb()
325 mtk_crtc->pending_needs_vblank = false; in ddp_cmdq_cb()
328 spin_unlock_irqrestore(&mtk_crtc->config_lock, flags); in ddp_cmdq_cb()
330 mtk_crtc->cmdq_vblank_cnt = 0; in ddp_cmdq_cb()
331 wake_up(&mtk_crtc->cb_blocking_queue); in ddp_cmdq_cb()
337 struct drm_crtc *crtc = &mtk_crtc->base; in mtk_crtc_ddp_hw_init()
345 if (WARN_ON(!crtc->state)) in mtk_crtc_ddp_hw_init()
346 return -EINVAL; in mtk_crtc_ddp_hw_init()
348 width = crtc->state->adjusted_mode.hdisplay; in mtk_crtc_ddp_hw_init()
349 height = crtc->state->adjusted_mode.vdisplay; in mtk_crtc_ddp_hw_init()
350 vrefresh = drm_mode_vrefresh(&crtc->state->adjusted_mode); in mtk_crtc_ddp_hw_init()
352 drm_for_each_encoder(encoder, crtc->dev) { in mtk_crtc_ddp_hw_init()
353 if (encoder->crtc != crtc) in mtk_crtc_ddp_hw_init()
356 drm_connector_list_iter_begin(crtc->dev, &conn_iter); in mtk_crtc_ddp_hw_init()
358 if (connector->encoder != encoder) in mtk_crtc_ddp_hw_init()
360 if (connector->display_info.bpc != 0 && in mtk_crtc_ddp_hw_init()
361 bpc > connector->display_info.bpc) in mtk_crtc_ddp_hw_init()
362 bpc = connector->display_info.bpc; in mtk_crtc_ddp_hw_init()
367 ret = pm_runtime_resume_and_get(crtc->dev->dev); in mtk_crtc_ddp_hw_init()
373 ret = mtk_mutex_prepare(mtk_crtc->mutex); in mtk_crtc_ddp_hw_init()
385 for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { in mtk_crtc_ddp_hw_init()
386 if (!mtk_ddp_comp_connect(mtk_crtc->ddp_comp[i], mtk_crtc->mmsys_dev, in mtk_crtc_ddp_hw_init()
387 mtk_crtc->ddp_comp[i + 1]->id)) in mtk_crtc_ddp_hw_init()
388 mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev, in mtk_crtc_ddp_hw_init()
389 mtk_crtc->ddp_comp[i]->id, in mtk_crtc_ddp_hw_init()
390 mtk_crtc->ddp_comp[i + 1]->id); in mtk_crtc_ddp_hw_init()
391 if (!mtk_ddp_comp_add(mtk_crtc->ddp_comp[i], mtk_crtc->mutex)) in mtk_crtc_ddp_hw_init()
392 mtk_mutex_add_comp(mtk_crtc->mutex, in mtk_crtc_ddp_hw_init()
393 mtk_crtc->ddp_comp[i]->id); in mtk_crtc_ddp_hw_init()
395 if (!mtk_ddp_comp_add(mtk_crtc->ddp_comp[i], mtk_crtc->mutex)) in mtk_crtc_ddp_hw_init()
396 mtk_mutex_add_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id); in mtk_crtc_ddp_hw_init()
397 mtk_mutex_enable(mtk_crtc->mutex); in mtk_crtc_ddp_hw_init()
399 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { in mtk_crtc_ddp_hw_init()
400 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i]; in mtk_crtc_ddp_hw_init()
410 for (i = 0; i < mtk_crtc->layer_nr; i++) { in mtk_crtc_ddp_hw_init()
411 struct drm_plane *plane = &mtk_crtc->planes[i]; in mtk_crtc_ddp_hw_init()
416 plane_state = to_mtk_plane_state(plane->state); in mtk_crtc_ddp_hw_init()
419 plane_state->pending.enable = false; in mtk_crtc_ddp_hw_init()
429 mtk_mutex_unprepare(mtk_crtc->mutex); in mtk_crtc_ddp_hw_init()
431 pm_runtime_put(crtc->dev->dev); in mtk_crtc_ddp_hw_init()
437 struct drm_device *drm = mtk_crtc->base.dev; in mtk_crtc_ddp_hw_fini()
438 struct drm_crtc *crtc = &mtk_crtc->base; in mtk_crtc_ddp_hw_fini()
442 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { in mtk_crtc_ddp_hw_fini()
443 mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]); in mtk_crtc_ddp_hw_fini()
445 mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]); in mtk_crtc_ddp_hw_fini()
448 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) in mtk_crtc_ddp_hw_fini()
449 if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex)) in mtk_crtc_ddp_hw_fini()
450 mtk_mutex_remove_comp(mtk_crtc->mutex, in mtk_crtc_ddp_hw_fini()
451 mtk_crtc->ddp_comp[i]->id); in mtk_crtc_ddp_hw_fini()
452 mtk_mutex_disable(mtk_crtc->mutex); in mtk_crtc_ddp_hw_fini()
453 for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { in mtk_crtc_ddp_hw_fini()
454 if (!mtk_ddp_comp_disconnect(mtk_crtc->ddp_comp[i], mtk_crtc->mmsys_dev, in mtk_crtc_ddp_hw_fini()
455 mtk_crtc->ddp_comp[i + 1]->id)) in mtk_crtc_ddp_hw_fini()
456 mtk_mmsys_ddp_disconnect(mtk_crtc->mmsys_dev, in mtk_crtc_ddp_hw_fini()
457 mtk_crtc->ddp_comp[i]->id, in mtk_crtc_ddp_hw_fini()
458 mtk_crtc->ddp_comp[i + 1]->id); in mtk_crtc_ddp_hw_fini()
459 if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex)) in mtk_crtc_ddp_hw_fini()
460 mtk_mutex_remove_comp(mtk_crtc->mutex, in mtk_crtc_ddp_hw_fini()
461 mtk_crtc->ddp_comp[i]->id); in mtk_crtc_ddp_hw_fini()
463 if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex)) in mtk_crtc_ddp_hw_fini()
464 mtk_mutex_remove_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id); in mtk_crtc_ddp_hw_fini()
466 mtk_mutex_unprepare(mtk_crtc->mutex); in mtk_crtc_ddp_hw_fini()
468 pm_runtime_put(drm->dev); in mtk_crtc_ddp_hw_fini()
470 if (crtc->state->event && !crtc->state->active) { in mtk_crtc_ddp_hw_fini()
471 spin_lock_irqsave(&crtc->dev->event_lock, flags); in mtk_crtc_ddp_hw_fini()
472 drm_crtc_send_vblank_event(crtc, crtc->state->event); in mtk_crtc_ddp_hw_fini()
473 crtc->state->event = NULL; in mtk_crtc_ddp_hw_fini()
474 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); in mtk_crtc_ddp_hw_fini()
482 struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state); in mtk_crtc_ddp_config()
483 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; in mtk_crtc_ddp_config()
492 if (state->pending_config) { in mtk_crtc_ddp_config()
493 mtk_ddp_comp_config(comp, state->pending_width, in mtk_crtc_ddp_config()
494 state->pending_height, in mtk_crtc_ddp_config()
495 state->pending_vrefresh, 0, in mtk_crtc_ddp_config()
499 state->pending_config = false; in mtk_crtc_ddp_config()
502 if (mtk_crtc->pending_planes) { in mtk_crtc_ddp_config()
503 for (i = 0; i < mtk_crtc->layer_nr; i++) { in mtk_crtc_ddp_config()
504 struct drm_plane *plane = &mtk_crtc->planes[i]; in mtk_crtc_ddp_config()
507 plane_state = to_mtk_plane_state(plane->state); in mtk_crtc_ddp_config()
509 if (!plane_state->pending.config) in mtk_crtc_ddp_config()
519 plane_state->pending.config = false; in mtk_crtc_ddp_config()
523 mtk_crtc->pending_planes = false; in mtk_crtc_ddp_config()
526 if (mtk_crtc->pending_async_planes) { in mtk_crtc_ddp_config()
527 for (i = 0; i < mtk_crtc->layer_nr; i++) { in mtk_crtc_ddp_config()
528 struct drm_plane *plane = &mtk_crtc->planes[i]; in mtk_crtc_ddp_config()
531 plane_state = to_mtk_plane_state(plane->state); in mtk_crtc_ddp_config()
533 if (!plane_state->pending.async_config) in mtk_crtc_ddp_config()
543 plane_state->pending.async_config = false; in mtk_crtc_ddp_config()
547 mtk_crtc->pending_async_planes = false; in mtk_crtc_ddp_config()
554 struct cmdq_pkt *cmdq_handle = &mtk_crtc->cmdq_handle; in mtk_crtc_update_config()
556 struct drm_crtc *crtc = &mtk_crtc->base; in mtk_crtc_update_config()
557 struct mtk_drm_private *priv = crtc->dev->dev_private; in mtk_crtc_update_config()
562 mutex_lock(&mtk_crtc->hw_lock); in mtk_crtc_update_config()
564 spin_lock_irqsave(&mtk_crtc->config_lock, flags); in mtk_crtc_update_config()
565 mtk_crtc->config_updating = true; in mtk_crtc_update_config()
566 spin_unlock_irqrestore(&mtk_crtc->config_lock, flags); in mtk_crtc_update_config()
569 mtk_crtc->pending_needs_vblank = true; in mtk_crtc_update_config()
571 for (i = 0; i < mtk_crtc->layer_nr; i++) { in mtk_crtc_update_config()
572 struct drm_plane *plane = &mtk_crtc->planes[i]; in mtk_crtc_update_config()
575 plane_state = to_mtk_plane_state(plane->state); in mtk_crtc_update_config()
576 if (plane_state->pending.dirty) { in mtk_crtc_update_config()
577 plane_state->pending.config = true; in mtk_crtc_update_config()
578 plane_state->pending.dirty = false; in mtk_crtc_update_config()
580 } else if (plane_state->pending.async_dirty) { in mtk_crtc_update_config()
581 plane_state->pending.async_config = true; in mtk_crtc_update_config()
582 plane_state->pending.async_dirty = false; in mtk_crtc_update_config()
587 mtk_crtc->pending_planes = true; in mtk_crtc_update_config()
589 mtk_crtc->pending_async_planes = true; in mtk_crtc_update_config()
591 if (priv->data->shadow_register) { in mtk_crtc_update_config()
592 mtk_mutex_acquire(mtk_crtc->mutex); in mtk_crtc_update_config()
594 mtk_mutex_release(mtk_crtc->mutex); in mtk_crtc_update_config()
597 if (mtk_crtc->cmdq_client.chan) { in mtk_crtc_update_config()
598 mbox_flush(mtk_crtc->cmdq_client.chan, 2000); in mtk_crtc_update_config()
599 cmdq_handle->cmd_buf_size = 0; in mtk_crtc_update_config()
600 cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event); in mtk_crtc_update_config()
601 cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false); in mtk_crtc_update_config()
604 dma_sync_single_for_device(mtk_crtc->cmdq_client.chan->mbox->dev, in mtk_crtc_update_config()
605 cmdq_handle->pa_base, in mtk_crtc_update_config()
606 cmdq_handle->cmd_buf_size, in mtk_crtc_update_config()
615 mtk_crtc->cmdq_vblank_cnt = 3; in mtk_crtc_update_config()
617 spin_lock_irqsave(&mtk_crtc->config_lock, flags); in mtk_crtc_update_config()
618 mtk_crtc->config_updating = false; in mtk_crtc_update_config()
619 spin_unlock_irqrestore(&mtk_crtc->config_lock, flags); in mtk_crtc_update_config()
621 mbox_send_message(mtk_crtc->cmdq_client.chan, cmdq_handle); in mtk_crtc_update_config()
622 mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0); in mtk_crtc_update_config()
626 spin_lock_irqsave(&mtk_crtc->config_lock, flags); in mtk_crtc_update_config()
627 mtk_crtc->config_updating = false; in mtk_crtc_update_config()
628 spin_unlock_irqrestore(&mtk_crtc->config_lock, flags); in mtk_crtc_update_config()
633 mutex_unlock(&mtk_crtc->hw_lock); in mtk_crtc_update_config()
640 struct mtk_drm_private *priv = crtc->dev->dev_private; in mtk_crtc_ddp_irq()
643 if (!priv->data->shadow_register && !mtk_crtc->cmdq_client.chan) in mtk_crtc_ddp_irq()
645 else if (mtk_crtc->cmdq_vblank_cnt > 0 && --mtk_crtc->cmdq_vblank_cnt == 0) in mtk_crtc_ddp_irq()
647 drm_crtc_index(&mtk_crtc->base)); in mtk_crtc_ddp_irq()
649 if (!priv->data->shadow_register) in mtk_crtc_ddp_irq()
658 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; in mtk_crtc_enable_vblank()
668 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; in mtk_crtc_disable_vblank()
679 struct drm_crtc_state *crtc_state = state->crtcs[crtc_index].new_state; in mtk_crtc_update_output()
682 unsigned int encoder_mask = crtc_state->encoder_mask; in mtk_crtc_update_output()
684 if (!crtc_state->connectors_changed) in mtk_crtc_update_output()
687 if (!mtk_crtc->num_conn_routes) in mtk_crtc_update_output()
690 priv = ((struct mtk_drm_private *)crtc->dev->dev_private)->all_drm_private[crtc_index]; in mtk_crtc_update_output()
691 dev = priv->dev; in mtk_crtc_update_output()
694 crtc_state->connectors_changed, encoder_mask, crtc_index); in mtk_crtc_update_output()
696 for (i = 0; i < mtk_crtc->num_conn_routes; i++) { in mtk_crtc_update_output()
697 unsigned int comp_id = mtk_crtc->conn_routes[i].route_ddp; in mtk_crtc_update_output()
698 struct mtk_ddp_comp *comp = &priv->ddp_comp[comp_id]; in mtk_crtc_update_output()
700 if (comp->encoder_index >= 0 && in mtk_crtc_update_output()
701 (encoder_mask & BIT(comp->encoder_index))) { in mtk_crtc_update_output()
702 mtk_crtc->ddp_comp[mtk_crtc->ddp_comp_nr - 1] = comp; in mtk_crtc_update_output()
704 comp->id, mtk_crtc->ddp_comp_nr - 1); in mtk_crtc_update_output()
726 struct mtk_plane_state *plane_state = to_mtk_plane_state(plane->state); in mtk_crtc_plane_disable()
730 if (!mtk_crtc->cmdq_client.chan) in mtk_crtc_plane_disable()
733 if (!mtk_crtc->enabled) in mtk_crtc_plane_disable()
737 for (i = 0; i < mtk_crtc->layer_nr; i++) { in mtk_crtc_plane_disable()
738 struct drm_plane *mtk_plane = &mtk_crtc->planes[i]; in mtk_crtc_plane_disable()
739 struct mtk_plane_state *mtk_plane_state = to_mtk_plane_state(mtk_plane->state); in mtk_crtc_plane_disable()
741 if (mtk_plane->index == plane->index) { in mtk_crtc_plane_disable()
749 wait_event_timeout(mtk_crtc->cb_blocking_queue, in mtk_crtc_plane_disable()
750 mtk_crtc->cmdq_vblank_cnt == 0, in mtk_crtc_plane_disable()
760 if (!mtk_crtc->enabled) in mtk_crtc_async_update()
770 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; in mtk_crtc_atomic_enable()
773 DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); in mtk_crtc_atomic_enable()
777 DRM_DEV_ERROR(comp->dev, "Failed to enable power domain: %d\n", ret); in mtk_crtc_atomic_enable()
790 mtk_crtc->enabled = true; in mtk_crtc_atomic_enable()
797 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; in mtk_crtc_atomic_disable()
800 DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id); in mtk_crtc_atomic_disable()
801 if (!mtk_crtc->enabled) in mtk_crtc_atomic_disable()
805 for (i = 0; i < mtk_crtc->layer_nr; i++) { in mtk_crtc_atomic_disable()
806 struct drm_plane *plane = &mtk_crtc->planes[i]; in mtk_crtc_atomic_disable()
809 plane_state = to_mtk_plane_state(plane->state); in mtk_crtc_atomic_disable()
810 plane_state->pending.enable = false; in mtk_crtc_atomic_disable()
811 plane_state->pending.config = true; in mtk_crtc_atomic_disable()
813 mtk_crtc->pending_planes = true; in mtk_crtc_atomic_disable()
818 if (mtk_crtc->cmdq_client.chan) in mtk_crtc_atomic_disable()
819 wait_event_timeout(mtk_crtc->cb_blocking_queue, in mtk_crtc_atomic_disable()
820 mtk_crtc->cmdq_vblank_cnt == 0, in mtk_crtc_atomic_disable()
830 mtk_crtc->enabled = false; in mtk_crtc_atomic_disable()
842 if (mtk_crtc->event && mtk_crtc_state->base.event) in mtk_crtc_atomic_begin()
845 if (mtk_crtc_state->base.event) { in mtk_crtc_atomic_begin()
846 mtk_crtc_state->base.event->pipe = drm_crtc_index(crtc); in mtk_crtc_atomic_begin()
849 spin_lock_irqsave(&crtc->dev->event_lock, flags); in mtk_crtc_atomic_begin()
850 mtk_crtc->event = mtk_crtc_state->base.event; in mtk_crtc_atomic_begin()
851 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); in mtk_crtc_atomic_begin()
853 mtk_crtc_state->base.event = NULL; in mtk_crtc_atomic_begin()
863 if (crtc->state->color_mgmt_changed) in mtk_crtc_atomic_flush()
864 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { in mtk_crtc_atomic_flush()
865 mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state); in mtk_crtc_atomic_flush()
866 mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state); in mtk_crtc_atomic_flush()
868 mtk_crtc_update_config(mtk_crtc, !!mtk_crtc->event); in mtk_crtc_atomic_flush()
899 for (i = 0; i < mtk_crtc->layer_nr; i++) { in mtk_crtc_init()
900 if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_PRIMARY) in mtk_crtc_init()
901 primary = &mtk_crtc->planes[i]; in mtk_crtc_init()
902 else if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_CURSOR) in mtk_crtc_init()
903 cursor = &mtk_crtc->planes[i]; in mtk_crtc_init()
906 ret = drm_crtc_init_with_planes(drm, &mtk_crtc->base, primary, cursor, in mtk_crtc_init()
911 drm_crtc_helper_add(&mtk_crtc->base, &mtk_crtc_helper_funcs); in mtk_crtc_init()
916 drm_crtc_cleanup(&mtk_crtc->base); in mtk_crtc_init()
927 comp = mtk_crtc->ddp_comp[comp_idx]; in mtk_crtc_num_comp_planes()
928 if (!comp->funcs) in mtk_crtc_num_comp_planes()
931 if (comp_idx == 1 && !comp->funcs->bgclr_in_on) in mtk_crtc_num_comp_planes()
943 else if (plane_idx == (num_planes - 1)) in mtk_crtc_plane_type()
955 struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[comp_idx]; in mtk_crtc_init_comp_planes()
960 &mtk_crtc->planes[mtk_crtc->layer_nr], in mtk_crtc_init_comp_planes()
962 mtk_crtc_plane_type(mtk_crtc->layer_nr, num_planes), in mtk_crtc_init_comp_planes()
971 mtk_crtc->layer_nr++; in mtk_crtc_init_comp_planes()
987 return mtk_crtc->dma_dev; in mtk_crtc_dma_dev_get()
995 struct mtk_drm_private *priv = drm_dev->dev_private; in mtk_crtc_create()
996 struct device *dev = drm_dev->dev; in mtk_crtc_create()
1009 priv = priv->all_drm_private[priv_data_index]; in mtk_crtc_create()
1019 node = priv->comp_node[comp_id]; in mtk_crtc_create()
1020 comp = &priv->ddp_comp[comp_id]; in mtk_crtc_create()
1032 if (!comp->dev) { in mtk_crtc_create()
1034 return -ENODEV; in mtk_crtc_create()
1040 return -ENOMEM; in mtk_crtc_create()
1042 mtk_crtc->mmsys_dev = priv->mmsys_dev; in mtk_crtc_create()
1043 mtk_crtc->ddp_comp_nr = path_len; in mtk_crtc_create()
1044 mtk_crtc->ddp_comp = devm_kcalloc(dev, in mtk_crtc_create()
1045 mtk_crtc->ddp_comp_nr + (conn_routes ? 1 : 0), in mtk_crtc_create()
1046 sizeof(*mtk_crtc->ddp_comp), in mtk_crtc_create()
1048 if (!mtk_crtc->ddp_comp) in mtk_crtc_create()
1049 return -ENOMEM; in mtk_crtc_create()
1051 mtk_crtc->mutex = mtk_mutex_get(priv->mutex_dev); in mtk_crtc_create()
1052 if (IS_ERR(mtk_crtc->mutex)) { in mtk_crtc_create()
1053 ret = PTR_ERR(mtk_crtc->mutex); in mtk_crtc_create()
1058 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { in mtk_crtc_create()
1062 comp = &priv->ddp_comp[comp_id]; in mtk_crtc_create()
1063 mtk_crtc->ddp_comp[i] = comp; in mtk_crtc_create()
1065 if (comp->funcs) { in mtk_crtc_create()
1066 if (comp->funcs->gamma_set && comp->funcs->gamma_get_lut_size) { in mtk_crtc_create()
1073 if (comp->funcs->ctm_set) in mtk_crtc_create()
1078 &mtk_crtc->base); in mtk_crtc_create()
1081 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) in mtk_crtc_create()
1084 mtk_crtc->planes = devm_kcalloc(dev, num_comp_planes, in mtk_crtc_create()
1086 if (!mtk_crtc->planes) in mtk_crtc_create()
1087 return -ENOMEM; in mtk_crtc_create()
1089 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { in mtk_crtc_create()
1100 mtk_crtc->dma_dev = mtk_ddp_comp_dma_dev_get(&priv->ddp_comp[path[0]]); in mtk_crtc_create()
1107 drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size); in mtk_crtc_create()
1108 drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size); in mtk_crtc_create()
1109 mutex_init(&mtk_crtc->hw_lock); in mtk_crtc_create()
1110 spin_lock_init(&mtk_crtc->config_lock); in mtk_crtc_create()
1113 i = priv->mbox_index++; in mtk_crtc_create()
1114 mtk_crtc->cmdq_client.client.dev = mtk_crtc->mmsys_dev; in mtk_crtc_create()
1115 mtk_crtc->cmdq_client.client.tx_block = false; in mtk_crtc_create()
1116 mtk_crtc->cmdq_client.client.knows_txdone = true; in mtk_crtc_create()
1117 mtk_crtc->cmdq_client.client.rx_callback = ddp_cmdq_cb; in mtk_crtc_create()
1118 mtk_crtc->cmdq_client.chan = in mtk_crtc_create()
1119 mbox_request_channel(&mtk_crtc->cmdq_client.client, i); in mtk_crtc_create()
1120 if (IS_ERR(mtk_crtc->cmdq_client.chan)) { in mtk_crtc_create()
1122 drm_crtc_index(&mtk_crtc->base)); in mtk_crtc_create()
1123 mtk_crtc->cmdq_client.chan = NULL; in mtk_crtc_create()
1126 if (mtk_crtc->cmdq_client.chan) { in mtk_crtc_create()
1127 ret = of_property_read_u32_index(priv->mutex_node, in mtk_crtc_create()
1128 "mediatek,gce-events", in mtk_crtc_create()
1130 &mtk_crtc->cmdq_event); in mtk_crtc_create()
1132 dev_dbg(dev, "mtk_crtc %d failed to get mediatek,gce-events property\n", in mtk_crtc_create()
1133 drm_crtc_index(&mtk_crtc->base)); in mtk_crtc_create()
1134 mbox_free_channel(mtk_crtc->cmdq_client.chan); in mtk_crtc_create()
1135 mtk_crtc->cmdq_client.chan = NULL; in mtk_crtc_create()
1137 ret = cmdq_pkt_create(&mtk_crtc->cmdq_client, in mtk_crtc_create()
1138 &mtk_crtc->cmdq_handle, in mtk_crtc_create()
1142 drm_crtc_index(&mtk_crtc->base)); in mtk_crtc_create()
1143 mbox_free_channel(mtk_crtc->cmdq_client.chan); in mtk_crtc_create()
1144 mtk_crtc->cmdq_client.chan = NULL; in mtk_crtc_create()
1149 init_waitqueue_head(&mtk_crtc->cb_blocking_queue); in mtk_crtc_create()
1156 struct device_node *node = priv->comp_node[comp_id]; in mtk_crtc_create()
1157 struct mtk_ddp_comp *comp = &priv->ddp_comp[comp_id]; in mtk_crtc_create()
1159 if (!comp->dev) { in mtk_crtc_create()
1162 /* mark encoder_index to -1, if route comp device is not enabled */ in mtk_crtc_create()
1163 comp->encoder_index = -1; in mtk_crtc_create()
1167 mtk_ddp_comp_encoder_index_set(&priv->ddp_comp[comp_id]); in mtk_crtc_create()
1170 mtk_crtc->num_conn_routes = num_conn_routes; in mtk_crtc_create()
1171 mtk_crtc->conn_routes = conn_routes; in mtk_crtc_create()
1174 mtk_crtc->ddp_comp_nr++; in mtk_crtc_create()