Lines Matching refs:width
711 u8 width; member
717 #define clk_div_mask(width) ((1 << (width)) - 1) argument
734 unsigned long flags, unsigned long width);
738 u8 width, unsigned long flags);
741 const struct clk_div_table *table, u8 width,
744 const struct clk_div_table *table, u8 width,
747 const struct clk_div_table *table, u8 width,
750 const struct clk_div_table *table, u8 width,
757 void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,
763 void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,
767 void __iomem *reg, u8 shift, u8 width,
782 #define clk_register_divider(dev, name, parent_name, flags, reg, shift, width, \ argument
785 (reg), (shift), (width), \
800 width, clk_divider_flags, lock) \ argument
802 NULL, (flags), (reg), (shift), (width), \
818 shift, width, clk_divider_flags, \ argument
821 NULL, (flags), (reg), (shift), (width), \
837 reg, shift, width, \ argument
841 (width), (clk_divider_flags), NULL, (lock))
857 shift, width, clk_divider_flags, table, \ argument
860 NULL, (flags), (reg), (shift), (width), \
877 reg, shift, width, \ argument
881 NULL, (flags), (reg), (shift), (width), \
898 flags, reg, shift, width, \ argument
903 (width), (clk_divider_flags), (table), \
918 width, clk_divider_flags, lock) \ argument
920 NULL, (flags), (reg), (shift), (width), \
935 reg, shift, width, \ argument
939 (shift), (width), (clk_divider_flags), \
956 reg, shift, width, \ argument
960 (width), (clk_divider_flags), (table), \
1037 shift, width, clk_mux_flags, lock) \ argument
1039 (flags), (reg), (shift), BIT((width)) - 1, \
1056 shift, width, clk_mux_flags, lock) \ argument
1059 (shift), BIT((width)) - 1, (clk_mux_flags), \
1062 reg, shift, width, clk_mux_flags, lock) \ argument
1065 BIT((width)) - 1, (clk_mux_flags), NULL, (lock))
1067 flags, reg, shift, width, \ argument
1071 BIT((width)) - 1, (clk_mux_flags), NULL, (lock))
1074 width, clk_mux_flags, table, \ argument
1078 BIT((width)) - 1, (clk_mux_flags), table, (lock))
1080 shift, width, clk_mux_flags, lock) \ argument
1083 (shift), BIT((width)) - 1, (clk_mux_flags), \
1087 width, clk_mux_flags, lock) \ argument
1090 (shift), BIT((width)) - 1, \
1094 width, clk_mux_flags, table, \ argument
1098 BIT((width)) - 1, (clk_mux_flags), table, (lock))
1263 u8 width; member
1407 u8 width, unsigned long flags) in divider_round_rate() argument
1410 rate, prate, table, width, flags); in divider_round_rate()
1416 u8 width, unsigned long flags, in divider_ro_round_rate() argument
1420 rate, prate, table, width, flags, in divider_ro_round_rate()