1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11 #ifndef __PHY_H
12 #define __PHY_H
13
14 #include <linux/compiler.h>
15 #include <linux/spinlock.h>
16 #include <linux/ethtool.h>
17 #include <linux/leds.h>
18 #include <linux/linkmode.h>
19 #include <linux/netlink.h>
20 #include <linux/mdio.h>
21 #include <linux/mii.h>
22 #include <linux/mii_timestamper.h>
23 #include <linux/module.h>
24 #include <linux/timer.h>
25 #include <linux/workqueue.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/u64_stats_sync.h>
28 #include <linux/irqreturn.h>
29 #include <linux/iopoll.h>
30 #include <linux/refcount.h>
31 #include <linux/android_kabi.h>
32
33 #include <linux/atomic.h>
34 #include <net/eee.h>
35
36 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
37 SUPPORTED_TP | \
38 SUPPORTED_MII)
39
40 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
41 SUPPORTED_10baseT_Full)
42
43 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
44 SUPPORTED_100baseT_Full)
45
46 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
47 SUPPORTED_1000baseT_Full)
48
49 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
50 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
51 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1s_p2mp_features) __ro_after_init;
52 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
53 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
54 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
55 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
56 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
57 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
58 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;
59 extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init;
60
61 #define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
62 #define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
63 #define PHY_BASIC_T1S_P2MP_FEATURES ((unsigned long *)&phy_basic_t1s_p2mp_features)
64 #define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
65 #define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
66 #define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
67 #define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
68 #define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
69 #define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
70 #define PHY_EEE_CAP1_FEATURES ((unsigned long *)&phy_eee_cap1_features)
71 #define PHY_EEE_CAP2_FEATURES ((unsigned long *)&phy_eee_cap2_features)
72
73 extern const int phy_basic_ports_array[3];
74 extern const int phy_fibre_port_array[1];
75 extern const int phy_all_ports_features_array[7];
76 extern const int phy_10_100_features_array[4];
77 extern const int phy_basic_t1_features_array[3];
78 extern const int phy_basic_t1s_p2mp_features_array[2];
79 extern const int phy_gbit_features_array[2];
80 extern const int phy_10gbit_features_array[1];
81
82 /*
83 * Set phydev->irq to PHY_POLL if interrupts are not supported,
84 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if
85 * the attached MAC driver handles the interrupt
86 */
87 #define PHY_POLL -1
88 #define PHY_MAC_INTERRUPT -2
89
90 #define PHY_IS_INTERNAL 0x00000001
91 #define PHY_RST_AFTER_CLK_EN 0x00000002
92 #define PHY_POLL_CABLE_TEST 0x00000004
93 #define PHY_ALWAYS_CALL_SUSPEND 0x00000008
94 #define MDIO_DEVICE_IS_PHY 0x80000000
95
96 /**
97 * enum phy_interface_t - Interface Mode definitions
98 *
99 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
100 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
101 * @PHY_INTERFACE_MODE_MII: Media-independent interface
102 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
103 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
104 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
105 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
106 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
107 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role
108 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
109 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
110 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
111 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
112 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
113 * @PHY_INTERFACE_MODE_SMII: Serial MII
114 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
115 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
116 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
117 * @PHY_INTERFACE_MODE_PSGMII: Penta SGMII
118 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
119 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
120 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX
121 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
122 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
123 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR
124 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
125 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
126 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
127 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR
128 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
129 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
130 * @PHY_INTERFACE_MODE_QUSGMII: Quad Universal SGMII
131 * @PHY_INTERFACE_MODE_1000BASEKX: 1000Base-KX - with Clause 73 AN
132 * @PHY_INTERFACE_MODE_10G_QXGMII: 10G-QXGMII - 4 ports over 10G USXGMII
133 * @PHY_INTERFACE_MODE_MAX: Book keeping
134 *
135 * Describes the interface between the MAC and PHY.
136 */
137 typedef enum {
138 PHY_INTERFACE_MODE_NA,
139 PHY_INTERFACE_MODE_INTERNAL,
140 PHY_INTERFACE_MODE_MII,
141 PHY_INTERFACE_MODE_GMII,
142 PHY_INTERFACE_MODE_SGMII,
143 PHY_INTERFACE_MODE_TBI,
144 PHY_INTERFACE_MODE_REVMII,
145 PHY_INTERFACE_MODE_RMII,
146 PHY_INTERFACE_MODE_REVRMII,
147 PHY_INTERFACE_MODE_RGMII,
148 PHY_INTERFACE_MODE_RGMII_ID,
149 PHY_INTERFACE_MODE_RGMII_RXID,
150 PHY_INTERFACE_MODE_RGMII_TXID,
151 PHY_INTERFACE_MODE_RTBI,
152 PHY_INTERFACE_MODE_SMII,
153 PHY_INTERFACE_MODE_XGMII,
154 PHY_INTERFACE_MODE_XLGMII,
155 PHY_INTERFACE_MODE_MOCA,
156 PHY_INTERFACE_MODE_PSGMII,
157 PHY_INTERFACE_MODE_QSGMII,
158 PHY_INTERFACE_MODE_TRGMII,
159 PHY_INTERFACE_MODE_100BASEX,
160 PHY_INTERFACE_MODE_1000BASEX,
161 PHY_INTERFACE_MODE_2500BASEX,
162 PHY_INTERFACE_MODE_5GBASER,
163 PHY_INTERFACE_MODE_RXAUI,
164 PHY_INTERFACE_MODE_XAUI,
165 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
166 PHY_INTERFACE_MODE_10GBASER,
167 PHY_INTERFACE_MODE_25GBASER,
168 PHY_INTERFACE_MODE_USXGMII,
169 /* 10GBASE-KR - with Clause 73 AN */
170 PHY_INTERFACE_MODE_10GKR,
171 PHY_INTERFACE_MODE_QUSGMII,
172 PHY_INTERFACE_MODE_1000BASEKX,
173 PHY_INTERFACE_MODE_10G_QXGMII,
174 PHY_INTERFACE_MODE_MAX,
175 } phy_interface_t;
176
177 /* PHY interface mode bitmap handling */
178 #define DECLARE_PHY_INTERFACE_MASK(name) \
179 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
180
phy_interface_zero(unsigned long * intf)181 static inline void phy_interface_zero(unsigned long *intf)
182 {
183 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
184 }
185
phy_interface_empty(const unsigned long * intf)186 static inline bool phy_interface_empty(const unsigned long *intf)
187 {
188 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
189 }
190
phy_interface_and(unsigned long * dst,const unsigned long * a,const unsigned long * b)191 static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
192 const unsigned long *b)
193 {
194 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
195 }
196
phy_interface_or(unsigned long * dst,const unsigned long * a,const unsigned long * b)197 static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
198 const unsigned long *b)
199 {
200 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
201 }
202
phy_interface_set_rgmii(unsigned long * intf)203 static inline void phy_interface_set_rgmii(unsigned long *intf)
204 {
205 __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
206 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
207 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
208 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
209 }
210
211 /*
212 * phy_supported_speeds - return all speeds currently supported by a PHY device
213 */
214 unsigned int phy_supported_speeds(struct phy_device *phy,
215 unsigned int *speeds,
216 unsigned int size);
217
218 /**
219 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
220 * @interface: enum phy_interface_t value
221 *
222 * Description: maps enum &phy_interface_t defined in this file
223 * into the device tree binding of 'phy-mode', so that Ethernet
224 * device driver can get PHY interface from device tree.
225 */
phy_modes(phy_interface_t interface)226 static inline const char *phy_modes(phy_interface_t interface)
227 {
228 switch (interface) {
229 case PHY_INTERFACE_MODE_NA:
230 return "";
231 case PHY_INTERFACE_MODE_INTERNAL:
232 return "internal";
233 case PHY_INTERFACE_MODE_MII:
234 return "mii";
235 case PHY_INTERFACE_MODE_GMII:
236 return "gmii";
237 case PHY_INTERFACE_MODE_SGMII:
238 return "sgmii";
239 case PHY_INTERFACE_MODE_TBI:
240 return "tbi";
241 case PHY_INTERFACE_MODE_REVMII:
242 return "rev-mii";
243 case PHY_INTERFACE_MODE_RMII:
244 return "rmii";
245 case PHY_INTERFACE_MODE_REVRMII:
246 return "rev-rmii";
247 case PHY_INTERFACE_MODE_RGMII:
248 return "rgmii";
249 case PHY_INTERFACE_MODE_RGMII_ID:
250 return "rgmii-id";
251 case PHY_INTERFACE_MODE_RGMII_RXID:
252 return "rgmii-rxid";
253 case PHY_INTERFACE_MODE_RGMII_TXID:
254 return "rgmii-txid";
255 case PHY_INTERFACE_MODE_RTBI:
256 return "rtbi";
257 case PHY_INTERFACE_MODE_SMII:
258 return "smii";
259 case PHY_INTERFACE_MODE_XGMII:
260 return "xgmii";
261 case PHY_INTERFACE_MODE_XLGMII:
262 return "xlgmii";
263 case PHY_INTERFACE_MODE_MOCA:
264 return "moca";
265 case PHY_INTERFACE_MODE_PSGMII:
266 return "psgmii";
267 case PHY_INTERFACE_MODE_QSGMII:
268 return "qsgmii";
269 case PHY_INTERFACE_MODE_TRGMII:
270 return "trgmii";
271 case PHY_INTERFACE_MODE_1000BASEX:
272 return "1000base-x";
273 case PHY_INTERFACE_MODE_1000BASEKX:
274 return "1000base-kx";
275 case PHY_INTERFACE_MODE_2500BASEX:
276 return "2500base-x";
277 case PHY_INTERFACE_MODE_5GBASER:
278 return "5gbase-r";
279 case PHY_INTERFACE_MODE_RXAUI:
280 return "rxaui";
281 case PHY_INTERFACE_MODE_XAUI:
282 return "xaui";
283 case PHY_INTERFACE_MODE_10GBASER:
284 return "10gbase-r";
285 case PHY_INTERFACE_MODE_25GBASER:
286 return "25gbase-r";
287 case PHY_INTERFACE_MODE_USXGMII:
288 return "usxgmii";
289 case PHY_INTERFACE_MODE_10GKR:
290 return "10gbase-kr";
291 case PHY_INTERFACE_MODE_100BASEX:
292 return "100base-x";
293 case PHY_INTERFACE_MODE_QUSGMII:
294 return "qusgmii";
295 case PHY_INTERFACE_MODE_10G_QXGMII:
296 return "10g-qxgmii";
297 default:
298 return "unknown";
299 }
300 }
301
302 #define PHY_INIT_TIMEOUT 100000
303 #define PHY_FORCE_TIMEOUT 10
304
305 #define PHY_MAX_ADDR 32
306
307 /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
308 #define PHY_ID_FMT "%s:%02x"
309
310 #define MII_BUS_ID_SIZE 61
311
312 struct device;
313 struct kernel_hwtstamp_config;
314 struct phylink;
315 struct sfp_bus;
316 struct sfp_upstream_ops;
317 struct sk_buff;
318
319 /**
320 * struct mdio_bus_stats - Statistics counters for MDIO busses
321 * @transfers: Total number of transfers, i.e. @writes + @reads
322 * @errors: Number of MDIO transfers that returned an error
323 * @writes: Number of write transfers
324 * @reads: Number of read transfers
325 * @syncp: Synchronisation for incrementing statistics
326 */
327 struct mdio_bus_stats {
328 u64_stats_t transfers;
329 u64_stats_t errors;
330 u64_stats_t writes;
331 u64_stats_t reads;
332 /* Must be last, add new statistics above */
333 struct u64_stats_sync syncp;
334 };
335
336 /**
337 * struct phy_package_shared - Shared information in PHY packages
338 * @base_addr: Base PHY address of PHY package used to combine PHYs
339 * in one package and for offset calculation of phy_package_read/write
340 * @np: Pointer to the Device Node if PHY package defined in DT
341 * @refcnt: Number of PHYs connected to this shared data
342 * @flags: Initialization of PHY package
343 * @priv_size: Size of the shared private data @priv
344 * @priv: Driver private data shared across a PHY package
345 *
346 * Represents a shared structure between different phydev's in the same
347 * package, for example a quad PHY. See phy_package_join() and
348 * phy_package_leave().
349 */
350 struct phy_package_shared {
351 u8 base_addr;
352 /* With PHY package defined in DT this points to the PHY package node */
353 struct device_node *np;
354 refcount_t refcnt;
355 unsigned long flags;
356 size_t priv_size;
357
358 /* private data pointer */
359 /* note that this pointer is shared between different phydevs and
360 * the user has to take care of appropriate locking. It is allocated
361 * and freed automatically by phy_package_join() and
362 * phy_package_leave().
363 */
364 void *priv;
365 };
366
367 /* used as bit number in atomic bitops */
368 #define PHY_SHARED_F_INIT_DONE 0
369 #define PHY_SHARED_F_PROBE_DONE 1
370
371 /**
372 * struct mii_bus - Represents an MDIO bus
373 *
374 * @owner: Who owns this device
375 * @name: User friendly name for this MDIO device, or driver name
376 * @id: Unique identifier for this bus, typical from bus hierarchy
377 * @priv: Driver private data
378 *
379 * The Bus class for PHYs. Devices which provide access to
380 * PHYs should register using this structure
381 */
382 struct mii_bus {
383 struct module *owner;
384 const char *name;
385 char id[MII_BUS_ID_SIZE];
386 void *priv;
387 /** @read: Perform a read transfer on the bus */
388 int (*read)(struct mii_bus *bus, int addr, int regnum);
389 /** @write: Perform a write transfer on the bus */
390 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
391 /** @read_c45: Perform a C45 read transfer on the bus */
392 int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum);
393 /** @write_c45: Perform a C45 write transfer on the bus */
394 int (*write_c45)(struct mii_bus *bus, int addr, int devnum,
395 int regnum, u16 val);
396 /** @reset: Perform a reset of the bus */
397 int (*reset)(struct mii_bus *bus);
398
399 /** @stats: Statistic counters per device on the bus */
400 struct mdio_bus_stats stats[PHY_MAX_ADDR];
401
402 /**
403 * @mdio_lock: A lock to ensure that only one thing can read/write
404 * the MDIO bus at a time
405 */
406 struct mutex mdio_lock;
407
408 /** @parent: Parent device of this bus */
409 struct device *parent;
410 /** @state: State of bus structure */
411 enum {
412 MDIOBUS_ALLOCATED = 1,
413 MDIOBUS_REGISTERED,
414 MDIOBUS_UNREGISTERED,
415 MDIOBUS_RELEASED,
416 } state;
417
418 /** @dev: Kernel device representation */
419 struct device dev;
420
421 /** @mdio_map: list of all MDIO devices on bus */
422 struct mdio_device *mdio_map[PHY_MAX_ADDR];
423
424 /** @phy_mask: PHY addresses to be ignored when probing */
425 u32 phy_mask;
426
427 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
428 u32 phy_ignore_ta_mask;
429
430 /**
431 * @irq: An array of interrupts, each PHY's interrupt at the index
432 * matching its address
433 */
434 int irq[PHY_MAX_ADDR];
435
436 /** @reset_delay_us: GPIO reset pulse width in microseconds */
437 int reset_delay_us;
438 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
439 int reset_post_delay_us;
440 /** @reset_gpiod: Reset GPIO descriptor pointer */
441 struct gpio_desc *reset_gpiod;
442
443 /** @shared_lock: protect access to the shared element */
444 struct mutex shared_lock;
445
446 /** @shared: shared state across different PHYs */
447 struct phy_package_shared *shared[PHY_MAX_ADDR];
448 };
449 #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
450
451 struct mii_bus *mdiobus_alloc_size(size_t size);
452
453 /**
454 * mdiobus_alloc - Allocate an MDIO bus structure
455 *
456 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
457 * for the driver to register the bus.
458 */
mdiobus_alloc(void)459 static inline struct mii_bus *mdiobus_alloc(void)
460 {
461 return mdiobus_alloc_size(0);
462 }
463
464 int __mdiobus_register(struct mii_bus *bus, struct module *owner);
465 int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
466 struct module *owner);
467 #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
468 #define devm_mdiobus_register(dev, bus) \
469 __devm_mdiobus_register(dev, bus, THIS_MODULE)
470
471 void mdiobus_unregister(struct mii_bus *bus);
472 void mdiobus_free(struct mii_bus *bus);
473 struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
devm_mdiobus_alloc(struct device * dev)474 static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
475 {
476 return devm_mdiobus_alloc_size(dev, 0);
477 }
478
479 struct mii_bus *mdio_find_bus(const char *mdio_name);
480 struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr);
481
482 #define PHY_INTERRUPT_DISABLED false
483 #define PHY_INTERRUPT_ENABLED true
484
485 /**
486 * enum phy_state - PHY state machine states:
487 *
488 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
489 * should be called if and only if the PHY is in this state,
490 * given that the PHY device exists.
491 * - PHY driver probe function will set the state to @PHY_READY
492 *
493 * @PHY_READY: PHY is ready to send and receive packets, but the
494 * controller is not. By default, PHYs which do not implement
495 * probe will be set to this state by phy_probe().
496 * - start will set the state to UP
497 *
498 * @PHY_UP: The PHY and attached device are ready to do work.
499 * Interrupts should be started here.
500 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
501 *
502 * @PHY_NOLINK: PHY is up, but not currently plugged in.
503 * - irq or timer will set @PHY_RUNNING if link comes back
504 * - phy_stop moves to @PHY_HALTED
505 *
506 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
507 * and/or receiving packets
508 * - irq or timer will set @PHY_NOLINK if link goes down
509 * - phy_stop moves to @PHY_HALTED
510 *
511 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
512 * is not expected to work, carrier will be indicated as down. PHY will be
513 * poll once per second, or on interrupt for it current state.
514 * Once complete, move to UP to restart the PHY.
515 * - phy_stop aborts the running test and moves to @PHY_HALTED
516 *
517 * @PHY_HALTED: PHY is up, but no polling or interrupts are done.
518 * - phy_start moves to @PHY_UP
519 *
520 * @PHY_ERROR: PHY is up, but is in an error state.
521 * - phy_stop moves to @PHY_HALTED
522 */
523 enum phy_state {
524 PHY_DOWN = 0,
525 PHY_READY,
526 PHY_HALTED,
527 PHY_ERROR,
528 PHY_UP,
529 PHY_RUNNING,
530 PHY_NOLINK,
531 PHY_CABLETEST,
532 };
533
534 #define MDIO_MMD_NUM 32
535
536 /**
537 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
538 * @devices_in_package: IEEE 802.3 devices in package register value.
539 * @mmds_present: bit vector of MMDs present.
540 * @device_ids: The device identifer for each present device.
541 */
542 struct phy_c45_device_ids {
543 u32 devices_in_package;
544 u32 mmds_present;
545 u32 device_ids[MDIO_MMD_NUM];
546 };
547
548 struct macsec_context;
549 struct macsec_ops;
550
551 /**
552 * struct phy_device - An instance of a PHY
553 *
554 * @mdio: MDIO bus this PHY is on
555 * @drv: Pointer to the driver for this PHY instance
556 * @devlink: Create a link between phy dev and mac dev, if the external phy
557 * used by current mac interface is managed by another mac interface.
558 * @phyindex: Unique id across the phy's parent tree of phys to address the PHY
559 * from userspace, similar to ifindex. A zero index means the PHY
560 * wasn't assigned an id yet.
561 * @phy_id: UID for this device found during discovery
562 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
563 * @is_c45: Set to true if this PHY uses clause 45 addressing.
564 * @is_internal: Set to true if this PHY is internal to a MAC.
565 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
566 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
567 * @has_fixups: Set to true if this PHY has fixups/quirks.
568 * @suspended: Set to true if this PHY has been suspended successfully.
569 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
570 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
571 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
572 * @downshifted_rate: Set true if link speed has been downshifted.
573 * @is_on_sfp_module: Set true if PHY is located on an SFP module.
574 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY
575 * @wol_enabled: Set to true if the PHY or the attached MAC have Wake-on-LAN
576 * enabled.
577 * @state: State of the PHY for management purposes
578 * @dev_flags: Device-specific flags used by the PHY driver.
579 *
580 * - Bits [15:0] are free to use by the PHY driver to communicate
581 * driver specific behavior.
582 * - Bits [23:16] are currently reserved for future use.
583 * - Bits [31:24] are reserved for defining generic
584 * PHY driver behavior.
585 * @irq: IRQ number of the PHY's interrupt (-1 if none)
586 * @phylink: Pointer to phylink instance for this PHY
587 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
588 * @sfp_bus: SFP bus attached to this PHY's fiber port
589 * @attached_dev: The attached enet driver's device instance ptr
590 * @adjust_link: Callback for the enet controller to respond to changes: in the
591 * link state.
592 * @phy_link_change: Callback for phylink for notification of link change
593 * @macsec_ops: MACsec offloading ops.
594 *
595 * @speed: Current link speed
596 * @duplex: Current duplex
597 * @port: Current port
598 * @pause: Current pause
599 * @asym_pause: Current asymmetric pause
600 * @supported: Combined MAC/PHY supported linkmodes
601 * @advertising: Currently advertised linkmodes
602 * @adv_old: Saved advertised while power saving for WoL
603 * @supported_eee: supported PHY EEE linkmodes
604 * @advertising_eee: Currently advertised EEE linkmodes
605 * @eee_enabled: Flag indicating whether the EEE feature is enabled
606 * @enable_tx_lpi: When True, MAC should transmit LPI to PHY
607 * @eee_cfg: User configuration of EEE
608 * @lp_advertising: Current link partner advertised linkmodes
609 * @host_interfaces: PHY interface modes supported by host
610 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
611 * @autoneg: Flag autoneg being used
612 * @rate_matching: Current rate matching mode
613 * @link: Current link state
614 * @autoneg_complete: Flag auto negotiation of the link has completed
615 * @mdix: Current crossover
616 * @mdix_ctrl: User setting of crossover
617 * @pma_extable: Cached value of PMA/PMD Extended Abilities Register
618 * @interrupts: Flag interrupts have been enabled
619 * @irq_suspended: Flag indicating PHY is suspended and therefore interrupt
620 * handling shall be postponed until PHY has resumed
621 * @irq_rerun: Flag indicating interrupts occurred while PHY was suspended,
622 * requiring a rerun of the interrupt handler after resume
623 * @default_timestamp: Flag indicating whether we are using the phy
624 * timestamp as the default one
625 * @interface: enum phy_interface_t value
626 * @possible_interfaces: bitmap if interface modes that the attached PHY
627 * will switch between depending on media speed.
628 * @skb: Netlink message for cable diagnostics
629 * @nest: Netlink nest used for cable diagnostics
630 * @ehdr: nNtlink header for cable diagnostics
631 * @phy_led_triggers: Array of LED triggers
632 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
633 * @led_link_trigger: LED trigger for link up/down
634 * @last_triggered: last LED trigger for link speed
635 * @leds: list of PHY LED structures
636 * @master_slave_set: User requested master/slave configuration
637 * @master_slave_get: Current master/slave advertisement
638 * @master_slave_state: Current master/slave configuration
639 * @mii_ts: Pointer to time stamper callbacks
640 * @psec: Pointer to Power Sourcing Equipment control struct
641 * @lock: Mutex for serialization access to PHY
642 * @state_queue: Work queue for state machine
643 * @link_down_events: Number of times link was lost
644 * @shared: Pointer to private data shared by phys in one package
645 * @priv: Pointer to driver private data
646 *
647 * interrupts currently only supports enabled or disabled,
648 * but could be changed in the future to support enabling
649 * and disabling specific interrupts
650 *
651 * Contains some infrastructure for polling and interrupt
652 * handling, as well as handling shifts in PHY hardware state
653 */
654 struct phy_device {
655 struct mdio_device mdio;
656
657 /* Information about the PHY type */
658 /* And management functions */
659 const struct phy_driver *drv;
660
661 struct device_link *devlink;
662
663 u32 phyindex;
664 u32 phy_id;
665
666 struct phy_c45_device_ids c45_ids;
667 unsigned is_c45:1;
668 unsigned is_internal:1;
669 unsigned is_pseudo_fixed_link:1;
670 unsigned is_gigabit_capable:1;
671 unsigned has_fixups:1;
672 unsigned suspended:1;
673 unsigned suspended_by_mdio_bus:1;
674 unsigned sysfs_links:1;
675 unsigned loopback_enabled:1;
676 unsigned downshifted_rate:1;
677 unsigned is_on_sfp_module:1;
678 unsigned mac_managed_pm:1;
679 unsigned wol_enabled:1;
680
681 unsigned autoneg:1;
682 /* The most recently read link state */
683 unsigned link:1;
684 unsigned autoneg_complete:1;
685
686 /* Interrupts are enabled */
687 unsigned interrupts:1;
688 unsigned irq_suspended:1;
689 unsigned irq_rerun:1;
690
691 unsigned default_timestamp:1;
692
693 int rate_matching;
694
695 enum phy_state state;
696
697 u32 dev_flags;
698
699 phy_interface_t interface;
700 DECLARE_PHY_INTERFACE_MASK(possible_interfaces);
701
702 /*
703 * forced speed & duplex (no autoneg)
704 * partner speed & duplex & pause (autoneg)
705 */
706 int speed;
707 int duplex;
708 int port;
709 int pause;
710 int asym_pause;
711 u8 master_slave_get;
712 u8 master_slave_set;
713 u8 master_slave_state;
714
715 /* Union of PHY and Attached devices' supported link modes */
716 /* See ethtool.h for more info */
717 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
718 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
719 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
720 /* used with phy_speed_down */
721 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
722 /* used for eee validation and configuration*/
723 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_eee);
724 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising_eee);
725 bool eee_enabled;
726
727 /* Host supported PHY interface types. Should be ignored if empty. */
728 DECLARE_PHY_INTERFACE_MASK(host_interfaces);
729
730 /* Energy efficient ethernet modes which should be prohibited */
731 u32 eee_broken_modes;
732 bool enable_tx_lpi;
733 struct eee_config eee_cfg;
734
735 #ifdef CONFIG_LED_TRIGGER_PHY
736 struct phy_led_trigger *phy_led_triggers;
737 unsigned int phy_num_led_triggers;
738 struct phy_led_trigger *last_triggered;
739
740 struct phy_led_trigger *led_link_trigger;
741 #endif
742 struct list_head leds;
743
744 /*
745 * Interrupt number for this PHY
746 * -1 means no interrupt
747 */
748 int irq;
749
750 /* private data pointer */
751 /* For use by PHYs to maintain extra state */
752 void *priv;
753
754 /* shared data pointer */
755 /* For use by PHYs inside the same package that need a shared state. */
756 struct phy_package_shared *shared;
757
758 /* Reporting cable test results */
759 struct sk_buff *skb;
760 void *ehdr;
761 struct nlattr *nest;
762
763 /* Interrupt and Polling infrastructure */
764 struct delayed_work state_queue;
765
766 struct mutex lock;
767
768 /* This may be modified under the rtnl lock */
769 bool sfp_bus_attached;
770 struct sfp_bus *sfp_bus;
771 struct phylink *phylink;
772 struct net_device *attached_dev;
773 struct mii_timestamper *mii_ts;
774 struct pse_control *psec;
775
776 u8 mdix;
777 u8 mdix_ctrl;
778
779 int pma_extable;
780
781 unsigned int link_down_events;
782
783 void (*phy_link_change)(struct phy_device *phydev, bool up);
784 void (*adjust_link)(struct net_device *dev);
785
786 #if IS_ENABLED(CONFIG_MACSEC)
787 /* MACsec management functions */
788 const struct macsec_ops *macsec_ops;
789 #endif
790
791 ANDROID_KABI_RESERVE(1);
792 ANDROID_KABI_RESERVE(2);
793 ANDROID_KABI_RESERVE(3);
794 ANDROID_KABI_RESERVE(4);
795 };
796
797 /* Generic phy_device::dev_flags */
798 #define PHY_F_NO_IRQ 0x80000000
799 #define PHY_F_RXC_ALWAYS_ON 0x40000000
800
801 #define to_phy_device(__dev) container_of_const(to_mdio_device(__dev), struct phy_device, mdio)
802
803 /**
804 * struct phy_tdr_config - Configuration of a TDR raw test
805 *
806 * @first: Distance for first data collection point
807 * @last: Distance for last data collection point
808 * @step: Step between data collection points
809 * @pair: Bitmap of cable pairs to collect data for
810 *
811 * A structure containing possible configuration parameters
812 * for a TDR cable test. The driver does not need to implement
813 * all the parameters, but should report what is actually used.
814 * All distances are in centimeters.
815 */
816 struct phy_tdr_config {
817 u32 first;
818 u32 last;
819 u32 step;
820 s8 pair;
821 };
822 #define PHY_PAIR_ALL -1
823
824 /**
825 * struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
826 * Avoidance) Reconciliation Sublayer.
827 *
828 * @version: read-only PLCA register map version. -1 = not available. Ignored
829 * when setting the configuration. Format is the same as reported by the PLCA
830 * IDVER register (31.CA00). -1 = not available.
831 * @enabled: PLCA configured mode (enabled/disabled). -1 = not available / don't
832 * set. 0 = disabled, anything else = enabled.
833 * @node_id: the PLCA local node identifier. -1 = not available / don't set.
834 * Allowed values [0 .. 254]. 255 = node disabled.
835 * @node_cnt: the PLCA node count (maximum number of nodes having a TO). Only
836 * meaningful for the coordinator (node_id = 0). -1 = not available / don't
837 * set. Allowed values [1 .. 255].
838 * @to_tmr: The value of the PLCA to_timer in bit-times, which determines the
839 * PLCA transmit opportunity window opening. See IEEE802.3 Clause 148 for
840 * more details. The to_timer shall be set equal over all nodes.
841 * -1 = not available / don't set. Allowed values [0 .. 255].
842 * @burst_cnt: controls how many additional frames a node is allowed to send in
843 * single transmit opportunity (TO). The default value of 0 means that the
844 * node is allowed exactly one frame per TO. A value of 1 allows two frames
845 * per TO, and so on. -1 = not available / don't set.
846 * Allowed values [0 .. 255].
847 * @burst_tmr: controls how many bit times to wait for the MAC to send a new
848 * frame before interrupting the burst. This value should be set to a value
849 * greater than the MAC inter-packet gap (which is typically 96 bits).
850 * -1 = not available / don't set. Allowed values [0 .. 255].
851 *
852 * A structure containing configuration parameters for setting/getting the PLCA
853 * RS configuration. The driver does not need to implement all the parameters,
854 * but should report what is actually used.
855 */
856 struct phy_plca_cfg {
857 int version;
858 int enabled;
859 int node_id;
860 int node_cnt;
861 int to_tmr;
862 int burst_cnt;
863 int burst_tmr;
864 };
865
866 /**
867 * struct phy_plca_status - Status of the PLCA (Physical Layer Collision
868 * Avoidance) Reconciliation Sublayer.
869 *
870 * @pst: The PLCA status as reported by the PST bit in the PLCA STATUS
871 * register(31.CA03), indicating BEACON activity.
872 *
873 * A structure containing status information of the PLCA RS configuration.
874 * The driver does not need to implement all the parameters, but should report
875 * what is actually used.
876 */
877 struct phy_plca_status {
878 bool pst;
879 };
880
881 /* Modes for PHY LED configuration */
882 enum phy_led_modes {
883 PHY_LED_ACTIVE_LOW = 0,
884 PHY_LED_INACTIVE_HIGH_IMPEDANCE = 1,
885
886 /* keep it last */
887 __PHY_LED_MODES_NUM,
888 };
889
890 /**
891 * struct phy_led: An LED driven by the PHY
892 *
893 * @list: List of LEDs
894 * @phydev: PHY this LED is attached to
895 * @led_cdev: Standard LED class structure
896 * @index: Number of the LED
897 */
898 struct phy_led {
899 struct list_head list;
900 struct phy_device *phydev;
901 struct led_classdev led_cdev;
902 u8 index;
903 };
904
905 #define to_phy_led(d) container_of(d, struct phy_led, led_cdev)
906
907 /**
908 * struct phy_driver - Driver structure for a particular PHY type
909 *
910 * @mdiodrv: Data common to all MDIO devices
911 * @phy_id: The result of reading the UID registers of this PHY
912 * type, and ANDing them with the phy_id_mask. This driver
913 * only works for PHYs with IDs which match this field
914 * @name: The friendly name of this PHY type
915 * @phy_id_mask: Defines the important bits of the phy_id
916 * @features: A mandatory list of features (speed, duplex, etc)
917 * supported by this PHY
918 * @flags: A bitfield defining certain other features this PHY
919 * supports (like interrupts)
920 * @driver_data: Static driver data
921 *
922 * All functions are optional. If config_aneg or read_status
923 * are not implemented, the phy core uses the genphy versions.
924 * Note that none of these functions should be called from
925 * interrupt time. The goal is for the bus read/write functions
926 * to be able to block when the bus transaction is happening,
927 * and be freed up by an interrupt (The MPC85xx has this ability,
928 * though it is not currently supported in the driver).
929 */
930 struct phy_driver {
931 struct mdio_driver_common mdiodrv;
932 u32 phy_id;
933 char *name;
934 u32 phy_id_mask;
935 const unsigned long * const features;
936 u32 flags;
937 const void *driver_data;
938
939 /**
940 * @soft_reset: Called to issue a PHY software reset
941 */
942 int (*soft_reset)(struct phy_device *phydev);
943
944 /**
945 * @config_init: Called to initialize the PHY,
946 * including after a reset
947 */
948 int (*config_init)(struct phy_device *phydev);
949
950 /**
951 * @probe: Called during discovery. Used to set
952 * up device-specific structures, if any
953 */
954 int (*probe)(struct phy_device *phydev);
955
956 /**
957 * @get_features: Probe the hardware to determine what
958 * abilities it has. Should only set phydev->supported.
959 */
960 int (*get_features)(struct phy_device *phydev);
961
962 /**
963 * @get_rate_matching: Get the supported type of rate matching for a
964 * particular phy interface. This is used by phy consumers to determine
965 * whether to advertise lower-speed modes for that interface. It is
966 * assumed that if a rate matching mode is supported on an interface,
967 * then that interface's rate can be adapted to all slower link speeds
968 * supported by the phy. If the interface is not supported, this should
969 * return %RATE_MATCH_NONE.
970 */
971 int (*get_rate_matching)(struct phy_device *phydev,
972 phy_interface_t iface);
973
974 /* PHY Power Management */
975 /** @suspend: Suspend the hardware, saving state if needed */
976 int (*suspend)(struct phy_device *phydev);
977 /** @resume: Resume the hardware, restoring state if needed */
978 int (*resume)(struct phy_device *phydev);
979
980 /**
981 * @config_aneg: Configures the advertisement and resets
982 * autonegotiation if phydev->autoneg is on,
983 * forces the speed to the current settings in phydev
984 * if phydev->autoneg is off
985 */
986 int (*config_aneg)(struct phy_device *phydev);
987
988 /** @aneg_done: Determines the auto negotiation result */
989 int (*aneg_done)(struct phy_device *phydev);
990
991 /** @read_status: Determines the negotiated speed and duplex */
992 int (*read_status)(struct phy_device *phydev);
993
994 /**
995 * @config_intr: Enables or disables interrupts.
996 * It should also clear any pending interrupts prior to enabling the
997 * IRQs and after disabling them.
998 */
999 int (*config_intr)(struct phy_device *phydev);
1000
1001 /** @handle_interrupt: Override default interrupt handling */
1002 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
1003
1004 /** @remove: Clears up any memory if needed */
1005 void (*remove)(struct phy_device *phydev);
1006
1007 /**
1008 * @match_phy_device: Returns true if this is a suitable
1009 * driver for the given phydev. If NULL, matching is based on
1010 * phy_id and phy_id_mask.
1011 */
1012 int (*match_phy_device)(struct phy_device *phydev);
1013
1014 /**
1015 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
1016 * register changes to enable Wake on LAN, so set_wol is
1017 * provided to be called in the ethernet driver's set_wol
1018 * function.
1019 */
1020 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
1021
1022 /**
1023 * @get_wol: See set_wol, but for checking whether Wake on LAN
1024 * is enabled.
1025 */
1026 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
1027
1028 /**
1029 * @link_change_notify: Called to inform a PHY device driver
1030 * when the core is about to change the link state. This
1031 * callback is supposed to be used as fixup hook for drivers
1032 * that need to take action when the link state
1033 * changes. Drivers are by no means allowed to mess with the
1034 * PHY device structure in their implementations.
1035 */
1036 void (*link_change_notify)(struct phy_device *dev);
1037
1038 /**
1039 * @read_mmd: PHY specific driver override for reading a MMD
1040 * register. This function is optional for PHY specific
1041 * drivers. When not provided, the default MMD read function
1042 * will be used by phy_read_mmd(), which will use either a
1043 * direct read for Clause 45 PHYs or an indirect read for
1044 * Clause 22 PHYs. devnum is the MMD device number within the
1045 * PHY device, regnum is the register within the selected MMD
1046 * device.
1047 */
1048 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
1049
1050 /**
1051 * @write_mmd: PHY specific driver override for writing a MMD
1052 * register. This function is optional for PHY specific
1053 * drivers. When not provided, the default MMD write function
1054 * will be used by phy_write_mmd(), which will use either a
1055 * direct write for Clause 45 PHYs, or an indirect write for
1056 * Clause 22 PHYs. devnum is the MMD device number within the
1057 * PHY device, regnum is the register within the selected MMD
1058 * device. val is the value to be written.
1059 */
1060 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
1061 u16 val);
1062
1063 /** @read_page: Return the current PHY register page number */
1064 int (*read_page)(struct phy_device *dev);
1065 /** @write_page: Set the current PHY register page number */
1066 int (*write_page)(struct phy_device *dev, int page);
1067
1068 /**
1069 * @module_info: Get the size and type of the eeprom contained
1070 * within a plug-in module
1071 */
1072 int (*module_info)(struct phy_device *dev,
1073 struct ethtool_modinfo *modinfo);
1074
1075 /**
1076 * @module_eeprom: Get the eeprom information from the plug-in
1077 * module
1078 */
1079 int (*module_eeprom)(struct phy_device *dev,
1080 struct ethtool_eeprom *ee, u8 *data);
1081
1082 /** @cable_test_start: Start a cable test */
1083 int (*cable_test_start)(struct phy_device *dev);
1084
1085 /** @cable_test_tdr_start: Start a raw TDR cable test */
1086 int (*cable_test_tdr_start)(struct phy_device *dev,
1087 const struct phy_tdr_config *config);
1088
1089 /**
1090 * @cable_test_get_status: Once per second, or on interrupt,
1091 * request the status of the test.
1092 */
1093 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
1094
1095 /* Get statistics from the PHY using ethtool */
1096 /**
1097 * @get_phy_stats: Retrieve PHY statistics.
1098 * @dev: The PHY device for which the statistics are retrieved.
1099 * @eth_stats: structure where Ethernet PHY stats will be stored.
1100 * @stats: structure where additional PHY-specific stats will be stored.
1101 *
1102 * Retrieves the supported PHY statistics and populates the provided
1103 * structures. The input structures are pre-initialized with
1104 * `ETHTOOL_STAT_NOT_SET`, and the driver must only modify members
1105 * corresponding to supported statistics. Unmodified members will remain
1106 * set to `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace.
1107 */
1108 void (*get_phy_stats)(struct phy_device *dev,
1109 struct ethtool_eth_phy_stats *eth_stats,
1110 struct ethtool_phy_stats *stats);
1111
1112 /**
1113 * @get_link_stats: Retrieve link statistics.
1114 * @dev: The PHY device for which the statistics are retrieved.
1115 * @link_stats: structure where link-specific stats will be stored.
1116 *
1117 * Retrieves link-related statistics for the given PHY device. The input
1118 * structure is pre-initialized with `ETHTOOL_STAT_NOT_SET`, and the
1119 * driver must only modify members corresponding to supported
1120 * statistics. Unmodified members will remain set to
1121 * `ETHTOOL_STAT_NOT_SET` and will not be returned to userspace.
1122 */
1123 void (*get_link_stats)(struct phy_device *dev,
1124 struct ethtool_link_ext_stats *link_stats);
1125 /** @get_sset_count: Number of statistic counters */
1126 int (*get_sset_count)(struct phy_device *dev);
1127 /** @get_strings: Names of the statistic counters */
1128 void (*get_strings)(struct phy_device *dev, u8 *data);
1129 /** @get_stats: Return the statistic counter values */
1130 void (*get_stats)(struct phy_device *dev,
1131 struct ethtool_stats *stats, u64 *data);
1132
1133 /* Get and Set PHY tunables */
1134 /** @get_tunable: Return the value of a tunable */
1135 int (*get_tunable)(struct phy_device *dev,
1136 struct ethtool_tunable *tuna, void *data);
1137 /** @set_tunable: Set the value of a tunable */
1138 int (*set_tunable)(struct phy_device *dev,
1139 struct ethtool_tunable *tuna,
1140 const void *data);
1141 /** @set_loopback: Set the loopback mood of the PHY */
1142 int (*set_loopback)(struct phy_device *dev, bool enable);
1143 /** @get_sqi: Get the signal quality indication */
1144 int (*get_sqi)(struct phy_device *dev);
1145 /** @get_sqi_max: Get the maximum signal quality indication */
1146 int (*get_sqi_max)(struct phy_device *dev);
1147
1148 /* PLCA RS interface */
1149 /** @get_plca_cfg: Return the current PLCA configuration */
1150 int (*get_plca_cfg)(struct phy_device *dev,
1151 struct phy_plca_cfg *plca_cfg);
1152 /** @set_plca_cfg: Set the PLCA configuration */
1153 int (*set_plca_cfg)(struct phy_device *dev,
1154 const struct phy_plca_cfg *plca_cfg);
1155 /** @get_plca_status: Return the current PLCA status info */
1156 int (*get_plca_status)(struct phy_device *dev,
1157 struct phy_plca_status *plca_st);
1158
1159 /**
1160 * @led_brightness_set: Set a PHY LED brightness. Index
1161 * indicates which of the PHYs led should be set. Value
1162 * follows the standard LED class meaning, e.g. LED_OFF,
1163 * LED_HALF, LED_FULL.
1164 */
1165 int (*led_brightness_set)(struct phy_device *dev,
1166 u8 index, enum led_brightness value);
1167
1168 /**
1169 * @led_blink_set: Set a PHY LED blinking. Index indicates
1170 * which of the PHYs led should be configured to blink. Delays
1171 * are in milliseconds and if both are zero then a sensible
1172 * default should be chosen. The call should adjust the
1173 * timings in that case and if it can't match the values
1174 * specified exactly.
1175 */
1176 int (*led_blink_set)(struct phy_device *dev, u8 index,
1177 unsigned long *delay_on,
1178 unsigned long *delay_off);
1179 /**
1180 * @led_hw_is_supported: Can the HW support the given rules.
1181 * @dev: PHY device which has the LED
1182 * @index: Which LED of the PHY device
1183 * @rules The core is interested in these rules
1184 *
1185 * Return 0 if yes, -EOPNOTSUPP if not, or an error code.
1186 */
1187 int (*led_hw_is_supported)(struct phy_device *dev, u8 index,
1188 unsigned long rules);
1189 /**
1190 * @led_hw_control_set: Set the HW to control the LED
1191 * @dev: PHY device which has the LED
1192 * @index: Which LED of the PHY device
1193 * @rules The rules used to control the LED
1194 *
1195 * Returns 0, or a an error code.
1196 */
1197 int (*led_hw_control_set)(struct phy_device *dev, u8 index,
1198 unsigned long rules);
1199 /**
1200 * @led_hw_control_get: Get how the HW is controlling the LED
1201 * @dev: PHY device which has the LED
1202 * @index: Which LED of the PHY device
1203 * @rules Pointer to the rules used to control the LED
1204 *
1205 * Set *@rules to how the HW is currently blinking. Returns 0
1206 * on success, or a error code if the current blinking cannot
1207 * be represented in rules, or some other error happens.
1208 */
1209 int (*led_hw_control_get)(struct phy_device *dev, u8 index,
1210 unsigned long *rules);
1211
1212 /**
1213 * @led_polarity_set: Set the LED polarity modes
1214 * @dev: PHY device which has the LED
1215 * @index: Which LED of the PHY device
1216 * @modes: bitmap of LED polarity modes
1217 *
1218 * Configure LED with all the required polarity modes in @modes
1219 * to make it correctly turn ON or OFF.
1220 *
1221 * Returns 0, or an error code.
1222 */
1223 int (*led_polarity_set)(struct phy_device *dev, int index,
1224 unsigned long modes);
1225
1226 ANDROID_KABI_RESERVE(1);
1227 ANDROID_KABI_RESERVE(2);
1228 };
1229 #define to_phy_driver(d) container_of_const(to_mdio_common_driver(d), \
1230 struct phy_driver, mdiodrv)
1231
1232 #define PHY_ANY_ID "MATCH ANY PHY"
1233 #define PHY_ANY_UID 0xffffffff
1234
1235 #define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
1236 #define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
1237 #define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
1238
1239 /**
1240 * phy_id_compare - compare @id1 with @id2 taking account of @mask
1241 * @id1: first PHY ID
1242 * @id2: second PHY ID
1243 * @mask: the PHY ID mask, set bits are significant in matching
1244 *
1245 * Return true if the bits from @id1 and @id2 specified by @mask match.
1246 * This uses an equivalent test to (@id & @mask) == (@phy_id & @mask).
1247 */
phy_id_compare(u32 id1,u32 id2,u32 mask)1248 static inline bool phy_id_compare(u32 id1, u32 id2, u32 mask)
1249 {
1250 return !((id1 ^ id2) & mask);
1251 }
1252
1253 /**
1254 * phydev_id_compare - compare @id with the PHY's Clause 22 ID
1255 * @phydev: the PHY device
1256 * @id: the PHY ID to be matched
1257 *
1258 * Compare the @phydev clause 22 ID with the provided @id and return true or
1259 * false depending whether it matches, using the bound driver mask. The
1260 * @phydev must be bound to a driver.
1261 */
phydev_id_compare(struct phy_device * phydev,u32 id)1262 static inline bool phydev_id_compare(struct phy_device *phydev, u32 id)
1263 {
1264 return phy_id_compare(id, phydev->phy_id, phydev->drv->phy_id_mask);
1265 }
1266
1267 /* A Structure for boards to register fixups with the PHY Lib */
1268 struct phy_fixup {
1269 struct list_head list;
1270 char bus_id[MII_BUS_ID_SIZE + 3];
1271 u32 phy_uid;
1272 u32 phy_uid_mask;
1273 int (*run)(struct phy_device *phydev);
1274 };
1275
1276 const char *phy_speed_to_str(int speed);
1277 const char *phy_duplex_to_str(unsigned int duplex);
1278 const char *phy_rate_matching_to_str(int rate_matching);
1279
1280 int phy_interface_num_ports(phy_interface_t interface);
1281
1282 /* A structure for mapping a particular speed and duplex
1283 * combination to a particular SUPPORTED and ADVERTISED value
1284 */
1285 struct phy_setting {
1286 u32 speed;
1287 u8 duplex;
1288 u8 bit;
1289 };
1290
1291 const struct phy_setting *
1292 phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
1293 bool exact);
1294 size_t phy_speeds(unsigned int *speeds, size_t size,
1295 unsigned long *mask);
1296 void of_set_phy_supported(struct phy_device *phydev);
1297 void of_set_phy_eee_broken(struct phy_device *phydev);
1298 int phy_speed_down_core(struct phy_device *phydev);
1299
1300 /**
1301 * phy_is_started - Convenience function to check whether PHY is started
1302 * @phydev: The phy_device struct
1303 */
phy_is_started(struct phy_device * phydev)1304 static inline bool phy_is_started(struct phy_device *phydev)
1305 {
1306 return phydev->state >= PHY_UP;
1307 }
1308
1309 void phy_resolve_aneg_pause(struct phy_device *phydev);
1310 void phy_resolve_aneg_linkmode(struct phy_device *phydev);
1311 void phy_check_downshift(struct phy_device *phydev);
1312
1313 /**
1314 * phy_read - Convenience function for reading a given PHY register
1315 * @phydev: the phy_device struct
1316 * @regnum: register number to read
1317 *
1318 * NOTE: MUST NOT be called from interrupt context,
1319 * because the bus read/write functions may wait for an interrupt
1320 * to conclude the operation.
1321 */
phy_read(struct phy_device * phydev,u32 regnum)1322 static inline int phy_read(struct phy_device *phydev, u32 regnum)
1323 {
1324 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1325 }
1326
1327 #define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
1328 timeout_us, sleep_before_read) \
1329 ({ \
1330 int __ret, __val; \
1331 __ret = read_poll_timeout(__val = phy_read, val, \
1332 __val < 0 || (cond), \
1333 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
1334 if (__val < 0) \
1335 __ret = __val; \
1336 if (__ret) \
1337 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1338 __ret; \
1339 })
1340
1341 /**
1342 * __phy_read - convenience function for reading a given PHY register
1343 * @phydev: the phy_device struct
1344 * @regnum: register number to read
1345 *
1346 * The caller must have taken the MDIO bus lock.
1347 */
__phy_read(struct phy_device * phydev,u32 regnum)1348 static inline int __phy_read(struct phy_device *phydev, u32 regnum)
1349 {
1350 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
1351 }
1352
1353 /**
1354 * phy_write - Convenience function for writing a given PHY register
1355 * @phydev: the phy_device struct
1356 * @regnum: register number to write
1357 * @val: value to write to @regnum
1358 *
1359 * NOTE: MUST NOT be called from interrupt context,
1360 * because the bus read/write functions may wait for an interrupt
1361 * to conclude the operation.
1362 */
phy_write(struct phy_device * phydev,u32 regnum,u16 val)1363 static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1364 {
1365 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
1366 }
1367
1368 /**
1369 * __phy_write - Convenience function for writing a given PHY register
1370 * @phydev: the phy_device struct
1371 * @regnum: register number to write
1372 * @val: value to write to @regnum
1373 *
1374 * The caller must have taken the MDIO bus lock.
1375 */
__phy_write(struct phy_device * phydev,u32 regnum,u16 val)1376 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1377 {
1378 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1379 val);
1380 }
1381
1382 /**
1383 * __phy_modify_changed() - Convenience function for modifying a PHY register
1384 * @phydev: a pointer to a &struct phy_device
1385 * @regnum: register number
1386 * @mask: bit mask of bits to clear
1387 * @set: bit mask of bits to set
1388 *
1389 * Unlocked helper function which allows a PHY register to be modified as
1390 * new register value = (old register value & ~mask) | set
1391 *
1392 * Returns negative errno, 0 if there was no change, and 1 in case of change
1393 */
__phy_modify_changed(struct phy_device * phydev,u32 regnum,u16 mask,u16 set)1394 static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1395 u16 mask, u16 set)
1396 {
1397 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1398 regnum, mask, set);
1399 }
1400
1401 /*
1402 * phy_read_mmd - Convenience function for reading a register
1403 * from an MMD on a given PHY.
1404 */
1405 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1406
1407 /**
1408 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1409 * condition is met or a timeout occurs
1410 *
1411 * @phydev: The phy_device struct
1412 * @devaddr: The MMD to read from
1413 * @regnum: The register on the MMD to read
1414 * @val: Variable to read the register into
1415 * @cond: Break condition (usually involving @val)
1416 * @sleep_us: Maximum time to sleep between reads in us (0
1417 * tight-loops). Should be less than ~20ms since usleep_range
1418 * is used (see Documentation/timers/timers-howto.rst).
1419 * @timeout_us: Timeout in us, 0 means never timeout
1420 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1421 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1422 * case, the last read value at @args is stored in @val. Must not
1423 * be called from atomic context if sleep_us or timeout_us are used.
1424 */
1425 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1426 sleep_us, timeout_us, sleep_before_read) \
1427 ({ \
1428 int __ret, __val; \
1429 __ret = read_poll_timeout(__val = phy_read_mmd, val, \
1430 __val < 0 || (cond), \
1431 sleep_us, timeout_us, sleep_before_read, \
1432 phydev, devaddr, regnum); \
1433 if (__val < 0) \
1434 __ret = __val; \
1435 if (__ret) \
1436 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1437 __ret; \
1438 })
1439
1440 /*
1441 * __phy_read_mmd - Convenience function for reading a register
1442 * from an MMD on a given PHY.
1443 */
1444 int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1445
1446 /*
1447 * phy_write_mmd - Convenience function for writing a register
1448 * on an MMD on a given PHY.
1449 */
1450 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1451
1452 /*
1453 * __phy_write_mmd - Convenience function for writing a register
1454 * on an MMD on a given PHY.
1455 */
1456 int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1457
1458 int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1459 u16 set);
1460 int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1461 u16 set);
1462 int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1463 int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1464
1465 int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1466 u16 mask, u16 set);
1467 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1468 u16 mask, u16 set);
1469 int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1470 u16 mask, u16 set);
1471 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1472 u16 mask, u16 set);
1473
1474 /**
1475 * __phy_set_bits - Convenience function for setting bits in a PHY register
1476 * @phydev: the phy_device struct
1477 * @regnum: register number to write
1478 * @val: bits to set
1479 *
1480 * The caller must have taken the MDIO bus lock.
1481 */
__phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1482 static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1483 {
1484 return __phy_modify(phydev, regnum, 0, val);
1485 }
1486
1487 /**
1488 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1489 * @phydev: the phy_device struct
1490 * @regnum: register number to write
1491 * @val: bits to clear
1492 *
1493 * The caller must have taken the MDIO bus lock.
1494 */
__phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1495 static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1496 u16 val)
1497 {
1498 return __phy_modify(phydev, regnum, val, 0);
1499 }
1500
1501 /**
1502 * phy_set_bits - Convenience function for setting bits in a PHY register
1503 * @phydev: the phy_device struct
1504 * @regnum: register number to write
1505 * @val: bits to set
1506 */
phy_set_bits(struct phy_device * phydev,u32 regnum,u16 val)1507 static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1508 {
1509 return phy_modify(phydev, regnum, 0, val);
1510 }
1511
1512 /**
1513 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1514 * @phydev: the phy_device struct
1515 * @regnum: register number to write
1516 * @val: bits to clear
1517 */
phy_clear_bits(struct phy_device * phydev,u32 regnum,u16 val)1518 static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1519 {
1520 return phy_modify(phydev, regnum, val, 0);
1521 }
1522
1523 /**
1524 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1525 * on MMD
1526 * @phydev: the phy_device struct
1527 * @devad: the MMD containing register to modify
1528 * @regnum: register number to modify
1529 * @val: bits to set
1530 *
1531 * The caller must have taken the MDIO bus lock.
1532 */
__phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1533 static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1534 u32 regnum, u16 val)
1535 {
1536 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1537 }
1538
1539 /**
1540 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1541 * on MMD
1542 * @phydev: the phy_device struct
1543 * @devad: the MMD containing register to modify
1544 * @regnum: register number to modify
1545 * @val: bits to clear
1546 *
1547 * The caller must have taken the MDIO bus lock.
1548 */
__phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1549 static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1550 u32 regnum, u16 val)
1551 {
1552 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1553 }
1554
1555 /**
1556 * phy_set_bits_mmd - Convenience function for setting bits in a register
1557 * on MMD
1558 * @phydev: the phy_device struct
1559 * @devad: the MMD containing register to modify
1560 * @regnum: register number to modify
1561 * @val: bits to set
1562 */
phy_set_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1563 static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1564 u32 regnum, u16 val)
1565 {
1566 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1567 }
1568
1569 /**
1570 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1571 * on MMD
1572 * @phydev: the phy_device struct
1573 * @devad: the MMD containing register to modify
1574 * @regnum: register number to modify
1575 * @val: bits to clear
1576 */
phy_clear_bits_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)1577 static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1578 u32 regnum, u16 val)
1579 {
1580 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1581 }
1582
1583 /**
1584 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1585 * @phydev: the phy_device struct
1586 *
1587 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1588 * PHY_MAC_INTERRUPT
1589 */
phy_interrupt_is_valid(struct phy_device * phydev)1590 static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1591 {
1592 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT;
1593 }
1594
1595 /**
1596 * phy_polling_mode - Convenience function for testing whether polling is
1597 * used to detect PHY status changes
1598 * @phydev: the phy_device struct
1599 */
phy_polling_mode(struct phy_device * phydev)1600 static inline bool phy_polling_mode(struct phy_device *phydev)
1601 {
1602 if (phydev->state == PHY_CABLETEST)
1603 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1604 return true;
1605
1606 return phydev->irq == PHY_POLL;
1607 }
1608
1609 /**
1610 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1611 * @phydev: the phy_device struct
1612 */
phy_has_hwtstamp(struct phy_device * phydev)1613 static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1614 {
1615 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1616 }
1617
1618 /**
1619 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1620 * @phydev: the phy_device struct
1621 */
phy_has_rxtstamp(struct phy_device * phydev)1622 static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1623 {
1624 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1625 }
1626
1627 /**
1628 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1629 * PTP hardware clock capabilities.
1630 * @phydev: the phy_device struct
1631 */
phy_has_tsinfo(struct phy_device * phydev)1632 static inline bool phy_has_tsinfo(struct phy_device *phydev)
1633 {
1634 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1635 }
1636
1637 /**
1638 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1639 * @phydev: the phy_device struct
1640 */
phy_has_txtstamp(struct phy_device * phydev)1641 static inline bool phy_has_txtstamp(struct phy_device *phydev)
1642 {
1643 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1644 }
1645
phy_hwtstamp(struct phy_device * phydev,struct kernel_hwtstamp_config * cfg,struct netlink_ext_ack * extack)1646 static inline int phy_hwtstamp(struct phy_device *phydev,
1647 struct kernel_hwtstamp_config *cfg,
1648 struct netlink_ext_ack *extack)
1649 {
1650 return phydev->mii_ts->hwtstamp(phydev->mii_ts, cfg, extack);
1651 }
1652
phy_rxtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1653 static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1654 int type)
1655 {
1656 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1657 }
1658
phy_ts_info(struct phy_device * phydev,struct kernel_ethtool_ts_info * tsinfo)1659 static inline int phy_ts_info(struct phy_device *phydev,
1660 struct kernel_ethtool_ts_info *tsinfo)
1661 {
1662 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1663 }
1664
phy_txtstamp(struct phy_device * phydev,struct sk_buff * skb,int type)1665 static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1666 int type)
1667 {
1668 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1669 }
1670
1671 /**
1672 * phy_is_default_hwtstamp - Is the PHY hwtstamp the default timestamp
1673 * @phydev: Pointer to phy_device
1674 *
1675 * This is used to get default timestamping device taking into account
1676 * the new API choice, which is selecting the timestamping from MAC by
1677 * default if the phydev does not have default_timestamp flag enabled.
1678 *
1679 * Return: True if phy is the default hw timestamp, false otherwise.
1680 */
phy_is_default_hwtstamp(struct phy_device * phydev)1681 static inline bool phy_is_default_hwtstamp(struct phy_device *phydev)
1682 {
1683 return phy_has_hwtstamp(phydev) && phydev->default_timestamp;
1684 }
1685
1686 /**
1687 * phy_is_internal - Convenience function for testing if a PHY is internal
1688 * @phydev: the phy_device struct
1689 */
phy_is_internal(struct phy_device * phydev)1690 static inline bool phy_is_internal(struct phy_device *phydev)
1691 {
1692 return phydev->is_internal;
1693 }
1694
1695 /**
1696 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module
1697 * @phydev: the phy_device struct
1698 */
phy_on_sfp(struct phy_device * phydev)1699 static inline bool phy_on_sfp(struct phy_device *phydev)
1700 {
1701 return phydev->is_on_sfp_module;
1702 }
1703
1704 /**
1705 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1706 * PHY interface mode is RGMII (all variants)
1707 * @mode: the &phy_interface_t enum
1708 */
phy_interface_mode_is_rgmii(phy_interface_t mode)1709 static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1710 {
1711 return mode >= PHY_INTERFACE_MODE_RGMII &&
1712 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1713 };
1714
1715 /**
1716 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1717 * negotiation
1718 * @mode: one of &enum phy_interface_t
1719 *
1720 * Returns true if the PHY interface mode uses the 16-bit negotiation
1721 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1722 */
phy_interface_mode_is_8023z(phy_interface_t mode)1723 static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1724 {
1725 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1726 mode == PHY_INTERFACE_MODE_2500BASEX;
1727 }
1728
1729 /**
1730 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1731 * is RGMII (all variants)
1732 * @phydev: the phy_device struct
1733 */
phy_interface_is_rgmii(struct phy_device * phydev)1734 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1735 {
1736 return phy_interface_mode_is_rgmii(phydev->interface);
1737 };
1738
1739 /**
1740 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1741 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1742 * @phydev: the phy_device struct
1743 */
phy_is_pseudo_fixed_link(struct phy_device * phydev)1744 static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1745 {
1746 return phydev->is_pseudo_fixed_link;
1747 }
1748
1749 int phy_save_page(struct phy_device *phydev);
1750 int phy_select_page(struct phy_device *phydev, int page);
1751 int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1752 int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1753 int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1754 int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1755 u16 mask, u16 set);
1756 int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1757 u16 mask, u16 set);
1758
1759 struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1760 bool is_c45,
1761 struct phy_c45_device_ids *c45_ids);
1762 #if IS_ENABLED(CONFIG_PHYLIB)
1763 int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id);
1764 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode);
1765 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode);
1766 struct phy_device *device_phy_find_device(struct device *dev);
1767 struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode);
1768 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1769 int phy_device_register(struct phy_device *phy);
1770 void phy_device_free(struct phy_device *phydev);
1771 #else
fwnode_get_phy_id(struct fwnode_handle * fwnode,u32 * phy_id)1772 static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id)
1773 {
1774 return 0;
1775 }
1776 static inline
fwnode_mdio_find_device(struct fwnode_handle * fwnode)1777 struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode)
1778 {
1779 return 0;
1780 }
1781
1782 static inline
fwnode_phy_find_device(struct fwnode_handle * phy_fwnode)1783 struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)
1784 {
1785 return NULL;
1786 }
1787
device_phy_find_device(struct device * dev)1788 static inline struct phy_device *device_phy_find_device(struct device *dev)
1789 {
1790 return NULL;
1791 }
1792
1793 static inline
fwnode_get_phy_node(struct fwnode_handle * fwnode)1794 struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode)
1795 {
1796 return NULL;
1797 }
1798
1799 static inline
get_phy_device(struct mii_bus * bus,int addr,bool is_c45)1800 struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1801 {
1802 return NULL;
1803 }
1804
phy_device_register(struct phy_device * phy)1805 static inline int phy_device_register(struct phy_device *phy)
1806 {
1807 return 0;
1808 }
1809
phy_device_free(struct phy_device * phydev)1810 static inline void phy_device_free(struct phy_device *phydev) { }
1811 #endif /* CONFIG_PHYLIB */
1812 void phy_device_remove(struct phy_device *phydev);
1813 int phy_get_c45_ids(struct phy_device *phydev);
1814 int phy_init_hw(struct phy_device *phydev);
1815 int phy_suspend(struct phy_device *phydev);
1816 int phy_resume(struct phy_device *phydev);
1817 int __phy_resume(struct phy_device *phydev);
1818 int phy_loopback(struct phy_device *phydev, bool enable);
1819 int phy_sfp_connect_phy(void *upstream, struct phy_device *phy);
1820 void phy_sfp_disconnect_phy(void *upstream, struct phy_device *phy);
1821 void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1822 void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1823 int phy_sfp_probe(struct phy_device *phydev,
1824 const struct sfp_upstream_ops *ops);
1825 struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1826 phy_interface_t interface);
1827 struct phy_device *phy_find_first(struct mii_bus *bus);
1828 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1829 u32 flags, phy_interface_t interface);
1830 int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1831 void (*handler)(struct net_device *),
1832 phy_interface_t interface);
1833 struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1834 void (*handler)(struct net_device *),
1835 phy_interface_t interface);
1836 void phy_disconnect(struct phy_device *phydev);
1837 void phy_detach(struct phy_device *phydev);
1838 void phy_start(struct phy_device *phydev);
1839 void phy_stop(struct phy_device *phydev);
1840 int phy_config_aneg(struct phy_device *phydev);
1841 int _phy_start_aneg(struct phy_device *phydev);
1842 int phy_start_aneg(struct phy_device *phydev);
1843 int phy_aneg_done(struct phy_device *phydev);
1844 int phy_speed_down(struct phy_device *phydev, bool sync);
1845 int phy_speed_up(struct phy_device *phydev);
1846 bool phy_check_valid(int speed, int duplex, unsigned long *features);
1847
1848 int phy_restart_aneg(struct phy_device *phydev);
1849 int phy_reset_after_clk_enable(struct phy_device *phydev);
1850
1851 #if IS_ENABLED(CONFIG_PHYLIB)
1852 int phy_start_cable_test(struct phy_device *phydev,
1853 struct netlink_ext_ack *extack);
1854 int phy_start_cable_test_tdr(struct phy_device *phydev,
1855 struct netlink_ext_ack *extack,
1856 const struct phy_tdr_config *config);
1857 #else
1858 static inline
phy_start_cable_test(struct phy_device * phydev,struct netlink_ext_ack * extack)1859 int phy_start_cable_test(struct phy_device *phydev,
1860 struct netlink_ext_ack *extack)
1861 {
1862 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1863 return -EOPNOTSUPP;
1864 }
1865 static inline
phy_start_cable_test_tdr(struct phy_device * phydev,struct netlink_ext_ack * extack,const struct phy_tdr_config * config)1866 int phy_start_cable_test_tdr(struct phy_device *phydev,
1867 struct netlink_ext_ack *extack,
1868 const struct phy_tdr_config *config)
1869 {
1870 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1871 return -EOPNOTSUPP;
1872 }
1873 #endif
1874
phy_device_reset(struct phy_device * phydev,int value)1875 static inline void phy_device_reset(struct phy_device *phydev, int value)
1876 {
1877 mdio_device_reset(&phydev->mdio, value);
1878 }
1879
1880 #define phydev_err(_phydev, format, args...) \
1881 dev_err(&_phydev->mdio.dev, format, ##args)
1882
1883 #define phydev_err_probe(_phydev, err, format, args...) \
1884 dev_err_probe(&_phydev->mdio.dev, err, format, ##args)
1885
1886 #define phydev_info(_phydev, format, args...) \
1887 dev_info(&_phydev->mdio.dev, format, ##args)
1888
1889 #define phydev_warn(_phydev, format, args...) \
1890 dev_warn(&_phydev->mdio.dev, format, ##args)
1891
1892 #define phydev_dbg(_phydev, format, args...) \
1893 dev_dbg(&_phydev->mdio.dev, format, ##args)
1894
phydev_name(const struct phy_device * phydev)1895 static inline const char *phydev_name(const struct phy_device *phydev)
1896 {
1897 return dev_name(&phydev->mdio.dev);
1898 }
1899
phy_lock_mdio_bus(struct phy_device * phydev)1900 static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1901 {
1902 mutex_lock(&phydev->mdio.bus->mdio_lock);
1903 }
1904
phy_unlock_mdio_bus(struct phy_device * phydev)1905 static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1906 {
1907 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1908 }
1909
1910 void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1911 __printf(2, 3);
1912 char *phy_attached_info_irq(struct phy_device *phydev)
1913 __malloc;
1914 void phy_attached_info(struct phy_device *phydev);
1915
1916 /* Clause 22 PHY */
1917 int genphy_read_abilities(struct phy_device *phydev);
1918 int genphy_setup_forced(struct phy_device *phydev);
1919 int genphy_restart_aneg(struct phy_device *phydev);
1920 int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1921 int genphy_config_eee_advert(struct phy_device *phydev);
1922 int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1923 int genphy_aneg_done(struct phy_device *phydev);
1924 int genphy_update_link(struct phy_device *phydev);
1925 int genphy_read_lpa(struct phy_device *phydev);
1926 int genphy_read_status_fixed(struct phy_device *phydev);
1927 int genphy_read_status(struct phy_device *phydev);
1928 int genphy_read_master_slave(struct phy_device *phydev);
1929 int genphy_suspend(struct phy_device *phydev);
1930 int genphy_resume(struct phy_device *phydev);
1931 int genphy_loopback(struct phy_device *phydev, bool enable);
1932 int genphy_soft_reset(struct phy_device *phydev);
1933 irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev);
1934
genphy_config_aneg(struct phy_device * phydev)1935 static inline int genphy_config_aneg(struct phy_device *phydev)
1936 {
1937 return __genphy_config_aneg(phydev, false);
1938 }
1939
genphy_no_config_intr(struct phy_device * phydev)1940 static inline int genphy_no_config_intr(struct phy_device *phydev)
1941 {
1942 return 0;
1943 }
1944 int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1945 u16 regnum);
1946 int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1947 u16 regnum, u16 val);
1948
1949 /* Clause 37 */
1950 int genphy_c37_config_aneg(struct phy_device *phydev);
1951 int genphy_c37_read_status(struct phy_device *phydev, bool *changed);
1952
1953 /* Clause 45 PHY */
1954 int genphy_c45_restart_aneg(struct phy_device *phydev);
1955 int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1956 int genphy_c45_aneg_done(struct phy_device *phydev);
1957 int genphy_c45_read_link(struct phy_device *phydev);
1958 int genphy_c45_read_lpa(struct phy_device *phydev);
1959 int genphy_c45_read_pma(struct phy_device *phydev);
1960 int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1961 int genphy_c45_pma_baset1_setup_master_slave(struct phy_device *phydev);
1962 int genphy_c45_an_config_aneg(struct phy_device *phydev);
1963 int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1964 int genphy_c45_read_mdix(struct phy_device *phydev);
1965 int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1966 int genphy_c45_pma_read_ext_abilities(struct phy_device *phydev);
1967 int genphy_c45_pma_baset1_read_abilities(struct phy_device *phydev);
1968 int genphy_c45_read_eee_abilities(struct phy_device *phydev);
1969 int genphy_c45_pma_baset1_read_master_slave(struct phy_device *phydev);
1970 int genphy_c45_read_status(struct phy_device *phydev);
1971 int genphy_c45_baset1_read_status(struct phy_device *phydev);
1972 int genphy_c45_config_aneg(struct phy_device *phydev);
1973 int genphy_c45_loopback(struct phy_device *phydev, bool enable);
1974 int genphy_c45_pma_resume(struct phy_device *phydev);
1975 int genphy_c45_pma_suspend(struct phy_device *phydev);
1976 int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable);
1977 int genphy_c45_plca_get_cfg(struct phy_device *phydev,
1978 struct phy_plca_cfg *plca_cfg);
1979 int genphy_c45_plca_set_cfg(struct phy_device *phydev,
1980 const struct phy_plca_cfg *plca_cfg);
1981 int genphy_c45_plca_get_status(struct phy_device *phydev,
1982 struct phy_plca_status *plca_st);
1983 int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv,
1984 unsigned long *lp, bool *is_enabled);
1985 int genphy_c45_ethtool_get_eee(struct phy_device *phydev,
1986 struct ethtool_keee *data);
1987 int genphy_c45_ethtool_set_eee(struct phy_device *phydev,
1988 struct ethtool_keee *data);
1989 int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv);
1990 int genphy_c45_an_config_eee_aneg(struct phy_device *phydev);
1991 int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv);
1992
1993 /* Generic C45 PHY driver */
1994 extern struct phy_driver genphy_c45_driver;
1995
1996 /* The gen10g_* functions are the old Clause 45 stub */
1997 int gen10g_config_aneg(struct phy_device *phydev);
1998
phy_read_status(struct phy_device * phydev)1999 static inline int phy_read_status(struct phy_device *phydev)
2000 {
2001 if (!phydev->drv)
2002 return -EIO;
2003
2004 if (phydev->drv->read_status)
2005 return phydev->drv->read_status(phydev);
2006 else
2007 return genphy_read_status(phydev);
2008 }
2009
2010 void phy_driver_unregister(struct phy_driver *drv);
2011 void phy_drivers_unregister(struct phy_driver *drv, int n);
2012 int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
2013 int phy_drivers_register(struct phy_driver *new_driver, int n,
2014 struct module *owner);
2015 void phy_error(struct phy_device *phydev);
2016 void phy_state_machine(struct work_struct *work);
2017 void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
2018 void phy_trigger_machine(struct phy_device *phydev);
2019 void phy_mac_interrupt(struct phy_device *phydev);
2020 void phy_start_machine(struct phy_device *phydev);
2021 void phy_stop_machine(struct phy_device *phydev);
2022 void phy_ethtool_ksettings_get(struct phy_device *phydev,
2023 struct ethtool_link_ksettings *cmd);
2024 int phy_ethtool_ksettings_set(struct phy_device *phydev,
2025 const struct ethtool_link_ksettings *cmd);
2026 int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
2027 int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
2028 int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
2029 int phy_disable_interrupts(struct phy_device *phydev);
2030 void phy_request_interrupt(struct phy_device *phydev);
2031 void phy_free_interrupt(struct phy_device *phydev);
2032 void phy_print_status(struct phy_device *phydev);
2033 int phy_get_rate_matching(struct phy_device *phydev,
2034 phy_interface_t iface);
2035 void phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
2036 void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
2037 void phy_advertise_supported(struct phy_device *phydev);
2038 void phy_advertise_eee_all(struct phy_device *phydev);
2039 void phy_support_sym_pause(struct phy_device *phydev);
2040 void phy_support_asym_pause(struct phy_device *phydev);
2041 void phy_support_eee(struct phy_device *phydev);
2042 void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
2043 bool autoneg);
2044 void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
2045 bool phy_validate_pause(struct phy_device *phydev,
2046 struct ethtool_pauseparam *pp);
2047 void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
2048
2049 s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
2050 const int *delay_values, int size, bool is_rx);
2051
2052 void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
2053 bool *tx_pause, bool *rx_pause);
2054
2055 int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
2056 int (*run)(struct phy_device *));
2057 int phy_register_fixup_for_id(const char *bus_id,
2058 int (*run)(struct phy_device *));
2059 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
2060 int (*run)(struct phy_device *));
2061
2062 int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
2063 int phy_unregister_fixup_for_id(const char *bus_id);
2064 int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
2065
2066 int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
2067 int phy_get_eee_err(struct phy_device *phydev);
2068 int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data);
2069 int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data);
2070 int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
2071 void phy_ethtool_get_wol(struct phy_device *phydev,
2072 struct ethtool_wolinfo *wol);
2073 int phy_ethtool_get_link_ksettings(struct net_device *ndev,
2074 struct ethtool_link_ksettings *cmd);
2075 int phy_ethtool_set_link_ksettings(struct net_device *ndev,
2076 const struct ethtool_link_ksettings *cmd);
2077 int phy_ethtool_nway_reset(struct net_device *ndev);
2078 int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size);
2079 int of_phy_package_join(struct phy_device *phydev, size_t priv_size);
2080 void phy_package_leave(struct phy_device *phydev);
2081 int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
2082 int base_addr, size_t priv_size);
2083 int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev,
2084 size_t priv_size);
2085
2086 int __init mdio_bus_init(void);
2087 void mdio_bus_exit(void);
2088
2089 int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
2090 int phy_ethtool_get_sset_count(struct phy_device *phydev);
2091 int phy_ethtool_get_stats(struct phy_device *phydev,
2092 struct ethtool_stats *stats, u64 *data);
2093
2094 void __phy_ethtool_get_phy_stats(struct phy_device *phydev,
2095 struct ethtool_eth_phy_stats *phy_stats,
2096 struct ethtool_phy_stats *phydev_stats);
2097 void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev,
2098 struct ethtool_link_ext_stats *link_stats);
2099
2100 int phy_ethtool_get_plca_cfg(struct phy_device *phydev,
2101 struct phy_plca_cfg *plca_cfg);
2102 int phy_ethtool_set_plca_cfg(struct phy_device *phydev,
2103 const struct phy_plca_cfg *plca_cfg,
2104 struct netlink_ext_ack *extack);
2105 int phy_ethtool_get_plca_status(struct phy_device *phydev,
2106 struct phy_plca_status *plca_st);
2107
2108 int __phy_hwtstamp_get(struct phy_device *phydev,
2109 struct kernel_hwtstamp_config *config);
2110 int __phy_hwtstamp_set(struct phy_device *phydev,
2111 struct kernel_hwtstamp_config *config,
2112 struct netlink_ext_ack *extack);
2113
phy_package_address(struct phy_device * phydev,unsigned int addr_offset)2114 static inline int phy_package_address(struct phy_device *phydev,
2115 unsigned int addr_offset)
2116 {
2117 struct phy_package_shared *shared = phydev->shared;
2118 u8 base_addr = shared->base_addr;
2119
2120 if (addr_offset >= PHY_MAX_ADDR - base_addr)
2121 return -EIO;
2122
2123 /* we know that addr will be in the range 0..31 and thus the
2124 * implicit cast to a signed int is not a problem.
2125 */
2126 return base_addr + addr_offset;
2127 }
2128
phy_package_read(struct phy_device * phydev,unsigned int addr_offset,u32 regnum)2129 static inline int phy_package_read(struct phy_device *phydev,
2130 unsigned int addr_offset, u32 regnum)
2131 {
2132 int addr = phy_package_address(phydev, addr_offset);
2133
2134 if (addr < 0)
2135 return addr;
2136
2137 return mdiobus_read(phydev->mdio.bus, addr, regnum);
2138 }
2139
__phy_package_read(struct phy_device * phydev,unsigned int addr_offset,u32 regnum)2140 static inline int __phy_package_read(struct phy_device *phydev,
2141 unsigned int addr_offset, u32 regnum)
2142 {
2143 int addr = phy_package_address(phydev, addr_offset);
2144
2145 if (addr < 0)
2146 return addr;
2147
2148 return __mdiobus_read(phydev->mdio.bus, addr, regnum);
2149 }
2150
phy_package_write(struct phy_device * phydev,unsigned int addr_offset,u32 regnum,u16 val)2151 static inline int phy_package_write(struct phy_device *phydev,
2152 unsigned int addr_offset, u32 regnum,
2153 u16 val)
2154 {
2155 int addr = phy_package_address(phydev, addr_offset);
2156
2157 if (addr < 0)
2158 return addr;
2159
2160 return mdiobus_write(phydev->mdio.bus, addr, regnum, val);
2161 }
2162
__phy_package_write(struct phy_device * phydev,unsigned int addr_offset,u32 regnum,u16 val)2163 static inline int __phy_package_write(struct phy_device *phydev,
2164 unsigned int addr_offset, u32 regnum,
2165 u16 val)
2166 {
2167 int addr = phy_package_address(phydev, addr_offset);
2168
2169 if (addr < 0)
2170 return addr;
2171
2172 return __mdiobus_write(phydev->mdio.bus, addr, regnum, val);
2173 }
2174
2175 int __phy_package_read_mmd(struct phy_device *phydev,
2176 unsigned int addr_offset, int devad,
2177 u32 regnum);
2178
2179 int phy_package_read_mmd(struct phy_device *phydev,
2180 unsigned int addr_offset, int devad,
2181 u32 regnum);
2182
2183 int __phy_package_write_mmd(struct phy_device *phydev,
2184 unsigned int addr_offset, int devad,
2185 u32 regnum, u16 val);
2186
2187 int phy_package_write_mmd(struct phy_device *phydev,
2188 unsigned int addr_offset, int devad,
2189 u32 regnum, u16 val);
2190
__phy_package_set_once(struct phy_device * phydev,unsigned int b)2191 static inline bool __phy_package_set_once(struct phy_device *phydev,
2192 unsigned int b)
2193 {
2194 struct phy_package_shared *shared = phydev->shared;
2195
2196 if (!shared)
2197 return false;
2198
2199 return !test_and_set_bit(b, &shared->flags);
2200 }
2201
phy_package_init_once(struct phy_device * phydev)2202 static inline bool phy_package_init_once(struct phy_device *phydev)
2203 {
2204 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
2205 }
2206
phy_package_probe_once(struct phy_device * phydev)2207 static inline bool phy_package_probe_once(struct phy_device *phydev)
2208 {
2209 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
2210 }
2211
2212 extern const struct bus_type mdio_bus_type;
2213
2214 struct mdio_board_info {
2215 const char *bus_id;
2216 char modalias[MDIO_NAME_SIZE];
2217 int mdio_addr;
2218 const void *platform_data;
2219 };
2220
2221 #if IS_ENABLED(CONFIG_MDIO_DEVICE)
2222 int mdiobus_register_board_info(const struct mdio_board_info *info,
2223 unsigned int n);
2224 #else
mdiobus_register_board_info(const struct mdio_board_info * i,unsigned int n)2225 static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
2226 unsigned int n)
2227 {
2228 return 0;
2229 }
2230 #endif
2231
2232
2233 /**
2234 * phy_module_driver() - Helper macro for registering PHY drivers
2235 * @__phy_drivers: array of PHY drivers to register
2236 * @__count: Numbers of members in array
2237 *
2238 * Helper macro for PHY drivers which do not do anything special in module
2239 * init/exit. Each module may only use this macro once, and calling it
2240 * replaces module_init() and module_exit().
2241 */
2242 #define phy_module_driver(__phy_drivers, __count) \
2243 static int __init phy_module_init(void) \
2244 { \
2245 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
2246 } \
2247 module_init(phy_module_init); \
2248 static void __exit phy_module_exit(void) \
2249 { \
2250 phy_drivers_unregister(__phy_drivers, __count); \
2251 } \
2252 module_exit(phy_module_exit)
2253
2254 #define module_phy_driver(__phy_drivers) \
2255 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
2256
2257 bool phy_driver_is_genphy(struct phy_device *phydev);
2258 bool phy_driver_is_genphy_10g(struct phy_device *phydev);
2259
2260 #endif /* __PHY_H */
2261