1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
3 */
4
5 #include <linux/if_arp.h>
6 #include "cam.h"
7 #include "chan.h"
8 #include "coex.h"
9 #include "debug.h"
10 #include "fw.h"
11 #include "mac.h"
12 #include "phy.h"
13 #include "ps.h"
14 #include "reg.h"
15 #include "util.h"
16 #include "wow.h"
17
18 struct rtw89_eapol_2_of_2 {
19 u8 gtkbody[14];
20 u8 key_des_ver;
21 u8 rsvd[92];
22 } __packed;
23
24 struct rtw89_sa_query {
25 u8 category;
26 u8 action;
27 } __packed;
28
29 struct rtw89_arp_rsp {
30 u8 llc_hdr[sizeof(rfc1042_header)];
31 __be16 llc_type;
32 struct arphdr arp_hdr;
33 u8 sender_hw[ETH_ALEN];
34 __be32 sender_ip;
35 u8 target_hw[ETH_ALEN];
36 __be32 target_ip;
37 } __packed;
38
39 static const u8 mss_signature[] = {0x4D, 0x53, 0x53, 0x4B, 0x50, 0x4F, 0x4F, 0x4C};
40
41 const struct rtw89_fw_blacklist rtw89_fw_blacklist_default = {
42 .ver = 0x00,
43 .list = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
44 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
45 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
46 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
47 },
48 };
49 EXPORT_SYMBOL(rtw89_fw_blacklist_default);
50
51 union rtw89_fw_element_arg {
52 size_t offset;
53 enum rtw89_rf_path rf_path;
54 enum rtw89_fw_type fw_type;
55 };
56
57 struct rtw89_fw_element_handler {
58 int (*fn)(struct rtw89_dev *rtwdev,
59 const struct rtw89_fw_element_hdr *elm,
60 const union rtw89_fw_element_arg arg);
61 const union rtw89_fw_element_arg arg;
62 const char *name;
63 };
64
65 static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev,
66 struct sk_buff *skb);
67 static int rtw89_h2c_tx_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb,
68 struct rtw89_wait_info *wait, unsigned int cond);
69
rtw89_fw_h2c_alloc_skb(struct rtw89_dev * rtwdev,u32 len,bool header)70 static struct sk_buff *rtw89_fw_h2c_alloc_skb(struct rtw89_dev *rtwdev, u32 len,
71 bool header)
72 {
73 struct sk_buff *skb;
74 u32 header_len = 0;
75 u32 h2c_desc_size = rtwdev->chip->h2c_desc_size;
76
77 if (header)
78 header_len = H2C_HEADER_LEN;
79
80 skb = dev_alloc_skb(len + header_len + h2c_desc_size);
81 if (!skb)
82 return NULL;
83 skb_reserve(skb, header_len + h2c_desc_size);
84 memset(skb->data, 0, len);
85
86 return skb;
87 }
88
rtw89_fw_h2c_alloc_skb_with_hdr(struct rtw89_dev * rtwdev,u32 len)89 struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(struct rtw89_dev *rtwdev, u32 len)
90 {
91 return rtw89_fw_h2c_alloc_skb(rtwdev, len, true);
92 }
93
rtw89_fw_h2c_alloc_skb_no_hdr(struct rtw89_dev * rtwdev,u32 len)94 struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(struct rtw89_dev *rtwdev, u32 len)
95 {
96 return rtw89_fw_h2c_alloc_skb(rtwdev, len, false);
97 }
98
rtw89_fw_check_rdy(struct rtw89_dev * rtwdev,enum rtw89_fwdl_check_type type)99 int rtw89_fw_check_rdy(struct rtw89_dev *rtwdev, enum rtw89_fwdl_check_type type)
100 {
101 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
102 u8 val;
103 int ret;
104
105 ret = read_poll_timeout_atomic(mac->fwdl_get_status, val,
106 val == RTW89_FWDL_WCPU_FW_INIT_RDY,
107 1, FWDL_WAIT_CNT, false, rtwdev, type);
108 if (ret) {
109 switch (val) {
110 case RTW89_FWDL_CHECKSUM_FAIL:
111 rtw89_err(rtwdev, "fw checksum fail\n");
112 return -EINVAL;
113
114 case RTW89_FWDL_SECURITY_FAIL:
115 rtw89_err(rtwdev, "fw security fail\n");
116 return -EINVAL;
117
118 case RTW89_FWDL_CV_NOT_MATCH:
119 rtw89_err(rtwdev, "fw cv not match\n");
120 return -EINVAL;
121
122 default:
123 rtw89_err(rtwdev, "fw unexpected status %d\n", val);
124 return -EBUSY;
125 }
126 }
127
128 set_bit(RTW89_FLAG_FW_RDY, rtwdev->flags);
129
130 return 0;
131 }
132
rtw89_fw_hdr_parser_v0(struct rtw89_dev * rtwdev,const u8 * fw,u32 len,struct rtw89_fw_bin_info * info)133 static int rtw89_fw_hdr_parser_v0(struct rtw89_dev *rtwdev, const u8 *fw, u32 len,
134 struct rtw89_fw_bin_info *info)
135 {
136 const struct rtw89_fw_hdr *fw_hdr = (const struct rtw89_fw_hdr *)fw;
137 struct rtw89_fw_hdr_section_info *section_info;
138 const struct rtw89_fw_dynhdr_hdr *fwdynhdr;
139 const struct rtw89_fw_hdr_section *section;
140 const u8 *fw_end = fw + len;
141 const u8 *bin;
142 u32 base_hdr_len;
143 u32 mssc_len = 0;
144 u32 i;
145
146 if (!info)
147 return -EINVAL;
148
149 info->section_num = le32_get_bits(fw_hdr->w6, FW_HDR_W6_SEC_NUM);
150 base_hdr_len = struct_size(fw_hdr, sections, info->section_num);
151 info->dynamic_hdr_en = le32_get_bits(fw_hdr->w7, FW_HDR_W7_DYN_HDR);
152
153 if (info->dynamic_hdr_en) {
154 info->hdr_len = le32_get_bits(fw_hdr->w3, FW_HDR_W3_LEN);
155 info->dynamic_hdr_len = info->hdr_len - base_hdr_len;
156 fwdynhdr = (const struct rtw89_fw_dynhdr_hdr *)(fw + base_hdr_len);
157 if (le32_to_cpu(fwdynhdr->hdr_len) != info->dynamic_hdr_len) {
158 rtw89_err(rtwdev, "[ERR]invalid fw dynamic header len\n");
159 return -EINVAL;
160 }
161 } else {
162 info->hdr_len = base_hdr_len;
163 info->dynamic_hdr_len = 0;
164 }
165
166 bin = fw + info->hdr_len;
167
168 /* jump to section header */
169 section_info = info->section_info;
170 for (i = 0; i < info->section_num; i++) {
171 section = &fw_hdr->sections[i];
172 section_info->type =
173 le32_get_bits(section->w1, FWSECTION_HDR_W1_SECTIONTYPE);
174 if (section_info->type == FWDL_SECURITY_SECTION_TYPE) {
175 section_info->mssc =
176 le32_get_bits(section->w2, FWSECTION_HDR_W2_MSSC);
177 mssc_len += section_info->mssc * FWDL_SECURITY_SIGLEN;
178 } else {
179 section_info->mssc = 0;
180 }
181
182 section_info->len = le32_get_bits(section->w1, FWSECTION_HDR_W1_SEC_SIZE);
183 if (le32_get_bits(section->w1, FWSECTION_HDR_W1_CHECKSUM))
184 section_info->len += FWDL_SECTION_CHKSUM_LEN;
185 section_info->redl = le32_get_bits(section->w1, FWSECTION_HDR_W1_REDL);
186 section_info->dladdr =
187 le32_get_bits(section->w0, FWSECTION_HDR_W0_DL_ADDR) & 0x1fffffff;
188 section_info->addr = bin;
189 bin += section_info->len;
190 section_info++;
191 }
192
193 if (fw_end != bin + mssc_len) {
194 rtw89_err(rtwdev, "[ERR]fw bin size\n");
195 return -EINVAL;
196 }
197
198 return 0;
199 }
200
__get_mssc_key_idx(struct rtw89_dev * rtwdev,const struct rtw89_fw_mss_pool_hdr * mss_hdr,u32 rmp_tbl_size,u32 * key_idx)201 static int __get_mssc_key_idx(struct rtw89_dev *rtwdev,
202 const struct rtw89_fw_mss_pool_hdr *mss_hdr,
203 u32 rmp_tbl_size, u32 *key_idx)
204 {
205 struct rtw89_fw_secure *sec = &rtwdev->fw.sec;
206 u32 sel_byte_idx;
207 u32 mss_sel_idx;
208 u8 sel_bit_idx;
209 int i;
210
211 if (sec->mss_dev_type == RTW89_FW_MSS_DEV_TYPE_FWSEC_DEF) {
212 if (!mss_hdr->defen)
213 return -ENOENT;
214
215 mss_sel_idx = sec->mss_cust_idx * le16_to_cpu(mss_hdr->msskey_num_max) +
216 sec->mss_key_num;
217 } else {
218 if (mss_hdr->defen)
219 mss_sel_idx = FWDL_MSS_POOL_DEFKEYSETS_SIZE << 3;
220 else
221 mss_sel_idx = 0;
222 mss_sel_idx += sec->mss_dev_type * le16_to_cpu(mss_hdr->msskey_num_max) *
223 le16_to_cpu(mss_hdr->msscust_max) +
224 sec->mss_cust_idx * le16_to_cpu(mss_hdr->msskey_num_max) +
225 sec->mss_key_num;
226 }
227
228 sel_byte_idx = mss_sel_idx >> 3;
229 sel_bit_idx = mss_sel_idx & 0x7;
230
231 if (sel_byte_idx >= rmp_tbl_size)
232 return -EFAULT;
233
234 if (!(mss_hdr->rmp_tbl[sel_byte_idx] & BIT(sel_bit_idx)))
235 return -ENOENT;
236
237 *key_idx = hweight8(mss_hdr->rmp_tbl[sel_byte_idx] & (BIT(sel_bit_idx) - 1));
238
239 for (i = 0; i < sel_byte_idx; i++)
240 *key_idx += hweight8(mss_hdr->rmp_tbl[i]);
241
242 return 0;
243 }
244
__parse_formatted_mssc(struct rtw89_dev * rtwdev,struct rtw89_fw_bin_info * info,struct rtw89_fw_hdr_section_info * section_info,const struct rtw89_fw_hdr_section_v1 * section,const void * content,u32 * mssc_len)245 static int __parse_formatted_mssc(struct rtw89_dev *rtwdev,
246 struct rtw89_fw_bin_info *info,
247 struct rtw89_fw_hdr_section_info *section_info,
248 const struct rtw89_fw_hdr_section_v1 *section,
249 const void *content,
250 u32 *mssc_len)
251 {
252 const struct rtw89_fw_mss_pool_hdr *mss_hdr = content + section_info->len;
253 const union rtw89_fw_section_mssc_content *section_content = content;
254 struct rtw89_fw_secure *sec = &rtwdev->fw.sec;
255 u32 rmp_tbl_size;
256 u32 key_sign_len;
257 u32 real_key_idx;
258 u32 sb_sel_ver;
259 int ret;
260
261 if (memcmp(mss_signature, mss_hdr->signature, sizeof(mss_signature)) != 0) {
262 rtw89_err(rtwdev, "[ERR] wrong MSS signature\n");
263 return -ENOENT;
264 }
265
266 if (mss_hdr->rmpfmt == MSS_POOL_RMP_TBL_BITMASK) {
267 rmp_tbl_size = (le16_to_cpu(mss_hdr->msskey_num_max) *
268 le16_to_cpu(mss_hdr->msscust_max) *
269 mss_hdr->mssdev_max) >> 3;
270 if (mss_hdr->defen)
271 rmp_tbl_size += FWDL_MSS_POOL_DEFKEYSETS_SIZE;
272 } else {
273 rtw89_err(rtwdev, "[ERR] MSS Key Pool Remap Table Format Unsupport:%X\n",
274 mss_hdr->rmpfmt);
275 return -EINVAL;
276 }
277
278 if (rmp_tbl_size + sizeof(*mss_hdr) != le32_to_cpu(mss_hdr->key_raw_offset)) {
279 rtw89_err(rtwdev, "[ERR] MSS Key Pool Format Error:0x%X + 0x%X != 0x%X\n",
280 rmp_tbl_size, (int)sizeof(*mss_hdr),
281 le32_to_cpu(mss_hdr->key_raw_offset));
282 return -EINVAL;
283 }
284
285 key_sign_len = le16_to_cpu(section_content->key_sign_len.v) >> 2;
286 if (!key_sign_len)
287 key_sign_len = 512;
288
289 if (info->dsp_checksum)
290 key_sign_len += FWDL_SECURITY_CHKSUM_LEN;
291
292 *mssc_len = sizeof(*mss_hdr) + rmp_tbl_size +
293 le16_to_cpu(mss_hdr->keypair_num) * key_sign_len;
294
295 if (!sec->secure_boot)
296 goto out;
297
298 sb_sel_ver = get_unaligned_le32(§ion_content->sb_sel_ver.v);
299 if (sb_sel_ver && sb_sel_ver != sec->sb_sel_mgn)
300 goto ignore;
301
302 ret = __get_mssc_key_idx(rtwdev, mss_hdr, rmp_tbl_size, &real_key_idx);
303 if (ret)
304 goto ignore;
305
306 section_info->key_addr = content + section_info->len +
307 le32_to_cpu(mss_hdr->key_raw_offset) +
308 key_sign_len * real_key_idx;
309 section_info->key_len = key_sign_len;
310 section_info->key_idx = real_key_idx;
311
312 out:
313 if (info->secure_section_exist) {
314 section_info->ignore = true;
315 return 0;
316 }
317
318 info->secure_section_exist = true;
319
320 return 0;
321
322 ignore:
323 section_info->ignore = true;
324
325 return 0;
326 }
327
__check_secure_blacklist(struct rtw89_dev * rtwdev,struct rtw89_fw_bin_info * info,struct rtw89_fw_hdr_section_info * section_info,const void * content)328 static int __check_secure_blacklist(struct rtw89_dev *rtwdev,
329 struct rtw89_fw_bin_info *info,
330 struct rtw89_fw_hdr_section_info *section_info,
331 const void *content)
332 {
333 const struct rtw89_fw_blacklist *chip_blacklist = rtwdev->chip->fw_blacklist;
334 const union rtw89_fw_section_mssc_content *section_content = content;
335 struct rtw89_fw_secure *sec = &rtwdev->fw.sec;
336 u8 byte_idx;
337 u8 bit_mask;
338
339 if (!sec->secure_boot)
340 return 0;
341
342 if (!info->secure_section_exist || section_info->ignore)
343 return 0;
344
345 if (!chip_blacklist) {
346 rtw89_err(rtwdev, "chip no blacklist for secure firmware\n");
347 return -ENOENT;
348 }
349
350 byte_idx = section_content->blacklist.bit_in_chip_list >> 3;
351 bit_mask = BIT(section_content->blacklist.bit_in_chip_list & 0x7);
352
353 if (section_content->blacklist.ver > chip_blacklist->ver) {
354 rtw89_err(rtwdev, "chip blacklist out of date (%u, %u)\n",
355 section_content->blacklist.ver, chip_blacklist->ver);
356 return -EINVAL;
357 }
358
359 if (chip_blacklist->list[byte_idx] & bit_mask) {
360 rtw89_err(rtwdev, "firmware %u in chip blacklist\n",
361 section_content->blacklist.ver);
362 return -EPERM;
363 }
364
365 return 0;
366 }
367
__parse_security_section(struct rtw89_dev * rtwdev,struct rtw89_fw_bin_info * info,struct rtw89_fw_hdr_section_info * section_info,const struct rtw89_fw_hdr_section_v1 * section,const void * content,u32 * mssc_len)368 static int __parse_security_section(struct rtw89_dev *rtwdev,
369 struct rtw89_fw_bin_info *info,
370 struct rtw89_fw_hdr_section_info *section_info,
371 const struct rtw89_fw_hdr_section_v1 *section,
372 const void *content,
373 u32 *mssc_len)
374 {
375 int ret;
376
377 section_info->mssc =
378 le32_get_bits(section->w2, FWSECTION_HDR_V1_W2_MSSC);
379
380 if (section_info->mssc == FORMATTED_MSSC) {
381 ret = __parse_formatted_mssc(rtwdev, info, section_info,
382 section, content, mssc_len);
383 if (ret)
384 return -EINVAL;
385 } else {
386 *mssc_len = section_info->mssc * FWDL_SECURITY_SIGLEN;
387 if (info->dsp_checksum)
388 *mssc_len += section_info->mssc * FWDL_SECURITY_CHKSUM_LEN;
389
390 info->secure_section_exist = true;
391 }
392
393 return __check_secure_blacklist(rtwdev, info, section_info, content);
394 }
395
rtw89_fw_hdr_parser_v1(struct rtw89_dev * rtwdev,const u8 * fw,u32 len,struct rtw89_fw_bin_info * info)396 static int rtw89_fw_hdr_parser_v1(struct rtw89_dev *rtwdev, const u8 *fw, u32 len,
397 struct rtw89_fw_bin_info *info)
398 {
399 const struct rtw89_fw_hdr_v1 *fw_hdr = (const struct rtw89_fw_hdr_v1 *)fw;
400 struct rtw89_fw_hdr_section_info *section_info;
401 const struct rtw89_fw_dynhdr_hdr *fwdynhdr;
402 const struct rtw89_fw_hdr_section_v1 *section;
403 const u8 *fw_end = fw + len;
404 const u8 *bin;
405 u32 base_hdr_len;
406 u32 mssc_len;
407 int ret;
408 u32 i;
409
410 info->section_num = le32_get_bits(fw_hdr->w6, FW_HDR_V1_W6_SEC_NUM);
411 info->dsp_checksum = le32_get_bits(fw_hdr->w6, FW_HDR_V1_W6_DSP_CHKSUM);
412 base_hdr_len = struct_size(fw_hdr, sections, info->section_num);
413 info->dynamic_hdr_en = le32_get_bits(fw_hdr->w7, FW_HDR_V1_W7_DYN_HDR);
414
415 if (info->dynamic_hdr_en) {
416 info->hdr_len = le32_get_bits(fw_hdr->w5, FW_HDR_V1_W5_HDR_SIZE);
417 info->dynamic_hdr_len = info->hdr_len - base_hdr_len;
418 fwdynhdr = (const struct rtw89_fw_dynhdr_hdr *)(fw + base_hdr_len);
419 if (le32_to_cpu(fwdynhdr->hdr_len) != info->dynamic_hdr_len) {
420 rtw89_err(rtwdev, "[ERR]invalid fw dynamic header len\n");
421 return -EINVAL;
422 }
423 } else {
424 info->hdr_len = base_hdr_len;
425 info->dynamic_hdr_len = 0;
426 }
427
428 bin = fw + info->hdr_len;
429
430 /* jump to section header */
431 section_info = info->section_info;
432 for (i = 0; i < info->section_num; i++) {
433 section = &fw_hdr->sections[i];
434
435 section_info->type =
436 le32_get_bits(section->w1, FWSECTION_HDR_V1_W1_SECTIONTYPE);
437 section_info->len =
438 le32_get_bits(section->w1, FWSECTION_HDR_V1_W1_SEC_SIZE);
439 if (le32_get_bits(section->w1, FWSECTION_HDR_V1_W1_CHECKSUM))
440 section_info->len += FWDL_SECTION_CHKSUM_LEN;
441 section_info->redl = le32_get_bits(section->w1, FWSECTION_HDR_V1_W1_REDL);
442 section_info->dladdr =
443 le32_get_bits(section->w0, FWSECTION_HDR_V1_W0_DL_ADDR);
444 section_info->addr = bin;
445
446 if (section_info->type == FWDL_SECURITY_SECTION_TYPE) {
447 ret = __parse_security_section(rtwdev, info, section_info,
448 section, bin, &mssc_len);
449 if (ret)
450 return ret;
451 } else {
452 section_info->mssc = 0;
453 mssc_len = 0;
454 }
455
456 rtw89_debug(rtwdev, RTW89_DBG_FW,
457 "section[%d] type=%d len=0x%-6x mssc=%d mssc_len=%d addr=%tx\n",
458 i, section_info->type, section_info->len,
459 section_info->mssc, mssc_len, bin - fw);
460 rtw89_debug(rtwdev, RTW89_DBG_FW,
461 " ignore=%d key_addr=%p (0x%tx) key_len=%d key_idx=%d\n",
462 section_info->ignore, section_info->key_addr,
463 section_info->key_addr ?
464 section_info->key_addr - section_info->addr : 0,
465 section_info->key_len, section_info->key_idx);
466
467 bin += section_info->len + mssc_len;
468 section_info++;
469 }
470
471 if (fw_end != bin) {
472 rtw89_err(rtwdev, "[ERR]fw bin size\n");
473 return -EINVAL;
474 }
475
476 if (!info->secure_section_exist)
477 rtw89_warn(rtwdev, "no firmware secure section\n");
478
479 return 0;
480 }
481
rtw89_fw_hdr_parser(struct rtw89_dev * rtwdev,const struct rtw89_fw_suit * fw_suit,struct rtw89_fw_bin_info * info)482 static int rtw89_fw_hdr_parser(struct rtw89_dev *rtwdev,
483 const struct rtw89_fw_suit *fw_suit,
484 struct rtw89_fw_bin_info *info)
485 {
486 const u8 *fw = fw_suit->data;
487 u32 len = fw_suit->size;
488
489 if (!fw || !len) {
490 rtw89_err(rtwdev, "fw type %d isn't recognized\n", fw_suit->type);
491 return -ENOENT;
492 }
493
494 switch (fw_suit->hdr_ver) {
495 case 0:
496 return rtw89_fw_hdr_parser_v0(rtwdev, fw, len, info);
497 case 1:
498 return rtw89_fw_hdr_parser_v1(rtwdev, fw, len, info);
499 default:
500 return -ENOENT;
501 }
502 }
503
rtw89_mfw_validate_hdr(struct rtw89_dev * rtwdev,const struct firmware * firmware,const struct rtw89_mfw_hdr * mfw_hdr)504 static int rtw89_mfw_validate_hdr(struct rtw89_dev *rtwdev,
505 const struct firmware *firmware,
506 const struct rtw89_mfw_hdr *mfw_hdr)
507 {
508 const void *mfw = firmware->data;
509 u32 mfw_len = firmware->size;
510 u8 fw_nr = mfw_hdr->fw_nr;
511 const void *ptr;
512
513 if (fw_nr == 0) {
514 rtw89_err(rtwdev, "mfw header has no fw entry\n");
515 return -ENOENT;
516 }
517
518 ptr = &mfw_hdr->info[fw_nr];
519
520 if (ptr > mfw + mfw_len) {
521 rtw89_err(rtwdev, "mfw header out of address\n");
522 return -EFAULT;
523 }
524
525 return 0;
526 }
527
528 static
rtw89_mfw_recognize(struct rtw89_dev * rtwdev,enum rtw89_fw_type type,struct rtw89_fw_suit * fw_suit,bool nowarn)529 int rtw89_mfw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type,
530 struct rtw89_fw_suit *fw_suit, bool nowarn)
531 {
532 struct rtw89_fw_info *fw_info = &rtwdev->fw;
533 const struct firmware *firmware = fw_info->req.firmware;
534 const u8 *mfw = firmware->data;
535 u32 mfw_len = firmware->size;
536 const struct rtw89_mfw_hdr *mfw_hdr = (const struct rtw89_mfw_hdr *)mfw;
537 const struct rtw89_mfw_info *mfw_info = NULL, *tmp;
538 int ret;
539 int i;
540
541 if (mfw_hdr->sig != RTW89_MFW_SIG) {
542 rtw89_debug(rtwdev, RTW89_DBG_FW, "use legacy firmware\n");
543 /* legacy firmware support normal type only */
544 if (type != RTW89_FW_NORMAL)
545 return -EINVAL;
546 fw_suit->data = mfw;
547 fw_suit->size = mfw_len;
548 return 0;
549 }
550
551 ret = rtw89_mfw_validate_hdr(rtwdev, firmware, mfw_hdr);
552 if (ret)
553 return ret;
554
555 for (i = 0; i < mfw_hdr->fw_nr; i++) {
556 tmp = &mfw_hdr->info[i];
557 if (tmp->type != type)
558 continue;
559
560 if (type == RTW89_FW_LOGFMT) {
561 mfw_info = tmp;
562 goto found;
563 }
564
565 /* Version order of WiFi firmware in firmware file are not in order,
566 * pass all firmware to find the equal or less but closest version.
567 */
568 if (tmp->cv <= rtwdev->hal.cv && !tmp->mp) {
569 if (!mfw_info || mfw_info->cv < tmp->cv)
570 mfw_info = tmp;
571 }
572 }
573
574 if (mfw_info)
575 goto found;
576
577 if (!nowarn)
578 rtw89_err(rtwdev, "no suitable firmware found\n");
579 return -ENOENT;
580
581 found:
582 fw_suit->data = mfw + le32_to_cpu(mfw_info->shift);
583 fw_suit->size = le32_to_cpu(mfw_info->size);
584
585 if (fw_suit->data + fw_suit->size > mfw + mfw_len) {
586 rtw89_err(rtwdev, "fw_suit %d out of address\n", type);
587 return -EFAULT;
588 }
589
590 return 0;
591 }
592
rtw89_mfw_get_size(struct rtw89_dev * rtwdev)593 static u32 rtw89_mfw_get_size(struct rtw89_dev *rtwdev)
594 {
595 struct rtw89_fw_info *fw_info = &rtwdev->fw;
596 const struct firmware *firmware = fw_info->req.firmware;
597 const struct rtw89_mfw_hdr *mfw_hdr =
598 (const struct rtw89_mfw_hdr *)firmware->data;
599 const struct rtw89_mfw_info *mfw_info;
600 u32 size;
601 int ret;
602
603 if (mfw_hdr->sig != RTW89_MFW_SIG) {
604 rtw89_warn(rtwdev, "not mfw format\n");
605 return 0;
606 }
607
608 ret = rtw89_mfw_validate_hdr(rtwdev, firmware, mfw_hdr);
609 if (ret)
610 return ret;
611
612 mfw_info = &mfw_hdr->info[mfw_hdr->fw_nr - 1];
613 size = le32_to_cpu(mfw_info->shift) + le32_to_cpu(mfw_info->size);
614
615 return size;
616 }
617
rtw89_fw_update_ver_v0(struct rtw89_dev * rtwdev,struct rtw89_fw_suit * fw_suit,const struct rtw89_fw_hdr * hdr)618 static void rtw89_fw_update_ver_v0(struct rtw89_dev *rtwdev,
619 struct rtw89_fw_suit *fw_suit,
620 const struct rtw89_fw_hdr *hdr)
621 {
622 fw_suit->major_ver = le32_get_bits(hdr->w1, FW_HDR_W1_MAJOR_VERSION);
623 fw_suit->minor_ver = le32_get_bits(hdr->w1, FW_HDR_W1_MINOR_VERSION);
624 fw_suit->sub_ver = le32_get_bits(hdr->w1, FW_HDR_W1_SUBVERSION);
625 fw_suit->sub_idex = le32_get_bits(hdr->w1, FW_HDR_W1_SUBINDEX);
626 fw_suit->commitid = le32_get_bits(hdr->w2, FW_HDR_W2_COMMITID);
627 fw_suit->build_year = le32_get_bits(hdr->w5, FW_HDR_W5_YEAR);
628 fw_suit->build_mon = le32_get_bits(hdr->w4, FW_HDR_W4_MONTH);
629 fw_suit->build_date = le32_get_bits(hdr->w4, FW_HDR_W4_DATE);
630 fw_suit->build_hour = le32_get_bits(hdr->w4, FW_HDR_W4_HOUR);
631 fw_suit->build_min = le32_get_bits(hdr->w4, FW_HDR_W4_MIN);
632 fw_suit->cmd_ver = le32_get_bits(hdr->w7, FW_HDR_W7_CMD_VERSERION);
633 }
634
rtw89_fw_update_ver_v1(struct rtw89_dev * rtwdev,struct rtw89_fw_suit * fw_suit,const struct rtw89_fw_hdr_v1 * hdr)635 static void rtw89_fw_update_ver_v1(struct rtw89_dev *rtwdev,
636 struct rtw89_fw_suit *fw_suit,
637 const struct rtw89_fw_hdr_v1 *hdr)
638 {
639 fw_suit->major_ver = le32_get_bits(hdr->w1, FW_HDR_V1_W1_MAJOR_VERSION);
640 fw_suit->minor_ver = le32_get_bits(hdr->w1, FW_HDR_V1_W1_MINOR_VERSION);
641 fw_suit->sub_ver = le32_get_bits(hdr->w1, FW_HDR_V1_W1_SUBVERSION);
642 fw_suit->sub_idex = le32_get_bits(hdr->w1, FW_HDR_V1_W1_SUBINDEX);
643 fw_suit->commitid = le32_get_bits(hdr->w2, FW_HDR_V1_W2_COMMITID);
644 fw_suit->build_year = le32_get_bits(hdr->w5, FW_HDR_V1_W5_YEAR);
645 fw_suit->build_mon = le32_get_bits(hdr->w4, FW_HDR_V1_W4_MONTH);
646 fw_suit->build_date = le32_get_bits(hdr->w4, FW_HDR_V1_W4_DATE);
647 fw_suit->build_hour = le32_get_bits(hdr->w4, FW_HDR_V1_W4_HOUR);
648 fw_suit->build_min = le32_get_bits(hdr->w4, FW_HDR_V1_W4_MIN);
649 fw_suit->cmd_ver = le32_get_bits(hdr->w7, FW_HDR_V1_W3_CMD_VERSERION);
650 }
651
rtw89_fw_update_ver(struct rtw89_dev * rtwdev,enum rtw89_fw_type type,struct rtw89_fw_suit * fw_suit)652 static int rtw89_fw_update_ver(struct rtw89_dev *rtwdev,
653 enum rtw89_fw_type type,
654 struct rtw89_fw_suit *fw_suit)
655 {
656 const struct rtw89_fw_hdr *v0 = (const struct rtw89_fw_hdr *)fw_suit->data;
657 const struct rtw89_fw_hdr_v1 *v1 = (const struct rtw89_fw_hdr_v1 *)fw_suit->data;
658
659 if (type == RTW89_FW_LOGFMT)
660 return 0;
661
662 fw_suit->type = type;
663 fw_suit->hdr_ver = le32_get_bits(v0->w3, FW_HDR_W3_HDR_VER);
664
665 switch (fw_suit->hdr_ver) {
666 case 0:
667 rtw89_fw_update_ver_v0(rtwdev, fw_suit, v0);
668 break;
669 case 1:
670 rtw89_fw_update_ver_v1(rtwdev, fw_suit, v1);
671 break;
672 default:
673 rtw89_err(rtwdev, "Unknown firmware header version %u\n",
674 fw_suit->hdr_ver);
675 return -ENOENT;
676 }
677
678 rtw89_info(rtwdev,
679 "Firmware version %u.%u.%u.%u (%08x), cmd version %u, type %u\n",
680 fw_suit->major_ver, fw_suit->minor_ver, fw_suit->sub_ver,
681 fw_suit->sub_idex, fw_suit->commitid, fw_suit->cmd_ver, type);
682
683 return 0;
684 }
685
686 static
__rtw89_fw_recognize(struct rtw89_dev * rtwdev,enum rtw89_fw_type type,bool nowarn)687 int __rtw89_fw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type,
688 bool nowarn)
689 {
690 struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, type);
691 int ret;
692
693 ret = rtw89_mfw_recognize(rtwdev, type, fw_suit, nowarn);
694 if (ret)
695 return ret;
696
697 return rtw89_fw_update_ver(rtwdev, type, fw_suit);
698 }
699
700 static
__rtw89_fw_recognize_from_elm(struct rtw89_dev * rtwdev,const struct rtw89_fw_element_hdr * elm,const union rtw89_fw_element_arg arg)701 int __rtw89_fw_recognize_from_elm(struct rtw89_dev *rtwdev,
702 const struct rtw89_fw_element_hdr *elm,
703 const union rtw89_fw_element_arg arg)
704 {
705 enum rtw89_fw_type type = arg.fw_type;
706 struct rtw89_hal *hal = &rtwdev->hal;
707 struct rtw89_fw_suit *fw_suit;
708
709 /* Version of BB MCU is in decreasing order in firmware file, so take
710 * first equal or less version, which is equal or less but closest version.
711 */
712 if (hal->cv < elm->u.bbmcu.cv)
713 return 1; /* ignore this element */
714
715 fw_suit = rtw89_fw_suit_get(rtwdev, type);
716 if (fw_suit->data)
717 return 1; /* ignore this element (a firmware is taken already) */
718
719 fw_suit->data = elm->u.bbmcu.contents;
720 fw_suit->size = le32_to_cpu(elm->size);
721
722 return rtw89_fw_update_ver(rtwdev, type, fw_suit);
723 }
724
725 #define __DEF_FW_FEAT_COND(__cond, __op) \
726 static bool __fw_feat_cond_ ## __cond(u32 suit_ver_code, u32 comp_ver_code) \
727 { \
728 return suit_ver_code __op comp_ver_code; \
729 }
730
731 __DEF_FW_FEAT_COND(ge, >=); /* greater or equal */
732 __DEF_FW_FEAT_COND(le, <=); /* less or equal */
733 __DEF_FW_FEAT_COND(lt, <); /* less than */
734
735 struct __fw_feat_cfg {
736 enum rtw89_core_chip_id chip_id;
737 enum rtw89_fw_feature feature;
738 u32 ver_code;
739 bool (*cond)(u32 suit_ver_code, u32 comp_ver_code);
740 };
741
742 #define __CFG_FW_FEAT(_chip, _cond, _maj, _min, _sub, _idx, _feat) \
743 { \
744 .chip_id = _chip, \
745 .feature = RTW89_FW_FEATURE_ ## _feat, \
746 .ver_code = RTW89_FW_VER_CODE(_maj, _min, _sub, _idx), \
747 .cond = __fw_feat_cond_ ## _cond, \
748 }
749
750 static const struct __fw_feat_cfg fw_feat_tbl[] = {
751 __CFG_FW_FEAT(RTL8851B, ge, 0, 29, 37, 1, TX_WAKE),
752 __CFG_FW_FEAT(RTL8851B, ge, 0, 29, 37, 1, SCAN_OFFLOAD),
753 __CFG_FW_FEAT(RTL8851B, ge, 0, 29, 41, 0, CRASH_TRIGGER),
754 __CFG_FW_FEAT(RTL8852A, le, 0, 13, 29, 0, OLD_HT_RA_FORMAT),
755 __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, SCAN_OFFLOAD),
756 __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, TX_WAKE),
757 __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 36, 0, CRASH_TRIGGER),
758 __CFG_FW_FEAT(RTL8852A, lt, 0, 13, 38, 0, NO_PACKET_DROP),
759 __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, NO_LPS_PG),
760 __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, TX_WAKE),
761 __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 29, 0, CRASH_TRIGGER),
762 __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 29, 0, SCAN_OFFLOAD),
763 __CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 74, 0, NO_LPS_PG),
764 __CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 74, 0, TX_WAKE),
765 __CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 90, 0, CRASH_TRIGGER),
766 __CFG_FW_FEAT(RTL8852BT, ge, 0, 29, 91, 0, SCAN_OFFLOAD),
767 __CFG_FW_FEAT(RTL8852C, le, 0, 27, 33, 0, NO_DEEP_PS),
768 __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 34, 0, TX_WAKE),
769 __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 36, 0, SCAN_OFFLOAD),
770 __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 40, 0, CRASH_TRIGGER),
771 __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 56, 10, BEACON_FILTER),
772 __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 80, 0, WOW_REASON_V1),
773 __CFG_FW_FEAT(RTL8922A, ge, 0, 34, 30, 0, CRASH_TRIGGER),
774 __CFG_FW_FEAT(RTL8922A, ge, 0, 34, 11, 0, MACID_PAUSE_SLEEP),
775 __CFG_FW_FEAT(RTL8922A, ge, 0, 34, 35, 0, SCAN_OFFLOAD),
776 __CFG_FW_FEAT(RTL8922A, lt, 0, 35, 21, 0, SCAN_OFFLOAD_BE_V0),
777 __CFG_FW_FEAT(RTL8922A, ge, 0, 35, 12, 0, BEACON_FILTER),
778 __CFG_FW_FEAT(RTL8922A, ge, 0, 35, 22, 0, WOW_REASON_V1),
779 __CFG_FW_FEAT(RTL8922A, lt, 0, 35, 31, 0, RFK_PRE_NOTIFY_V0),
780 };
781
rtw89_fw_iterate_feature_cfg(struct rtw89_fw_info * fw,const struct rtw89_chip_info * chip,u32 ver_code)782 static void rtw89_fw_iterate_feature_cfg(struct rtw89_fw_info *fw,
783 const struct rtw89_chip_info *chip,
784 u32 ver_code)
785 {
786 int i;
787
788 for (i = 0; i < ARRAY_SIZE(fw_feat_tbl); i++) {
789 const struct __fw_feat_cfg *ent = &fw_feat_tbl[i];
790
791 if (chip->chip_id != ent->chip_id)
792 continue;
793
794 if (ent->cond(ver_code, ent->ver_code))
795 RTW89_SET_FW_FEATURE(ent->feature, fw);
796 }
797 }
798
rtw89_fw_recognize_features(struct rtw89_dev * rtwdev)799 static void rtw89_fw_recognize_features(struct rtw89_dev *rtwdev)
800 {
801 const struct rtw89_chip_info *chip = rtwdev->chip;
802 const struct rtw89_fw_suit *fw_suit;
803 u32 suit_ver_code;
804
805 fw_suit = rtw89_fw_suit_get(rtwdev, RTW89_FW_NORMAL);
806 suit_ver_code = RTW89_FW_SUIT_VER_CODE(fw_suit);
807
808 rtw89_fw_iterate_feature_cfg(&rtwdev->fw, chip, suit_ver_code);
809 }
810
811 const struct firmware *
rtw89_early_fw_feature_recognize(struct device * device,const struct rtw89_chip_info * chip,struct rtw89_fw_info * early_fw,int * used_fw_format)812 rtw89_early_fw_feature_recognize(struct device *device,
813 const struct rtw89_chip_info *chip,
814 struct rtw89_fw_info *early_fw,
815 int *used_fw_format)
816 {
817 const struct firmware *firmware;
818 char fw_name[64];
819 int fw_format;
820 u32 ver_code;
821 int ret;
822
823 for (fw_format = chip->fw_format_max; fw_format >= 0; fw_format--) {
824 rtw89_fw_get_filename(fw_name, sizeof(fw_name),
825 chip->fw_basename, fw_format);
826
827 ret = request_firmware(&firmware, fw_name, device);
828 if (!ret) {
829 dev_info(device, "loaded firmware %s\n", fw_name);
830 *used_fw_format = fw_format;
831 break;
832 }
833 }
834
835 if (ret) {
836 dev_err(device, "failed to early request firmware: %d\n", ret);
837 return NULL;
838 }
839
840 ver_code = rtw89_compat_fw_hdr_ver_code(firmware->data);
841
842 if (!ver_code)
843 goto out;
844
845 rtw89_fw_iterate_feature_cfg(early_fw, chip, ver_code);
846
847 out:
848 return firmware;
849 }
850
rtw89_fw_recognize(struct rtw89_dev * rtwdev)851 int rtw89_fw_recognize(struct rtw89_dev *rtwdev)
852 {
853 const struct rtw89_chip_info *chip = rtwdev->chip;
854 int ret;
855
856 if (chip->try_ce_fw) {
857 ret = __rtw89_fw_recognize(rtwdev, RTW89_FW_NORMAL_CE, true);
858 if (!ret)
859 goto normal_done;
860 }
861
862 ret = __rtw89_fw_recognize(rtwdev, RTW89_FW_NORMAL, false);
863 if (ret)
864 return ret;
865
866 normal_done:
867 /* It still works if wowlan firmware isn't existing. */
868 __rtw89_fw_recognize(rtwdev, RTW89_FW_WOWLAN, false);
869
870 /* It still works if log format file isn't existing. */
871 __rtw89_fw_recognize(rtwdev, RTW89_FW_LOGFMT, true);
872
873 rtw89_fw_recognize_features(rtwdev);
874
875 rtw89_coex_recognize_ver(rtwdev);
876
877 return 0;
878 }
879
880 static
rtw89_build_phy_tbl_from_elm(struct rtw89_dev * rtwdev,const struct rtw89_fw_element_hdr * elm,const union rtw89_fw_element_arg arg)881 int rtw89_build_phy_tbl_from_elm(struct rtw89_dev *rtwdev,
882 const struct rtw89_fw_element_hdr *elm,
883 const union rtw89_fw_element_arg arg)
884 {
885 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info;
886 struct rtw89_phy_table *tbl;
887 struct rtw89_reg2_def *regs;
888 enum rtw89_rf_path rf_path;
889 u32 n_regs, i;
890 u8 idx;
891
892 tbl = kzalloc(sizeof(*tbl), GFP_KERNEL);
893 if (!tbl)
894 return -ENOMEM;
895
896 switch (le32_to_cpu(elm->id)) {
897 case RTW89_FW_ELEMENT_ID_BB_REG:
898 elm_info->bb_tbl = tbl;
899 break;
900 case RTW89_FW_ELEMENT_ID_BB_GAIN:
901 elm_info->bb_gain = tbl;
902 break;
903 case RTW89_FW_ELEMENT_ID_RADIO_A:
904 case RTW89_FW_ELEMENT_ID_RADIO_B:
905 case RTW89_FW_ELEMENT_ID_RADIO_C:
906 case RTW89_FW_ELEMENT_ID_RADIO_D:
907 rf_path = arg.rf_path;
908 idx = elm->u.reg2.idx;
909
910 elm_info->rf_radio[idx] = tbl;
911 tbl->rf_path = rf_path;
912 tbl->config = rtw89_phy_config_rf_reg_v1;
913 break;
914 case RTW89_FW_ELEMENT_ID_RF_NCTL:
915 elm_info->rf_nctl = tbl;
916 break;
917 default:
918 kfree(tbl);
919 return -ENOENT;
920 }
921
922 n_regs = le32_to_cpu(elm->size) / sizeof(tbl->regs[0]);
923 regs = kcalloc(n_regs, sizeof(tbl->regs[0]), GFP_KERNEL);
924 if (!regs)
925 goto out;
926
927 for (i = 0; i < n_regs; i++) {
928 regs[i].addr = le32_to_cpu(elm->u.reg2.regs[i].addr);
929 regs[i].data = le32_to_cpu(elm->u.reg2.regs[i].data);
930 }
931
932 tbl->n_regs = n_regs;
933 tbl->regs = regs;
934
935 return 0;
936
937 out:
938 kfree(tbl);
939 return -ENOMEM;
940 }
941
942 static
rtw89_fw_recognize_txpwr_from_elm(struct rtw89_dev * rtwdev,const struct rtw89_fw_element_hdr * elm,const union rtw89_fw_element_arg arg)943 int rtw89_fw_recognize_txpwr_from_elm(struct rtw89_dev *rtwdev,
944 const struct rtw89_fw_element_hdr *elm,
945 const union rtw89_fw_element_arg arg)
946 {
947 const struct __rtw89_fw_txpwr_element *txpwr_elm = &elm->u.txpwr;
948 const unsigned long offset = arg.offset;
949 struct rtw89_efuse *efuse = &rtwdev->efuse;
950 struct rtw89_txpwr_conf *conf;
951
952 if (!rtwdev->rfe_data) {
953 rtwdev->rfe_data = kzalloc(sizeof(*rtwdev->rfe_data), GFP_KERNEL);
954 if (!rtwdev->rfe_data)
955 return -ENOMEM;
956 }
957
958 conf = (void *)rtwdev->rfe_data + offset;
959
960 /* if multiple matched, take the last eventually */
961 if (txpwr_elm->rfe_type == efuse->rfe_type)
962 goto setup;
963
964 /* without one is matched, accept default */
965 if (txpwr_elm->rfe_type == RTW89_TXPWR_CONF_DFLT_RFE_TYPE &&
966 (!rtw89_txpwr_conf_valid(conf) ||
967 conf->rfe_type == RTW89_TXPWR_CONF_DFLT_RFE_TYPE))
968 goto setup;
969
970 rtw89_debug(rtwdev, RTW89_DBG_FW, "skip txpwr element ID %u RFE %u\n",
971 elm->id, txpwr_elm->rfe_type);
972 return 0;
973
974 setup:
975 rtw89_debug(rtwdev, RTW89_DBG_FW, "take txpwr element ID %u RFE %u\n",
976 elm->id, txpwr_elm->rfe_type);
977
978 conf->rfe_type = txpwr_elm->rfe_type;
979 conf->ent_sz = txpwr_elm->ent_sz;
980 conf->num_ents = le32_to_cpu(txpwr_elm->num_ents);
981 conf->data = txpwr_elm->content;
982 return 0;
983 }
984
985 static
rtw89_build_txpwr_trk_tbl_from_elm(struct rtw89_dev * rtwdev,const struct rtw89_fw_element_hdr * elm,const union rtw89_fw_element_arg arg)986 int rtw89_build_txpwr_trk_tbl_from_elm(struct rtw89_dev *rtwdev,
987 const struct rtw89_fw_element_hdr *elm,
988 const union rtw89_fw_element_arg arg)
989 {
990 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info;
991 const struct rtw89_chip_info *chip = rtwdev->chip;
992 u32 needed_bitmap = 0;
993 u32 offset = 0;
994 int subband;
995 u32 bitmap;
996 int type;
997
998 if (chip->support_bands & BIT(NL80211_BAND_6GHZ))
999 needed_bitmap |= RTW89_DEFAULT_NEEDED_FW_TXPWR_TRK_6GHZ;
1000 if (chip->support_bands & BIT(NL80211_BAND_5GHZ))
1001 needed_bitmap |= RTW89_DEFAULT_NEEDED_FW_TXPWR_TRK_5GHZ;
1002 if (chip->support_bands & BIT(NL80211_BAND_2GHZ))
1003 needed_bitmap |= RTW89_DEFAULT_NEEDED_FW_TXPWR_TRK_2GHZ;
1004
1005 bitmap = le32_to_cpu(elm->u.txpwr_trk.bitmap);
1006
1007 if ((bitmap & needed_bitmap) != needed_bitmap) {
1008 rtw89_warn(rtwdev, "needed txpwr trk bitmap %08x but %0x8x\n",
1009 needed_bitmap, bitmap);
1010 return -ENOENT;
1011 }
1012
1013 elm_info->txpwr_trk = kzalloc(sizeof(*elm_info->txpwr_trk), GFP_KERNEL);
1014 if (!elm_info->txpwr_trk)
1015 return -ENOMEM;
1016
1017 for (type = 0; bitmap; type++, bitmap >>= 1) {
1018 if (!(bitmap & BIT(0)))
1019 continue;
1020
1021 if (type >= __RTW89_FW_TXPWR_TRK_TYPE_6GHZ_START &&
1022 type <= __RTW89_FW_TXPWR_TRK_TYPE_6GHZ_MAX)
1023 subband = 4;
1024 else if (type >= __RTW89_FW_TXPWR_TRK_TYPE_5GHZ_START &&
1025 type <= __RTW89_FW_TXPWR_TRK_TYPE_5GHZ_MAX)
1026 subband = 3;
1027 else if (type >= __RTW89_FW_TXPWR_TRK_TYPE_2GHZ_START &&
1028 type <= __RTW89_FW_TXPWR_TRK_TYPE_2GHZ_MAX)
1029 subband = 1;
1030 else
1031 break;
1032
1033 elm_info->txpwr_trk->delta[type] = &elm->u.txpwr_trk.contents[offset];
1034
1035 offset += subband;
1036 if (offset * DELTA_SWINGIDX_SIZE > le32_to_cpu(elm->size))
1037 goto err;
1038 }
1039
1040 return 0;
1041
1042 err:
1043 rtw89_warn(rtwdev, "unexpected txpwr trk offset %d over size %d\n",
1044 offset, le32_to_cpu(elm->size));
1045 kfree(elm_info->txpwr_trk);
1046 elm_info->txpwr_trk = NULL;
1047
1048 return -EFAULT;
1049 }
1050
1051 static
rtw89_build_rfk_log_fmt_from_elm(struct rtw89_dev * rtwdev,const struct rtw89_fw_element_hdr * elm,const union rtw89_fw_element_arg arg)1052 int rtw89_build_rfk_log_fmt_from_elm(struct rtw89_dev *rtwdev,
1053 const struct rtw89_fw_element_hdr *elm,
1054 const union rtw89_fw_element_arg arg)
1055 {
1056 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info;
1057 u8 rfk_id;
1058
1059 if (elm_info->rfk_log_fmt)
1060 goto allocated;
1061
1062 elm_info->rfk_log_fmt = kzalloc(sizeof(*elm_info->rfk_log_fmt), GFP_KERNEL);
1063 if (!elm_info->rfk_log_fmt)
1064 return 1; /* this is an optional element, so just ignore this */
1065
1066 allocated:
1067 rfk_id = elm->u.rfk_log_fmt.rfk_id;
1068 if (rfk_id >= RTW89_PHY_C2H_RFK_LOG_FUNC_NUM)
1069 return 1;
1070
1071 elm_info->rfk_log_fmt->elm[rfk_id] = elm;
1072
1073 return 0;
1074 }
1075
1076 static const struct rtw89_fw_element_handler __fw_element_handlers[] = {
1077 [RTW89_FW_ELEMENT_ID_BBMCU0] = {__rtw89_fw_recognize_from_elm,
1078 { .fw_type = RTW89_FW_BBMCU0 }, NULL},
1079 [RTW89_FW_ELEMENT_ID_BBMCU1] = {__rtw89_fw_recognize_from_elm,
1080 { .fw_type = RTW89_FW_BBMCU1 }, NULL},
1081 [RTW89_FW_ELEMENT_ID_BB_REG] = {rtw89_build_phy_tbl_from_elm, {}, "BB"},
1082 [RTW89_FW_ELEMENT_ID_BB_GAIN] = {rtw89_build_phy_tbl_from_elm, {}, NULL},
1083 [RTW89_FW_ELEMENT_ID_RADIO_A] = {rtw89_build_phy_tbl_from_elm,
1084 { .rf_path = RF_PATH_A }, "radio A"},
1085 [RTW89_FW_ELEMENT_ID_RADIO_B] = {rtw89_build_phy_tbl_from_elm,
1086 { .rf_path = RF_PATH_B }, NULL},
1087 [RTW89_FW_ELEMENT_ID_RADIO_C] = {rtw89_build_phy_tbl_from_elm,
1088 { .rf_path = RF_PATH_C }, NULL},
1089 [RTW89_FW_ELEMENT_ID_RADIO_D] = {rtw89_build_phy_tbl_from_elm,
1090 { .rf_path = RF_PATH_D }, NULL},
1091 [RTW89_FW_ELEMENT_ID_RF_NCTL] = {rtw89_build_phy_tbl_from_elm, {}, "NCTL"},
1092 [RTW89_FW_ELEMENT_ID_TXPWR_BYRATE] = {
1093 rtw89_fw_recognize_txpwr_from_elm,
1094 { .offset = offsetof(struct rtw89_rfe_data, byrate.conf) }, "TXPWR",
1095 },
1096 [RTW89_FW_ELEMENT_ID_TXPWR_LMT_2GHZ] = {
1097 rtw89_fw_recognize_txpwr_from_elm,
1098 { .offset = offsetof(struct rtw89_rfe_data, lmt_2ghz.conf) }, NULL,
1099 },
1100 [RTW89_FW_ELEMENT_ID_TXPWR_LMT_5GHZ] = {
1101 rtw89_fw_recognize_txpwr_from_elm,
1102 { .offset = offsetof(struct rtw89_rfe_data, lmt_5ghz.conf) }, NULL,
1103 },
1104 [RTW89_FW_ELEMENT_ID_TXPWR_LMT_6GHZ] = {
1105 rtw89_fw_recognize_txpwr_from_elm,
1106 { .offset = offsetof(struct rtw89_rfe_data, lmt_6ghz.conf) }, NULL,
1107 },
1108 [RTW89_FW_ELEMENT_ID_TXPWR_LMT_RU_2GHZ] = {
1109 rtw89_fw_recognize_txpwr_from_elm,
1110 { .offset = offsetof(struct rtw89_rfe_data, lmt_ru_2ghz.conf) }, NULL,
1111 },
1112 [RTW89_FW_ELEMENT_ID_TXPWR_LMT_RU_5GHZ] = {
1113 rtw89_fw_recognize_txpwr_from_elm,
1114 { .offset = offsetof(struct rtw89_rfe_data, lmt_ru_5ghz.conf) }, NULL,
1115 },
1116 [RTW89_FW_ELEMENT_ID_TXPWR_LMT_RU_6GHZ] = {
1117 rtw89_fw_recognize_txpwr_from_elm,
1118 { .offset = offsetof(struct rtw89_rfe_data, lmt_ru_6ghz.conf) }, NULL,
1119 },
1120 [RTW89_FW_ELEMENT_ID_TX_SHAPE_LMT] = {
1121 rtw89_fw_recognize_txpwr_from_elm,
1122 { .offset = offsetof(struct rtw89_rfe_data, tx_shape_lmt.conf) }, NULL,
1123 },
1124 [RTW89_FW_ELEMENT_ID_TX_SHAPE_LMT_RU] = {
1125 rtw89_fw_recognize_txpwr_from_elm,
1126 { .offset = offsetof(struct rtw89_rfe_data, tx_shape_lmt_ru.conf) }, NULL,
1127 },
1128 [RTW89_FW_ELEMENT_ID_TXPWR_TRK] = {
1129 rtw89_build_txpwr_trk_tbl_from_elm, {}, "PWR_TRK",
1130 },
1131 [RTW89_FW_ELEMENT_ID_RFKLOG_FMT] = {
1132 rtw89_build_rfk_log_fmt_from_elm, {}, NULL,
1133 },
1134 };
1135
rtw89_fw_recognize_elements(struct rtw89_dev * rtwdev)1136 int rtw89_fw_recognize_elements(struct rtw89_dev *rtwdev)
1137 {
1138 struct rtw89_fw_info *fw_info = &rtwdev->fw;
1139 const struct firmware *firmware = fw_info->req.firmware;
1140 const struct rtw89_chip_info *chip = rtwdev->chip;
1141 u32 unrecognized_elements = chip->needed_fw_elms;
1142 const struct rtw89_fw_element_handler *handler;
1143 const struct rtw89_fw_element_hdr *hdr;
1144 u32 elm_size;
1145 u32 elem_id;
1146 u32 offset;
1147 int ret;
1148
1149 BUILD_BUG_ON(sizeof(chip->needed_fw_elms) * 8 < RTW89_FW_ELEMENT_ID_NUM);
1150
1151 offset = rtw89_mfw_get_size(rtwdev);
1152 offset = ALIGN(offset, RTW89_FW_ELEMENT_ALIGN);
1153 if (offset == 0)
1154 return -EINVAL;
1155
1156 while (offset + sizeof(*hdr) < firmware->size) {
1157 hdr = (const struct rtw89_fw_element_hdr *)(firmware->data + offset);
1158
1159 elm_size = le32_to_cpu(hdr->size);
1160 if (offset + elm_size >= firmware->size) {
1161 rtw89_warn(rtwdev, "firmware element size exceeds\n");
1162 break;
1163 }
1164
1165 elem_id = le32_to_cpu(hdr->id);
1166 if (elem_id >= ARRAY_SIZE(__fw_element_handlers))
1167 goto next;
1168
1169 handler = &__fw_element_handlers[elem_id];
1170 if (!handler->fn)
1171 goto next;
1172
1173 ret = handler->fn(rtwdev, hdr, handler->arg);
1174 if (ret == 1) /* ignore this element */
1175 goto next;
1176 if (ret)
1177 return ret;
1178
1179 if (handler->name)
1180 rtw89_info(rtwdev, "Firmware element %s version: %4ph\n",
1181 handler->name, hdr->ver);
1182
1183 unrecognized_elements &= ~BIT(elem_id);
1184 next:
1185 offset += sizeof(*hdr) + elm_size;
1186 offset = ALIGN(offset, RTW89_FW_ELEMENT_ALIGN);
1187 }
1188
1189 if (unrecognized_elements) {
1190 rtw89_err(rtwdev, "Firmware elements 0x%08x are unrecognized\n",
1191 unrecognized_elements);
1192 return -ENOENT;
1193 }
1194
1195 return 0;
1196 }
1197
rtw89_h2c_pkt_set_hdr(struct rtw89_dev * rtwdev,struct sk_buff * skb,u8 type,u8 cat,u8 class,u8 func,bool rack,bool dack,u32 len)1198 void rtw89_h2c_pkt_set_hdr(struct rtw89_dev *rtwdev, struct sk_buff *skb,
1199 u8 type, u8 cat, u8 class, u8 func,
1200 bool rack, bool dack, u32 len)
1201 {
1202 struct fwcmd_hdr *hdr;
1203
1204 hdr = (struct fwcmd_hdr *)skb_push(skb, 8);
1205
1206 if (!(rtwdev->fw.h2c_seq % 4))
1207 rack = true;
1208 hdr->hdr0 = cpu_to_le32(FIELD_PREP(H2C_HDR_DEL_TYPE, type) |
1209 FIELD_PREP(H2C_HDR_CAT, cat) |
1210 FIELD_PREP(H2C_HDR_CLASS, class) |
1211 FIELD_PREP(H2C_HDR_FUNC, func) |
1212 FIELD_PREP(H2C_HDR_H2C_SEQ, rtwdev->fw.h2c_seq));
1213
1214 hdr->hdr1 = cpu_to_le32(FIELD_PREP(H2C_HDR_TOTAL_LEN,
1215 len + H2C_HEADER_LEN) |
1216 (rack ? H2C_HDR_REC_ACK : 0) |
1217 (dack ? H2C_HDR_DONE_ACK : 0));
1218
1219 rtwdev->fw.h2c_seq++;
1220 }
1221
rtw89_h2c_pkt_set_hdr_fwdl(struct rtw89_dev * rtwdev,struct sk_buff * skb,u8 type,u8 cat,u8 class,u8 func,u32 len)1222 static void rtw89_h2c_pkt_set_hdr_fwdl(struct rtw89_dev *rtwdev,
1223 struct sk_buff *skb,
1224 u8 type, u8 cat, u8 class, u8 func,
1225 u32 len)
1226 {
1227 struct fwcmd_hdr *hdr;
1228
1229 hdr = (struct fwcmd_hdr *)skb_push(skb, 8);
1230
1231 hdr->hdr0 = cpu_to_le32(FIELD_PREP(H2C_HDR_DEL_TYPE, type) |
1232 FIELD_PREP(H2C_HDR_CAT, cat) |
1233 FIELD_PREP(H2C_HDR_CLASS, class) |
1234 FIELD_PREP(H2C_HDR_FUNC, func) |
1235 FIELD_PREP(H2C_HDR_H2C_SEQ, rtwdev->fw.h2c_seq));
1236
1237 hdr->hdr1 = cpu_to_le32(FIELD_PREP(H2C_HDR_TOTAL_LEN,
1238 len + H2C_HEADER_LEN));
1239 }
1240
__rtw89_fw_download_tweak_hdr_v0(struct rtw89_dev * rtwdev,struct rtw89_fw_bin_info * info,struct rtw89_fw_hdr * fw_hdr)1241 static u32 __rtw89_fw_download_tweak_hdr_v0(struct rtw89_dev *rtwdev,
1242 struct rtw89_fw_bin_info *info,
1243 struct rtw89_fw_hdr *fw_hdr)
1244 {
1245 le32p_replace_bits(&fw_hdr->w7, FWDL_SECTION_PER_PKT_LEN,
1246 FW_HDR_W7_PART_SIZE);
1247
1248 return 0;
1249 }
1250
__rtw89_fw_download_tweak_hdr_v1(struct rtw89_dev * rtwdev,struct rtw89_fw_bin_info * info,struct rtw89_fw_hdr_v1 * fw_hdr)1251 static u32 __rtw89_fw_download_tweak_hdr_v1(struct rtw89_dev *rtwdev,
1252 struct rtw89_fw_bin_info *info,
1253 struct rtw89_fw_hdr_v1 *fw_hdr)
1254 {
1255 struct rtw89_fw_hdr_section_info *section_info;
1256 struct rtw89_fw_hdr_section_v1 *section;
1257 u8 dst_sec_idx = 0;
1258 u8 sec_idx;
1259
1260 le32p_replace_bits(&fw_hdr->w7, FWDL_SECTION_PER_PKT_LEN,
1261 FW_HDR_V1_W7_PART_SIZE);
1262
1263 for (sec_idx = 0; sec_idx < info->section_num; sec_idx++) {
1264 section_info = &info->section_info[sec_idx];
1265 section = &fw_hdr->sections[sec_idx];
1266
1267 if (section_info->ignore)
1268 continue;
1269
1270 if (dst_sec_idx != sec_idx)
1271 fw_hdr->sections[dst_sec_idx] = *section;
1272
1273 dst_sec_idx++;
1274 }
1275
1276 le32p_replace_bits(&fw_hdr->w6, dst_sec_idx, FW_HDR_V1_W6_SEC_NUM);
1277
1278 return (info->section_num - dst_sec_idx) * sizeof(*section);
1279 }
1280
__rtw89_fw_download_hdr(struct rtw89_dev * rtwdev,const struct rtw89_fw_suit * fw_suit,struct rtw89_fw_bin_info * info)1281 static int __rtw89_fw_download_hdr(struct rtw89_dev *rtwdev,
1282 const struct rtw89_fw_suit *fw_suit,
1283 struct rtw89_fw_bin_info *info)
1284 {
1285 u32 len = info->hdr_len - info->dynamic_hdr_len;
1286 struct rtw89_fw_hdr_v1 *fw_hdr_v1;
1287 const u8 *fw = fw_suit->data;
1288 struct rtw89_fw_hdr *fw_hdr;
1289 struct sk_buff *skb;
1290 u32 truncated;
1291 u32 ret = 0;
1292
1293 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
1294 if (!skb) {
1295 rtw89_err(rtwdev, "failed to alloc skb for fw hdr dl\n");
1296 return -ENOMEM;
1297 }
1298
1299 skb_put_data(skb, fw, len);
1300
1301 switch (fw_suit->hdr_ver) {
1302 case 0:
1303 fw_hdr = (struct rtw89_fw_hdr *)skb->data;
1304 truncated = __rtw89_fw_download_tweak_hdr_v0(rtwdev, info, fw_hdr);
1305 break;
1306 case 1:
1307 fw_hdr_v1 = (struct rtw89_fw_hdr_v1 *)skb->data;
1308 truncated = __rtw89_fw_download_tweak_hdr_v1(rtwdev, info, fw_hdr_v1);
1309 break;
1310 default:
1311 ret = -EOPNOTSUPP;
1312 goto fail;
1313 }
1314
1315 if (truncated) {
1316 len -= truncated;
1317 skb_trim(skb, len);
1318 }
1319
1320 rtw89_h2c_pkt_set_hdr_fwdl(rtwdev, skb, FWCMD_TYPE_H2C,
1321 H2C_CAT_MAC, H2C_CL_MAC_FWDL,
1322 H2C_FUNC_MAC_FWHDR_DL, len);
1323
1324 ret = rtw89_h2c_tx(rtwdev, skb, false);
1325 if (ret) {
1326 rtw89_err(rtwdev, "failed to send h2c\n");
1327 goto fail;
1328 }
1329
1330 return 0;
1331 fail:
1332 dev_kfree_skb_any(skb);
1333
1334 return ret;
1335 }
1336
rtw89_fw_download_hdr(struct rtw89_dev * rtwdev,const struct rtw89_fw_suit * fw_suit,struct rtw89_fw_bin_info * info)1337 static int rtw89_fw_download_hdr(struct rtw89_dev *rtwdev,
1338 const struct rtw89_fw_suit *fw_suit,
1339 struct rtw89_fw_bin_info *info)
1340 {
1341 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
1342 int ret;
1343
1344 ret = __rtw89_fw_download_hdr(rtwdev, fw_suit, info);
1345 if (ret) {
1346 rtw89_err(rtwdev, "[ERR]FW header download\n");
1347 return ret;
1348 }
1349
1350 ret = mac->fwdl_check_path_ready(rtwdev, false);
1351 if (ret) {
1352 rtw89_err(rtwdev, "[ERR]FWDL path ready\n");
1353 return ret;
1354 }
1355
1356 rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, 0);
1357 rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0);
1358
1359 return 0;
1360 }
1361
__rtw89_fw_download_main(struct rtw89_dev * rtwdev,struct rtw89_fw_hdr_section_info * info)1362 static int __rtw89_fw_download_main(struct rtw89_dev *rtwdev,
1363 struct rtw89_fw_hdr_section_info *info)
1364 {
1365 struct sk_buff *skb;
1366 const u8 *section = info->addr;
1367 u32 residue_len = info->len;
1368 bool copy_key = false;
1369 u32 pkt_len;
1370 int ret;
1371
1372 if (info->ignore)
1373 return 0;
1374
1375 if (info->key_addr && info->key_len) {
1376 if (info->len > FWDL_SECTION_PER_PKT_LEN || info->len < info->key_len)
1377 rtw89_warn(rtwdev, "ignore to copy key data because of len %d, %d, %d\n",
1378 info->len, FWDL_SECTION_PER_PKT_LEN, info->key_len);
1379 else
1380 copy_key = true;
1381 }
1382
1383 while (residue_len) {
1384 if (residue_len >= FWDL_SECTION_PER_PKT_LEN)
1385 pkt_len = FWDL_SECTION_PER_PKT_LEN;
1386 else
1387 pkt_len = residue_len;
1388
1389 skb = rtw89_fw_h2c_alloc_skb_no_hdr(rtwdev, pkt_len);
1390 if (!skb) {
1391 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
1392 return -ENOMEM;
1393 }
1394 skb_put_data(skb, section, pkt_len);
1395
1396 if (copy_key)
1397 memcpy(skb->data + pkt_len - info->key_len,
1398 info->key_addr, info->key_len);
1399
1400 ret = rtw89_h2c_tx(rtwdev, skb, true);
1401 if (ret) {
1402 rtw89_err(rtwdev, "failed to send h2c\n");
1403 goto fail;
1404 }
1405
1406 section += pkt_len;
1407 residue_len -= pkt_len;
1408 }
1409
1410 return 0;
1411 fail:
1412 dev_kfree_skb_any(skb);
1413
1414 return ret;
1415 }
1416
1417 static enum rtw89_fwdl_check_type
rtw89_fw_get_fwdl_chk_type_from_suit(struct rtw89_dev * rtwdev,const struct rtw89_fw_suit * fw_suit)1418 rtw89_fw_get_fwdl_chk_type_from_suit(struct rtw89_dev *rtwdev,
1419 const struct rtw89_fw_suit *fw_suit)
1420 {
1421 switch (fw_suit->type) {
1422 case RTW89_FW_BBMCU0:
1423 return RTW89_FWDL_CHECK_BB0_FWDL_DONE;
1424 case RTW89_FW_BBMCU1:
1425 return RTW89_FWDL_CHECK_BB1_FWDL_DONE;
1426 default:
1427 return RTW89_FWDL_CHECK_WCPU_FWDL_DONE;
1428 }
1429 }
1430
rtw89_fw_download_main(struct rtw89_dev * rtwdev,const struct rtw89_fw_suit * fw_suit,struct rtw89_fw_bin_info * info)1431 static int rtw89_fw_download_main(struct rtw89_dev *rtwdev,
1432 const struct rtw89_fw_suit *fw_suit,
1433 struct rtw89_fw_bin_info *info)
1434 {
1435 struct rtw89_fw_hdr_section_info *section_info = info->section_info;
1436 const struct rtw89_chip_info *chip = rtwdev->chip;
1437 enum rtw89_fwdl_check_type chk_type;
1438 u8 section_num = info->section_num;
1439 int ret;
1440
1441 while (section_num--) {
1442 ret = __rtw89_fw_download_main(rtwdev, section_info);
1443 if (ret)
1444 return ret;
1445 section_info++;
1446 }
1447
1448 if (chip->chip_gen == RTW89_CHIP_AX)
1449 return 0;
1450
1451 chk_type = rtw89_fw_get_fwdl_chk_type_from_suit(rtwdev, fw_suit);
1452 ret = rtw89_fw_check_rdy(rtwdev, chk_type);
1453 if (ret) {
1454 rtw89_warn(rtwdev, "failed to download firmware type %u\n",
1455 fw_suit->type);
1456 return ret;
1457 }
1458
1459 return 0;
1460 }
1461
rtw89_fw_prog_cnt_dump(struct rtw89_dev * rtwdev)1462 static void rtw89_fw_prog_cnt_dump(struct rtw89_dev *rtwdev)
1463 {
1464 enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen;
1465 u32 addr = R_AX_DBG_PORT_SEL;
1466 u32 val32;
1467 u16 index;
1468
1469 if (chip_gen == RTW89_CHIP_BE) {
1470 addr = R_BE_WLCPU_PORT_PC;
1471 goto dump;
1472 }
1473
1474 rtw89_write32(rtwdev, R_AX_DBG_CTRL,
1475 FIELD_PREP(B_AX_DBG_SEL0, FW_PROG_CNTR_DBG_SEL) |
1476 FIELD_PREP(B_AX_DBG_SEL1, FW_PROG_CNTR_DBG_SEL));
1477 rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, B_AX_SEL_0XC0_MASK, MAC_DBG_SEL);
1478
1479 dump:
1480 for (index = 0; index < 15; index++) {
1481 val32 = rtw89_read32(rtwdev, addr);
1482 rtw89_err(rtwdev, "[ERR]fw PC = 0x%x\n", val32);
1483 fsleep(10);
1484 }
1485 }
1486
rtw89_fw_dl_fail_dump(struct rtw89_dev * rtwdev)1487 static void rtw89_fw_dl_fail_dump(struct rtw89_dev *rtwdev)
1488 {
1489 u32 val32;
1490
1491 val32 = rtw89_read32(rtwdev, R_AX_WCPU_FW_CTRL);
1492 rtw89_err(rtwdev, "[ERR]fwdl 0x1E0 = 0x%x\n", val32);
1493
1494 val32 = rtw89_read32(rtwdev, R_AX_BOOT_DBG);
1495 rtw89_err(rtwdev, "[ERR]fwdl 0x83F0 = 0x%x\n", val32);
1496
1497 rtw89_fw_prog_cnt_dump(rtwdev);
1498 }
1499
rtw89_fw_download_suit(struct rtw89_dev * rtwdev,struct rtw89_fw_suit * fw_suit)1500 static int rtw89_fw_download_suit(struct rtw89_dev *rtwdev,
1501 struct rtw89_fw_suit *fw_suit)
1502 {
1503 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
1504 struct rtw89_fw_bin_info info = {};
1505 int ret;
1506
1507 ret = rtw89_fw_hdr_parser(rtwdev, fw_suit, &info);
1508 if (ret) {
1509 rtw89_err(rtwdev, "parse fw header fail\n");
1510 return ret;
1511 }
1512
1513 if (rtwdev->chip->chip_id == RTL8922A &&
1514 (fw_suit->type == RTW89_FW_NORMAL || fw_suit->type == RTW89_FW_WOWLAN))
1515 rtw89_write32(rtwdev, R_BE_SECURE_BOOT_MALLOC_INFO, 0x20248000);
1516
1517 ret = mac->fwdl_check_path_ready(rtwdev, true);
1518 if (ret) {
1519 rtw89_err(rtwdev, "[ERR]H2C path ready\n");
1520 return ret;
1521 }
1522
1523 ret = rtw89_fw_download_hdr(rtwdev, fw_suit, &info);
1524 if (ret)
1525 return ret;
1526
1527 ret = rtw89_fw_download_main(rtwdev, fw_suit, &info);
1528 if (ret)
1529 return ret;
1530
1531 return 0;
1532 }
1533
1534 static
__rtw89_fw_download(struct rtw89_dev * rtwdev,enum rtw89_fw_type type,bool include_bb)1535 int __rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type,
1536 bool include_bb)
1537 {
1538 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
1539 struct rtw89_fw_info *fw_info = &rtwdev->fw;
1540 struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, type);
1541 u8 bbmcu_nr = rtwdev->chip->bbmcu_nr;
1542 int ret;
1543 int i;
1544
1545 mac->disable_cpu(rtwdev);
1546 ret = mac->fwdl_enable_wcpu(rtwdev, 0, true, include_bb);
1547 if (ret)
1548 return ret;
1549
1550 ret = rtw89_fw_download_suit(rtwdev, fw_suit);
1551 if (ret)
1552 goto fwdl_err;
1553
1554 for (i = 0; i < bbmcu_nr && include_bb; i++) {
1555 fw_suit = rtw89_fw_suit_get(rtwdev, RTW89_FW_BBMCU0 + i);
1556
1557 ret = rtw89_fw_download_suit(rtwdev, fw_suit);
1558 if (ret)
1559 goto fwdl_err;
1560 }
1561
1562 fw_info->h2c_seq = 0;
1563 fw_info->rec_seq = 0;
1564 fw_info->h2c_counter = 0;
1565 fw_info->c2h_counter = 0;
1566 rtwdev->mac.rpwm_seq_num = RPWM_SEQ_NUM_MAX;
1567 rtwdev->mac.cpwm_seq_num = CPWM_SEQ_NUM_MAX;
1568
1569 mdelay(5);
1570
1571 ret = rtw89_fw_check_rdy(rtwdev, RTW89_FWDL_CHECK_FREERTOS_DONE);
1572 if (ret) {
1573 rtw89_warn(rtwdev, "download firmware fail\n");
1574 goto fwdl_err;
1575 }
1576
1577 return ret;
1578
1579 fwdl_err:
1580 rtw89_fw_dl_fail_dump(rtwdev);
1581 return ret;
1582 }
1583
rtw89_fw_download(struct rtw89_dev * rtwdev,enum rtw89_fw_type type,bool include_bb)1584 int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type,
1585 bool include_bb)
1586 {
1587 int retry;
1588 int ret;
1589
1590 for (retry = 0; retry < 5; retry++) {
1591 ret = __rtw89_fw_download(rtwdev, type, include_bb);
1592 if (!ret)
1593 return 0;
1594 }
1595
1596 return ret;
1597 }
1598
rtw89_wait_firmware_completion(struct rtw89_dev * rtwdev)1599 int rtw89_wait_firmware_completion(struct rtw89_dev *rtwdev)
1600 {
1601 struct rtw89_fw_info *fw = &rtwdev->fw;
1602
1603 wait_for_completion(&fw->req.completion);
1604 if (!fw->req.firmware)
1605 return -EINVAL;
1606
1607 return 0;
1608 }
1609
rtw89_load_firmware_req(struct rtw89_dev * rtwdev,struct rtw89_fw_req_info * req,const char * fw_name,bool nowarn)1610 static int rtw89_load_firmware_req(struct rtw89_dev *rtwdev,
1611 struct rtw89_fw_req_info *req,
1612 const char *fw_name, bool nowarn)
1613 {
1614 int ret;
1615
1616 if (req->firmware) {
1617 rtw89_debug(rtwdev, RTW89_DBG_FW,
1618 "full firmware has been early requested\n");
1619 complete_all(&req->completion);
1620 return 0;
1621 }
1622
1623 if (nowarn)
1624 ret = firmware_request_nowarn(&req->firmware, fw_name, rtwdev->dev);
1625 else
1626 ret = request_firmware(&req->firmware, fw_name, rtwdev->dev);
1627
1628 complete_all(&req->completion);
1629
1630 return ret;
1631 }
1632
rtw89_load_firmware_work(struct work_struct * work)1633 void rtw89_load_firmware_work(struct work_struct *work)
1634 {
1635 struct rtw89_dev *rtwdev =
1636 container_of(work, struct rtw89_dev, load_firmware_work);
1637 const struct rtw89_chip_info *chip = rtwdev->chip;
1638 char fw_name[64];
1639
1640 rtw89_fw_get_filename(fw_name, sizeof(fw_name),
1641 chip->fw_basename, rtwdev->fw.fw_format);
1642
1643 rtw89_load_firmware_req(rtwdev, &rtwdev->fw.req, fw_name, false);
1644 }
1645
rtw89_free_phy_tbl_from_elm(struct rtw89_phy_table * tbl)1646 static void rtw89_free_phy_tbl_from_elm(struct rtw89_phy_table *tbl)
1647 {
1648 if (!tbl)
1649 return;
1650
1651 kfree(tbl->regs);
1652 kfree(tbl);
1653 }
1654
rtw89_unload_firmware_elements(struct rtw89_dev * rtwdev)1655 static void rtw89_unload_firmware_elements(struct rtw89_dev *rtwdev)
1656 {
1657 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info;
1658 int i;
1659
1660 rtw89_free_phy_tbl_from_elm(elm_info->bb_tbl);
1661 rtw89_free_phy_tbl_from_elm(elm_info->bb_gain);
1662 for (i = 0; i < ARRAY_SIZE(elm_info->rf_radio); i++)
1663 rtw89_free_phy_tbl_from_elm(elm_info->rf_radio[i]);
1664 rtw89_free_phy_tbl_from_elm(elm_info->rf_nctl);
1665
1666 kfree(elm_info->txpwr_trk);
1667 kfree(elm_info->rfk_log_fmt);
1668 }
1669
rtw89_unload_firmware(struct rtw89_dev * rtwdev)1670 void rtw89_unload_firmware(struct rtw89_dev *rtwdev)
1671 {
1672 struct rtw89_fw_info *fw = &rtwdev->fw;
1673
1674 cancel_work_sync(&rtwdev->load_firmware_work);
1675
1676 if (fw->req.firmware) {
1677 release_firmware(fw->req.firmware);
1678
1679 /* assign NULL back in case rtw89_free_ieee80211_hw()
1680 * try to release the same one again.
1681 */
1682 fw->req.firmware = NULL;
1683 }
1684
1685 kfree(fw->log.fmts);
1686 rtw89_unload_firmware_elements(rtwdev);
1687 }
1688
rtw89_fw_log_get_fmt_idx(struct rtw89_dev * rtwdev,u32 fmt_id)1689 static u32 rtw89_fw_log_get_fmt_idx(struct rtw89_dev *rtwdev, u32 fmt_id)
1690 {
1691 struct rtw89_fw_log *fw_log = &rtwdev->fw.log;
1692 u32 i;
1693
1694 if (fmt_id > fw_log->last_fmt_id)
1695 return 0;
1696
1697 for (i = 0; i < fw_log->fmt_count; i++) {
1698 if (le32_to_cpu(fw_log->fmt_ids[i]) == fmt_id)
1699 return i;
1700 }
1701 return 0;
1702 }
1703
rtw89_fw_log_create_fmts_dict(struct rtw89_dev * rtwdev)1704 static int rtw89_fw_log_create_fmts_dict(struct rtw89_dev *rtwdev)
1705 {
1706 struct rtw89_fw_log *log = &rtwdev->fw.log;
1707 const struct rtw89_fw_logsuit_hdr *suit_hdr;
1708 struct rtw89_fw_suit *suit = &log->suit;
1709 const void *fmts_ptr, *fmts_end_ptr;
1710 u32 fmt_count;
1711 int i;
1712
1713 suit_hdr = (const struct rtw89_fw_logsuit_hdr *)suit->data;
1714 fmt_count = le32_to_cpu(suit_hdr->count);
1715 log->fmt_ids = suit_hdr->ids;
1716 fmts_ptr = &suit_hdr->ids[fmt_count];
1717 fmts_end_ptr = suit->data + suit->size;
1718 log->fmts = kcalloc(fmt_count, sizeof(char *), GFP_KERNEL);
1719 if (!log->fmts)
1720 return -ENOMEM;
1721
1722 for (i = 0; i < fmt_count; i++) {
1723 fmts_ptr = memchr_inv(fmts_ptr, 0, fmts_end_ptr - fmts_ptr);
1724 if (!fmts_ptr)
1725 break;
1726
1727 (*log->fmts)[i] = fmts_ptr;
1728 log->last_fmt_id = le32_to_cpu(log->fmt_ids[i]);
1729 log->fmt_count++;
1730 fmts_ptr += strlen(fmts_ptr);
1731 }
1732
1733 return 0;
1734 }
1735
rtw89_fw_log_prepare(struct rtw89_dev * rtwdev)1736 int rtw89_fw_log_prepare(struct rtw89_dev *rtwdev)
1737 {
1738 struct rtw89_fw_log *log = &rtwdev->fw.log;
1739 struct rtw89_fw_suit *suit = &log->suit;
1740
1741 if (!suit || !suit->data) {
1742 rtw89_debug(rtwdev, RTW89_DBG_FW, "no log format file\n");
1743 return -EINVAL;
1744 }
1745 if (log->fmts)
1746 return 0;
1747
1748 return rtw89_fw_log_create_fmts_dict(rtwdev);
1749 }
1750
rtw89_fw_log_dump_data(struct rtw89_dev * rtwdev,const struct rtw89_fw_c2h_log_fmt * log_fmt,u32 fmt_idx,u8 para_int,bool raw_data)1751 static void rtw89_fw_log_dump_data(struct rtw89_dev *rtwdev,
1752 const struct rtw89_fw_c2h_log_fmt *log_fmt,
1753 u32 fmt_idx, u8 para_int, bool raw_data)
1754 {
1755 const char *(*fmts)[] = rtwdev->fw.log.fmts;
1756 char str_buf[RTW89_C2H_FW_LOG_STR_BUF_SIZE];
1757 u32 args[RTW89_C2H_FW_LOG_MAX_PARA_NUM] = {0};
1758 int i;
1759
1760 if (log_fmt->argc > RTW89_C2H_FW_LOG_MAX_PARA_NUM) {
1761 rtw89_warn(rtwdev, "C2H log: Arg count is unexpected %d\n",
1762 log_fmt->argc);
1763 return;
1764 }
1765
1766 if (para_int)
1767 for (i = 0 ; i < log_fmt->argc; i++)
1768 args[i] = le32_to_cpu(log_fmt->u.argv[i]);
1769
1770 if (raw_data) {
1771 if (para_int)
1772 snprintf(str_buf, RTW89_C2H_FW_LOG_STR_BUF_SIZE,
1773 "fw_enc(%d, %d, %d) %*ph", le32_to_cpu(log_fmt->fmt_id),
1774 para_int, log_fmt->argc, (int)sizeof(args), args);
1775 else
1776 snprintf(str_buf, RTW89_C2H_FW_LOG_STR_BUF_SIZE,
1777 "fw_enc(%d, %d, %d, %s)", le32_to_cpu(log_fmt->fmt_id),
1778 para_int, log_fmt->argc, log_fmt->u.raw);
1779 } else {
1780 snprintf(str_buf, RTW89_C2H_FW_LOG_STR_BUF_SIZE, (*fmts)[fmt_idx],
1781 args[0x0], args[0x1], args[0x2], args[0x3], args[0x4],
1782 args[0x5], args[0x6], args[0x7], args[0x8], args[0x9],
1783 args[0xa], args[0xb], args[0xc], args[0xd], args[0xe],
1784 args[0xf]);
1785 }
1786
1787 rtw89_info(rtwdev, "C2H log: %s", str_buf);
1788 }
1789
rtw89_fw_log_dump(struct rtw89_dev * rtwdev,u8 * buf,u32 len)1790 void rtw89_fw_log_dump(struct rtw89_dev *rtwdev, u8 *buf, u32 len)
1791 {
1792 const struct rtw89_fw_c2h_log_fmt *log_fmt;
1793 u8 para_int;
1794 u32 fmt_idx;
1795
1796 if (len < RTW89_C2H_HEADER_LEN) {
1797 rtw89_err(rtwdev, "c2h log length is wrong!\n");
1798 return;
1799 }
1800
1801 buf += RTW89_C2H_HEADER_LEN;
1802 len -= RTW89_C2H_HEADER_LEN;
1803 log_fmt = (const struct rtw89_fw_c2h_log_fmt *)buf;
1804
1805 if (len < RTW89_C2H_FW_FORMATTED_LOG_MIN_LEN)
1806 goto plain_log;
1807
1808 if (log_fmt->signature != cpu_to_le16(RTW89_C2H_FW_LOG_SIGNATURE))
1809 goto plain_log;
1810
1811 if (!rtwdev->fw.log.fmts)
1812 return;
1813
1814 para_int = u8_get_bits(log_fmt->feature, RTW89_C2H_FW_LOG_FEATURE_PARA_INT);
1815 fmt_idx = rtw89_fw_log_get_fmt_idx(rtwdev, le32_to_cpu(log_fmt->fmt_id));
1816
1817 if (!para_int && log_fmt->argc != 0 && fmt_idx != 0)
1818 rtw89_info(rtwdev, "C2H log: %s%s",
1819 (*rtwdev->fw.log.fmts)[fmt_idx], log_fmt->u.raw);
1820 else if (fmt_idx != 0 && para_int)
1821 rtw89_fw_log_dump_data(rtwdev, log_fmt, fmt_idx, para_int, false);
1822 else
1823 rtw89_fw_log_dump_data(rtwdev, log_fmt, fmt_idx, para_int, true);
1824 return;
1825
1826 plain_log:
1827 rtw89_info(rtwdev, "C2H log: %.*s", len, buf);
1828
1829 }
1830
1831 #define H2C_CAM_LEN 60
rtw89_fw_h2c_cam(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link,const u8 * scan_mac_addr)1832 int rtw89_fw_h2c_cam(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
1833 struct rtw89_sta_link *rtwsta_link, const u8 *scan_mac_addr)
1834 {
1835 struct sk_buff *skb;
1836 int ret;
1837
1838 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CAM_LEN);
1839 if (!skb) {
1840 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
1841 return -ENOMEM;
1842 }
1843 skb_put(skb, H2C_CAM_LEN);
1844 rtw89_cam_fill_addr_cam_info(rtwdev, rtwvif_link, rtwsta_link, scan_mac_addr,
1845 skb->data);
1846 rtw89_cam_fill_bssid_cam_info(rtwdev, rtwvif_link, rtwsta_link, skb->data);
1847
1848 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
1849 H2C_CAT_MAC,
1850 H2C_CL_MAC_ADDR_CAM_UPDATE,
1851 H2C_FUNC_MAC_ADDR_CAM_UPD, 0, 1,
1852 H2C_CAM_LEN);
1853
1854 ret = rtw89_h2c_tx(rtwdev, skb, false);
1855 if (ret) {
1856 rtw89_err(rtwdev, "failed to send h2c\n");
1857 goto fail;
1858 }
1859
1860 return 0;
1861 fail:
1862 dev_kfree_skb_any(skb);
1863
1864 return ret;
1865 }
1866
rtw89_fw_h2c_dctl_sec_cam_v1(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)1867 int rtw89_fw_h2c_dctl_sec_cam_v1(struct rtw89_dev *rtwdev,
1868 struct rtw89_vif_link *rtwvif_link,
1869 struct rtw89_sta_link *rtwsta_link)
1870 {
1871 struct rtw89_h2c_dctlinfo_ud_v1 *h2c;
1872 u32 len = sizeof(*h2c);
1873 struct sk_buff *skb;
1874 int ret;
1875
1876 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
1877 if (!skb) {
1878 rtw89_err(rtwdev, "failed to alloc skb for dctl sec cam\n");
1879 return -ENOMEM;
1880 }
1881 skb_put(skb, len);
1882 h2c = (struct rtw89_h2c_dctlinfo_ud_v1 *)skb->data;
1883
1884 rtw89_cam_fill_dctl_sec_cam_info_v1(rtwdev, rtwvif_link, rtwsta_link, h2c);
1885
1886 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
1887 H2C_CAT_MAC,
1888 H2C_CL_MAC_FR_EXCHG,
1889 H2C_FUNC_MAC_DCTLINFO_UD_V1, 0, 0,
1890 len);
1891
1892 ret = rtw89_h2c_tx(rtwdev, skb, false);
1893 if (ret) {
1894 rtw89_err(rtwdev, "failed to send h2c\n");
1895 goto fail;
1896 }
1897
1898 return 0;
1899 fail:
1900 dev_kfree_skb_any(skb);
1901
1902 return ret;
1903 }
1904 EXPORT_SYMBOL(rtw89_fw_h2c_dctl_sec_cam_v1);
1905
rtw89_fw_h2c_dctl_sec_cam_v2(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)1906 int rtw89_fw_h2c_dctl_sec_cam_v2(struct rtw89_dev *rtwdev,
1907 struct rtw89_vif_link *rtwvif_link,
1908 struct rtw89_sta_link *rtwsta_link)
1909 {
1910 struct rtw89_h2c_dctlinfo_ud_v2 *h2c;
1911 u32 len = sizeof(*h2c);
1912 struct sk_buff *skb;
1913 int ret;
1914
1915 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
1916 if (!skb) {
1917 rtw89_err(rtwdev, "failed to alloc skb for dctl sec cam\n");
1918 return -ENOMEM;
1919 }
1920 skb_put(skb, len);
1921 h2c = (struct rtw89_h2c_dctlinfo_ud_v2 *)skb->data;
1922
1923 rtw89_cam_fill_dctl_sec_cam_info_v2(rtwdev, rtwvif_link, rtwsta_link, h2c);
1924
1925 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
1926 H2C_CAT_MAC,
1927 H2C_CL_MAC_FR_EXCHG,
1928 H2C_FUNC_MAC_DCTLINFO_UD_V2, 0, 0,
1929 len);
1930
1931 ret = rtw89_h2c_tx(rtwdev, skb, false);
1932 if (ret) {
1933 rtw89_err(rtwdev, "failed to send h2c\n");
1934 goto fail;
1935 }
1936
1937 return 0;
1938 fail:
1939 dev_kfree_skb_any(skb);
1940
1941 return ret;
1942 }
1943 EXPORT_SYMBOL(rtw89_fw_h2c_dctl_sec_cam_v2);
1944
rtw89_fw_h2c_default_dmac_tbl_v2(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)1945 int rtw89_fw_h2c_default_dmac_tbl_v2(struct rtw89_dev *rtwdev,
1946 struct rtw89_vif_link *rtwvif_link,
1947 struct rtw89_sta_link *rtwsta_link)
1948 {
1949 u8 mac_id = rtwsta_link ? rtwsta_link->mac_id : rtwvif_link->mac_id;
1950 struct rtw89_h2c_dctlinfo_ud_v2 *h2c;
1951 u32 len = sizeof(*h2c);
1952 struct sk_buff *skb;
1953 int ret;
1954
1955 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
1956 if (!skb) {
1957 rtw89_err(rtwdev, "failed to alloc skb for dctl v2\n");
1958 return -ENOMEM;
1959 }
1960 skb_put(skb, len);
1961 h2c = (struct rtw89_h2c_dctlinfo_ud_v2 *)skb->data;
1962
1963 h2c->c0 = le32_encode_bits(mac_id, DCTLINFO_V2_C0_MACID) |
1964 le32_encode_bits(1, DCTLINFO_V2_C0_OP);
1965
1966 h2c->m0 = cpu_to_le32(DCTLINFO_V2_W0_ALL);
1967 h2c->m1 = cpu_to_le32(DCTLINFO_V2_W1_ALL);
1968 h2c->m2 = cpu_to_le32(DCTLINFO_V2_W2_ALL);
1969 h2c->m3 = cpu_to_le32(DCTLINFO_V2_W3_ALL);
1970 h2c->m4 = cpu_to_le32(DCTLINFO_V2_W4_ALL);
1971 h2c->m5 = cpu_to_le32(DCTLINFO_V2_W5_ALL);
1972 h2c->m6 = cpu_to_le32(DCTLINFO_V2_W6_ALL);
1973 h2c->m7 = cpu_to_le32(DCTLINFO_V2_W7_ALL);
1974 h2c->m8 = cpu_to_le32(DCTLINFO_V2_W8_ALL);
1975 h2c->m9 = cpu_to_le32(DCTLINFO_V2_W9_ALL);
1976 h2c->m10 = cpu_to_le32(DCTLINFO_V2_W10_ALL);
1977 h2c->m11 = cpu_to_le32(DCTLINFO_V2_W11_ALL);
1978 h2c->m12 = cpu_to_le32(DCTLINFO_V2_W12_ALL);
1979
1980 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
1981 H2C_CAT_MAC,
1982 H2C_CL_MAC_FR_EXCHG,
1983 H2C_FUNC_MAC_DCTLINFO_UD_V2, 0, 0,
1984 len);
1985
1986 ret = rtw89_h2c_tx(rtwdev, skb, false);
1987 if (ret) {
1988 rtw89_err(rtwdev, "failed to send h2c\n");
1989 goto fail;
1990 }
1991
1992 return 0;
1993 fail:
1994 dev_kfree_skb_any(skb);
1995
1996 return ret;
1997 }
1998 EXPORT_SYMBOL(rtw89_fw_h2c_default_dmac_tbl_v2);
1999
rtw89_fw_h2c_ba_cam(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link,bool valid,struct ieee80211_ampdu_params * params)2000 int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev,
2001 struct rtw89_vif_link *rtwvif_link,
2002 struct rtw89_sta_link *rtwsta_link,
2003 bool valid, struct ieee80211_ampdu_params *params)
2004 {
2005 const struct rtw89_chip_info *chip = rtwdev->chip;
2006 struct rtw89_h2c_ba_cam *h2c;
2007 u8 macid = rtwsta_link->mac_id;
2008 u32 len = sizeof(*h2c);
2009 struct sk_buff *skb;
2010 u8 entry_idx;
2011 int ret;
2012
2013 ret = valid ?
2014 rtw89_core_acquire_sta_ba_entry(rtwdev, rtwsta_link, params->tid,
2015 &entry_idx) :
2016 rtw89_core_release_sta_ba_entry(rtwdev, rtwsta_link, params->tid,
2017 &entry_idx);
2018 if (ret) {
2019 /* it still works even if we don't have static BA CAM, because
2020 * hardware can create dynamic BA CAM automatically.
2021 */
2022 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2023 "failed to %s entry tid=%d for h2c ba cam\n",
2024 valid ? "alloc" : "free", params->tid);
2025 return 0;
2026 }
2027
2028 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
2029 if (!skb) {
2030 rtw89_err(rtwdev, "failed to alloc skb for h2c ba cam\n");
2031 return -ENOMEM;
2032 }
2033 skb_put(skb, len);
2034 h2c = (struct rtw89_h2c_ba_cam *)skb->data;
2035
2036 h2c->w0 = le32_encode_bits(macid, RTW89_H2C_BA_CAM_W0_MACID);
2037 if (chip->bacam_ver == RTW89_BACAM_V0_EXT)
2038 h2c->w1 |= le32_encode_bits(entry_idx, RTW89_H2C_BA_CAM_W1_ENTRY_IDX_V1);
2039 else
2040 h2c->w0 |= le32_encode_bits(entry_idx, RTW89_H2C_BA_CAM_W0_ENTRY_IDX);
2041 if (!valid)
2042 goto end;
2043 h2c->w0 |= le32_encode_bits(valid, RTW89_H2C_BA_CAM_W0_VALID) |
2044 le32_encode_bits(params->tid, RTW89_H2C_BA_CAM_W0_TID);
2045 if (params->buf_size > 64)
2046 h2c->w0 |= le32_encode_bits(4, RTW89_H2C_BA_CAM_W0_BMAP_SIZE);
2047 else
2048 h2c->w0 |= le32_encode_bits(0, RTW89_H2C_BA_CAM_W0_BMAP_SIZE);
2049 /* If init req is set, hw will set the ssn */
2050 h2c->w0 |= le32_encode_bits(1, RTW89_H2C_BA_CAM_W0_INIT_REQ) |
2051 le32_encode_bits(params->ssn, RTW89_H2C_BA_CAM_W0_SSN);
2052
2053 if (chip->bacam_ver == RTW89_BACAM_V0_EXT) {
2054 h2c->w1 |= le32_encode_bits(1, RTW89_H2C_BA_CAM_W1_STD_EN) |
2055 le32_encode_bits(rtwvif_link->mac_idx,
2056 RTW89_H2C_BA_CAM_W1_BAND);
2057 }
2058
2059 end:
2060 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2061 H2C_CAT_MAC,
2062 H2C_CL_BA_CAM,
2063 H2C_FUNC_MAC_BA_CAM, 0, 1,
2064 len);
2065
2066 ret = rtw89_h2c_tx(rtwdev, skb, false);
2067 if (ret) {
2068 rtw89_err(rtwdev, "failed to send h2c\n");
2069 goto fail;
2070 }
2071
2072 return 0;
2073 fail:
2074 dev_kfree_skb_any(skb);
2075
2076 return ret;
2077 }
2078 EXPORT_SYMBOL(rtw89_fw_h2c_ba_cam);
2079
rtw89_fw_h2c_init_ba_cam_v0_ext(struct rtw89_dev * rtwdev,u8 entry_idx,u8 uid)2080 static int rtw89_fw_h2c_init_ba_cam_v0_ext(struct rtw89_dev *rtwdev,
2081 u8 entry_idx, u8 uid)
2082 {
2083 struct rtw89_h2c_ba_cam *h2c;
2084 u32 len = sizeof(*h2c);
2085 struct sk_buff *skb;
2086 int ret;
2087
2088 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
2089 if (!skb) {
2090 rtw89_err(rtwdev, "failed to alloc skb for dynamic h2c ba cam\n");
2091 return -ENOMEM;
2092 }
2093 skb_put(skb, len);
2094 h2c = (struct rtw89_h2c_ba_cam *)skb->data;
2095
2096 h2c->w0 = le32_encode_bits(1, RTW89_H2C_BA_CAM_W0_VALID);
2097 h2c->w1 = le32_encode_bits(entry_idx, RTW89_H2C_BA_CAM_W1_ENTRY_IDX_V1) |
2098 le32_encode_bits(uid, RTW89_H2C_BA_CAM_W1_UID) |
2099 le32_encode_bits(0, RTW89_H2C_BA_CAM_W1_BAND) |
2100 le32_encode_bits(0, RTW89_H2C_BA_CAM_W1_STD_EN);
2101
2102 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2103 H2C_CAT_MAC,
2104 H2C_CL_BA_CAM,
2105 H2C_FUNC_MAC_BA_CAM, 0, 1,
2106 len);
2107
2108 ret = rtw89_h2c_tx(rtwdev, skb, false);
2109 if (ret) {
2110 rtw89_err(rtwdev, "failed to send h2c\n");
2111 goto fail;
2112 }
2113
2114 return 0;
2115 fail:
2116 dev_kfree_skb_any(skb);
2117
2118 return ret;
2119 }
2120
rtw89_fw_h2c_init_dynamic_ba_cam_v0_ext(struct rtw89_dev * rtwdev)2121 void rtw89_fw_h2c_init_dynamic_ba_cam_v0_ext(struct rtw89_dev *rtwdev)
2122 {
2123 const struct rtw89_chip_info *chip = rtwdev->chip;
2124 u8 entry_idx = chip->bacam_num;
2125 u8 uid = 0;
2126 int i;
2127
2128 for (i = 0; i < chip->bacam_dynamic_num; i++) {
2129 rtw89_fw_h2c_init_ba_cam_v0_ext(rtwdev, entry_idx, uid);
2130 entry_idx++;
2131 uid++;
2132 }
2133 }
2134
rtw89_fw_h2c_ba_cam_v1(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link,bool valid,struct ieee80211_ampdu_params * params)2135 int rtw89_fw_h2c_ba_cam_v1(struct rtw89_dev *rtwdev,
2136 struct rtw89_vif_link *rtwvif_link,
2137 struct rtw89_sta_link *rtwsta_link,
2138 bool valid, struct ieee80211_ampdu_params *params)
2139 {
2140 const struct rtw89_chip_info *chip = rtwdev->chip;
2141 struct rtw89_h2c_ba_cam_v1 *h2c;
2142 u8 macid = rtwsta_link->mac_id;
2143 u32 len = sizeof(*h2c);
2144 struct sk_buff *skb;
2145 u8 entry_idx;
2146 u8 bmap_size;
2147 int ret;
2148
2149 ret = valid ?
2150 rtw89_core_acquire_sta_ba_entry(rtwdev, rtwsta_link, params->tid,
2151 &entry_idx) :
2152 rtw89_core_release_sta_ba_entry(rtwdev, rtwsta_link, params->tid,
2153 &entry_idx);
2154 if (ret) {
2155 /* it still works even if we don't have static BA CAM, because
2156 * hardware can create dynamic BA CAM automatically.
2157 */
2158 rtw89_debug(rtwdev, RTW89_DBG_TXRX,
2159 "failed to %s entry tid=%d for h2c ba cam\n",
2160 valid ? "alloc" : "free", params->tid);
2161 return 0;
2162 }
2163
2164 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
2165 if (!skb) {
2166 rtw89_err(rtwdev, "failed to alloc skb for h2c ba cam\n");
2167 return -ENOMEM;
2168 }
2169 skb_put(skb, len);
2170 h2c = (struct rtw89_h2c_ba_cam_v1 *)skb->data;
2171
2172 if (params->buf_size > 512)
2173 bmap_size = 10;
2174 else if (params->buf_size > 256)
2175 bmap_size = 8;
2176 else if (params->buf_size > 64)
2177 bmap_size = 4;
2178 else
2179 bmap_size = 0;
2180
2181 h2c->w0 = le32_encode_bits(valid, RTW89_H2C_BA_CAM_V1_W0_VALID) |
2182 le32_encode_bits(1, RTW89_H2C_BA_CAM_V1_W0_INIT_REQ) |
2183 le32_encode_bits(macid, RTW89_H2C_BA_CAM_V1_W0_MACID_MASK) |
2184 le32_encode_bits(params->tid, RTW89_H2C_BA_CAM_V1_W0_TID_MASK) |
2185 le32_encode_bits(bmap_size, RTW89_H2C_BA_CAM_V1_W0_BMAP_SIZE_MASK) |
2186 le32_encode_bits(params->ssn, RTW89_H2C_BA_CAM_V1_W0_SSN_MASK);
2187
2188 entry_idx += chip->bacam_dynamic_num; /* std entry right after dynamic ones */
2189 h2c->w1 = le32_encode_bits(entry_idx, RTW89_H2C_BA_CAM_V1_W1_ENTRY_IDX_MASK) |
2190 le32_encode_bits(1, RTW89_H2C_BA_CAM_V1_W1_STD_ENTRY_EN) |
2191 le32_encode_bits(!!rtwvif_link->mac_idx,
2192 RTW89_H2C_BA_CAM_V1_W1_BAND_SEL);
2193
2194 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2195 H2C_CAT_MAC,
2196 H2C_CL_BA_CAM,
2197 H2C_FUNC_MAC_BA_CAM_V1, 0, 1,
2198 len);
2199
2200 ret = rtw89_h2c_tx(rtwdev, skb, false);
2201 if (ret) {
2202 rtw89_err(rtwdev, "failed to send h2c\n");
2203 goto fail;
2204 }
2205
2206 return 0;
2207 fail:
2208 dev_kfree_skb_any(skb);
2209
2210 return ret;
2211 }
2212 EXPORT_SYMBOL(rtw89_fw_h2c_ba_cam_v1);
2213
rtw89_fw_h2c_init_ba_cam_users(struct rtw89_dev * rtwdev,u8 users,u8 offset,u8 mac_idx)2214 int rtw89_fw_h2c_init_ba_cam_users(struct rtw89_dev *rtwdev, u8 users,
2215 u8 offset, u8 mac_idx)
2216 {
2217 struct rtw89_h2c_ba_cam_init *h2c;
2218 u32 len = sizeof(*h2c);
2219 struct sk_buff *skb;
2220 int ret;
2221
2222 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
2223 if (!skb) {
2224 rtw89_err(rtwdev, "failed to alloc skb for h2c ba cam init\n");
2225 return -ENOMEM;
2226 }
2227 skb_put(skb, len);
2228 h2c = (struct rtw89_h2c_ba_cam_init *)skb->data;
2229
2230 h2c->w0 = le32_encode_bits(users, RTW89_H2C_BA_CAM_INIT_USERS_MASK) |
2231 le32_encode_bits(offset, RTW89_H2C_BA_CAM_INIT_OFFSET_MASK) |
2232 le32_encode_bits(mac_idx, RTW89_H2C_BA_CAM_INIT_BAND_SEL);
2233
2234 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2235 H2C_CAT_MAC,
2236 H2C_CL_BA_CAM,
2237 H2C_FUNC_MAC_BA_CAM_INIT, 0, 1,
2238 len);
2239
2240 ret = rtw89_h2c_tx(rtwdev, skb, false);
2241 if (ret) {
2242 rtw89_err(rtwdev, "failed to send h2c\n");
2243 goto fail;
2244 }
2245
2246 return 0;
2247 fail:
2248 dev_kfree_skb_any(skb);
2249
2250 return ret;
2251 }
2252
2253 #define H2C_LOG_CFG_LEN 12
rtw89_fw_h2c_fw_log(struct rtw89_dev * rtwdev,bool enable)2254 int rtw89_fw_h2c_fw_log(struct rtw89_dev *rtwdev, bool enable)
2255 {
2256 struct sk_buff *skb;
2257 u32 comp = 0;
2258 int ret;
2259
2260 if (enable)
2261 comp = BIT(RTW89_FW_LOG_COMP_INIT) | BIT(RTW89_FW_LOG_COMP_TASK) |
2262 BIT(RTW89_FW_LOG_COMP_PS) | BIT(RTW89_FW_LOG_COMP_ERROR) |
2263 BIT(RTW89_FW_LOG_COMP_SCAN);
2264
2265 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LOG_CFG_LEN);
2266 if (!skb) {
2267 rtw89_err(rtwdev, "failed to alloc skb for fw log cfg\n");
2268 return -ENOMEM;
2269 }
2270
2271 skb_put(skb, H2C_LOG_CFG_LEN);
2272 SET_LOG_CFG_LEVEL(skb->data, RTW89_FW_LOG_LEVEL_LOUD);
2273 SET_LOG_CFG_PATH(skb->data, BIT(RTW89_FW_LOG_LEVEL_C2H));
2274 SET_LOG_CFG_COMP(skb->data, comp);
2275 SET_LOG_CFG_COMP_EXT(skb->data, 0);
2276
2277 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2278 H2C_CAT_MAC,
2279 H2C_CL_FW_INFO,
2280 H2C_FUNC_LOG_CFG, 0, 0,
2281 H2C_LOG_CFG_LEN);
2282
2283 ret = rtw89_h2c_tx(rtwdev, skb, false);
2284 if (ret) {
2285 rtw89_err(rtwdev, "failed to send h2c\n");
2286 goto fail;
2287 }
2288
2289 return 0;
2290 fail:
2291 dev_kfree_skb_any(skb);
2292
2293 return ret;
2294 }
2295
rtw89_eapol_get(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)2296 static struct sk_buff *rtw89_eapol_get(struct rtw89_dev *rtwdev,
2297 struct rtw89_vif_link *rtwvif_link)
2298 {
2299 static const u8 gtkbody[] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x88,
2300 0x8E, 0x01, 0x03, 0x00, 0x5F, 0x02, 0x03};
2301 u8 sec_hdr_len = rtw89_wow_get_sec_hdr_len(rtwdev);
2302 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
2303 struct rtw89_eapol_2_of_2 *eapol_pkt;
2304 struct ieee80211_bss_conf *bss_conf;
2305 struct ieee80211_hdr_3addr *hdr;
2306 struct sk_buff *skb;
2307 u8 key_des_ver;
2308
2309 if (rtw_wow->ptk_alg == 3)
2310 key_des_ver = 1;
2311 else if (rtw_wow->akm == 1 || rtw_wow->akm == 2)
2312 key_des_ver = 2;
2313 else if (rtw_wow->akm > 2 && rtw_wow->akm < 7)
2314 key_des_ver = 3;
2315 else
2316 key_des_ver = 0;
2317
2318 skb = dev_alloc_skb(sizeof(*hdr) + sec_hdr_len + sizeof(*eapol_pkt));
2319 if (!skb)
2320 return NULL;
2321
2322 hdr = skb_put_zero(skb, sizeof(*hdr));
2323 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA |
2324 IEEE80211_FCTL_TODS |
2325 IEEE80211_FCTL_PROTECTED);
2326
2327 rcu_read_lock();
2328
2329 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, true);
2330
2331 ether_addr_copy(hdr->addr1, bss_conf->bssid);
2332 ether_addr_copy(hdr->addr2, bss_conf->addr);
2333 ether_addr_copy(hdr->addr3, bss_conf->bssid);
2334
2335 rcu_read_unlock();
2336
2337 skb_put_zero(skb, sec_hdr_len);
2338
2339 eapol_pkt = skb_put_zero(skb, sizeof(*eapol_pkt));
2340 memcpy(eapol_pkt->gtkbody, gtkbody, sizeof(gtkbody));
2341 eapol_pkt->key_des_ver = key_des_ver;
2342
2343 return skb;
2344 }
2345
rtw89_sa_query_get(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)2346 static struct sk_buff *rtw89_sa_query_get(struct rtw89_dev *rtwdev,
2347 struct rtw89_vif_link *rtwvif_link)
2348 {
2349 u8 sec_hdr_len = rtw89_wow_get_sec_hdr_len(rtwdev);
2350 struct ieee80211_bss_conf *bss_conf;
2351 struct ieee80211_hdr_3addr *hdr;
2352 struct rtw89_sa_query *sa_query;
2353 struct sk_buff *skb;
2354
2355 skb = dev_alloc_skb(sizeof(*hdr) + sec_hdr_len + sizeof(*sa_query));
2356 if (!skb)
2357 return NULL;
2358
2359 hdr = skb_put_zero(skb, sizeof(*hdr));
2360 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
2361 IEEE80211_STYPE_ACTION |
2362 IEEE80211_FCTL_PROTECTED);
2363
2364 rcu_read_lock();
2365
2366 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, true);
2367
2368 ether_addr_copy(hdr->addr1, bss_conf->bssid);
2369 ether_addr_copy(hdr->addr2, bss_conf->addr);
2370 ether_addr_copy(hdr->addr3, bss_conf->bssid);
2371
2372 rcu_read_unlock();
2373
2374 skb_put_zero(skb, sec_hdr_len);
2375
2376 sa_query = skb_put_zero(skb, sizeof(*sa_query));
2377 sa_query->category = WLAN_CATEGORY_SA_QUERY;
2378 sa_query->action = WLAN_ACTION_SA_QUERY_RESPONSE;
2379
2380 return skb;
2381 }
2382
rtw89_arp_response_get(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)2383 static struct sk_buff *rtw89_arp_response_get(struct rtw89_dev *rtwdev,
2384 struct rtw89_vif_link *rtwvif_link)
2385 {
2386 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
2387 u8 sec_hdr_len = rtw89_wow_get_sec_hdr_len(rtwdev);
2388 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
2389 struct ieee80211_hdr_3addr *hdr;
2390 struct rtw89_arp_rsp *arp_skb;
2391 struct arphdr *arp_hdr;
2392 struct sk_buff *skb;
2393 __le16 fc;
2394
2395 skb = dev_alloc_skb(sizeof(*hdr) + sec_hdr_len + sizeof(*arp_skb));
2396 if (!skb)
2397 return NULL;
2398
2399 hdr = skb_put_zero(skb, sizeof(*hdr));
2400
2401 if (rtw_wow->ptk_alg)
2402 fc = cpu_to_le16(IEEE80211_FTYPE_DATA | IEEE80211_FCTL_TODS |
2403 IEEE80211_FCTL_PROTECTED);
2404 else
2405 fc = cpu_to_le16(IEEE80211_FTYPE_DATA | IEEE80211_FCTL_TODS);
2406
2407 hdr->frame_control = fc;
2408 ether_addr_copy(hdr->addr1, rtwvif_link->bssid);
2409 ether_addr_copy(hdr->addr2, rtwvif_link->mac_addr);
2410 ether_addr_copy(hdr->addr3, rtwvif_link->bssid);
2411
2412 skb_put_zero(skb, sec_hdr_len);
2413
2414 arp_skb = skb_put_zero(skb, sizeof(*arp_skb));
2415 memcpy(arp_skb->llc_hdr, rfc1042_header, sizeof(rfc1042_header));
2416 arp_skb->llc_type = htons(ETH_P_ARP);
2417
2418 arp_hdr = &arp_skb->arp_hdr;
2419 arp_hdr->ar_hrd = htons(ARPHRD_ETHER);
2420 arp_hdr->ar_pro = htons(ETH_P_IP);
2421 arp_hdr->ar_hln = ETH_ALEN;
2422 arp_hdr->ar_pln = 4;
2423 arp_hdr->ar_op = htons(ARPOP_REPLY);
2424
2425 ether_addr_copy(arp_skb->sender_hw, rtwvif_link->mac_addr);
2426 arp_skb->sender_ip = rtwvif->ip_addr;
2427
2428 return skb;
2429 }
2430
rtw89_fw_h2c_add_general_pkt(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,enum rtw89_fw_pkt_ofld_type type,u8 * id)2431 static int rtw89_fw_h2c_add_general_pkt(struct rtw89_dev *rtwdev,
2432 struct rtw89_vif_link *rtwvif_link,
2433 enum rtw89_fw_pkt_ofld_type type,
2434 u8 *id)
2435 {
2436 struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
2437 struct rtw89_pktofld_info *info;
2438 struct sk_buff *skb;
2439 int ret;
2440
2441 info = kzalloc(sizeof(*info), GFP_KERNEL);
2442 if (!info)
2443 return -ENOMEM;
2444
2445 switch (type) {
2446 case RTW89_PKT_OFLD_TYPE_PS_POLL:
2447 skb = ieee80211_pspoll_get(rtwdev->hw, vif);
2448 break;
2449 case RTW89_PKT_OFLD_TYPE_PROBE_RSP:
2450 skb = ieee80211_proberesp_get(rtwdev->hw, vif);
2451 break;
2452 case RTW89_PKT_OFLD_TYPE_NULL_DATA:
2453 skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, false);
2454 break;
2455 case RTW89_PKT_OFLD_TYPE_QOS_NULL:
2456 skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, true);
2457 break;
2458 case RTW89_PKT_OFLD_TYPE_EAPOL_KEY:
2459 skb = rtw89_eapol_get(rtwdev, rtwvif_link);
2460 break;
2461 case RTW89_PKT_OFLD_TYPE_SA_QUERY:
2462 skb = rtw89_sa_query_get(rtwdev, rtwvif_link);
2463 break;
2464 case RTW89_PKT_OFLD_TYPE_ARP_RSP:
2465 skb = rtw89_arp_response_get(rtwdev, rtwvif_link);
2466 break;
2467 default:
2468 goto err;
2469 }
2470
2471 if (!skb)
2472 goto err;
2473
2474 ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, skb);
2475 kfree_skb(skb);
2476
2477 if (ret)
2478 goto err;
2479
2480 list_add_tail(&info->list, &rtwvif_link->general_pkt_list);
2481 *id = info->id;
2482 return 0;
2483
2484 err:
2485 kfree(info);
2486 return -ENOMEM;
2487 }
2488
rtw89_fw_release_general_pkt_list_vif(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool notify_fw)2489 void rtw89_fw_release_general_pkt_list_vif(struct rtw89_dev *rtwdev,
2490 struct rtw89_vif_link *rtwvif_link,
2491 bool notify_fw)
2492 {
2493 struct list_head *pkt_list = &rtwvif_link->general_pkt_list;
2494 struct rtw89_pktofld_info *info, *tmp;
2495
2496 list_for_each_entry_safe(info, tmp, pkt_list, list) {
2497 if (notify_fw)
2498 rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id);
2499 else
2500 rtw89_core_release_bit_map(rtwdev->pkt_offload, info->id);
2501 list_del(&info->list);
2502 kfree(info);
2503 }
2504 }
2505
rtw89_fw_release_general_pkt_list(struct rtw89_dev * rtwdev,bool notify_fw)2506 void rtw89_fw_release_general_pkt_list(struct rtw89_dev *rtwdev, bool notify_fw)
2507 {
2508 struct rtw89_vif_link *rtwvif_link;
2509 struct rtw89_vif *rtwvif;
2510 unsigned int link_id;
2511
2512 rtw89_for_each_rtwvif(rtwdev, rtwvif)
2513 rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id)
2514 rtw89_fw_release_general_pkt_list_vif(rtwdev, rtwvif_link,
2515 notify_fw);
2516 }
2517
2518 #define H2C_GENERAL_PKT_LEN 6
2519 #define H2C_GENERAL_PKT_ID_UND 0xff
rtw89_fw_h2c_general_pkt(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,u8 macid)2520 int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev,
2521 struct rtw89_vif_link *rtwvif_link, u8 macid)
2522 {
2523 u8 pkt_id_ps_poll = H2C_GENERAL_PKT_ID_UND;
2524 u8 pkt_id_null = H2C_GENERAL_PKT_ID_UND;
2525 u8 pkt_id_qos_null = H2C_GENERAL_PKT_ID_UND;
2526 struct sk_buff *skb;
2527 int ret;
2528
2529 rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif_link,
2530 RTW89_PKT_OFLD_TYPE_PS_POLL, &pkt_id_ps_poll);
2531 rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif_link,
2532 RTW89_PKT_OFLD_TYPE_NULL_DATA, &pkt_id_null);
2533 rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif_link,
2534 RTW89_PKT_OFLD_TYPE_QOS_NULL, &pkt_id_qos_null);
2535
2536 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_GENERAL_PKT_LEN);
2537 if (!skb) {
2538 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
2539 return -ENOMEM;
2540 }
2541 skb_put(skb, H2C_GENERAL_PKT_LEN);
2542 SET_GENERAL_PKT_MACID(skb->data, macid);
2543 SET_GENERAL_PKT_PROBRSP_ID(skb->data, H2C_GENERAL_PKT_ID_UND);
2544 SET_GENERAL_PKT_PSPOLL_ID(skb->data, pkt_id_ps_poll);
2545 SET_GENERAL_PKT_NULL_ID(skb->data, pkt_id_null);
2546 SET_GENERAL_PKT_QOS_NULL_ID(skb->data, pkt_id_qos_null);
2547 SET_GENERAL_PKT_CTS2SELF_ID(skb->data, H2C_GENERAL_PKT_ID_UND);
2548
2549 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2550 H2C_CAT_MAC,
2551 H2C_CL_FW_INFO,
2552 H2C_FUNC_MAC_GENERAL_PKT, 0, 1,
2553 H2C_GENERAL_PKT_LEN);
2554
2555 ret = rtw89_h2c_tx(rtwdev, skb, false);
2556 if (ret) {
2557 rtw89_err(rtwdev, "failed to send h2c\n");
2558 goto fail;
2559 }
2560
2561 return 0;
2562 fail:
2563 dev_kfree_skb_any(skb);
2564
2565 return ret;
2566 }
2567
2568 #define H2C_LPS_PARM_LEN 8
rtw89_fw_h2c_lps_parm(struct rtw89_dev * rtwdev,struct rtw89_lps_parm * lps_param)2569 int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev,
2570 struct rtw89_lps_parm *lps_param)
2571 {
2572 struct sk_buff *skb;
2573 int ret;
2574
2575 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LPS_PARM_LEN);
2576 if (!skb) {
2577 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
2578 return -ENOMEM;
2579 }
2580 skb_put(skb, H2C_LPS_PARM_LEN);
2581
2582 SET_LPS_PARM_MACID(skb->data, lps_param->macid);
2583 SET_LPS_PARM_PSMODE(skb->data, lps_param->psmode);
2584 SET_LPS_PARM_LASTRPWM(skb->data, lps_param->lastrpwm);
2585 SET_LPS_PARM_RLBM(skb->data, 1);
2586 SET_LPS_PARM_SMARTPS(skb->data, 1);
2587 SET_LPS_PARM_AWAKEINTERVAL(skb->data, 1);
2588 SET_LPS_PARM_VOUAPSD(skb->data, 0);
2589 SET_LPS_PARM_VIUAPSD(skb->data, 0);
2590 SET_LPS_PARM_BEUAPSD(skb->data, 0);
2591 SET_LPS_PARM_BKUAPSD(skb->data, 0);
2592
2593 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2594 H2C_CAT_MAC,
2595 H2C_CL_MAC_PS,
2596 H2C_FUNC_MAC_LPS_PARM, 0, 1,
2597 H2C_LPS_PARM_LEN);
2598
2599 ret = rtw89_h2c_tx(rtwdev, skb, false);
2600 if (ret) {
2601 rtw89_err(rtwdev, "failed to send h2c\n");
2602 goto fail;
2603 }
2604
2605 return 0;
2606 fail:
2607 dev_kfree_skb_any(skb);
2608
2609 return ret;
2610 }
2611
rtw89_fw_h2c_lps_ch_info(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)2612 int rtw89_fw_h2c_lps_ch_info(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link)
2613 {
2614 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
2615 rtwvif_link->chanctx_idx);
2616 const struct rtw89_chip_info *chip = rtwdev->chip;
2617 struct rtw89_h2c_lps_ch_info *h2c;
2618 u32 len = sizeof(*h2c);
2619 struct sk_buff *skb;
2620 u32 done;
2621 int ret;
2622
2623 if (chip->chip_gen != RTW89_CHIP_BE)
2624 return 0;
2625
2626 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
2627 if (!skb) {
2628 rtw89_err(rtwdev, "failed to alloc skb for h2c lps_ch_info\n");
2629 return -ENOMEM;
2630 }
2631 skb_put(skb, len);
2632 h2c = (struct rtw89_h2c_lps_ch_info *)skb->data;
2633
2634 h2c->info[0].central_ch = chan->channel;
2635 h2c->info[0].pri_ch = chan->primary_channel;
2636 h2c->info[0].band = chan->band_type;
2637 h2c->info[0].bw = chan->band_width;
2638 h2c->mlo_dbcc_mode_lps = cpu_to_le32(MLO_2_PLUS_0_1RF);
2639
2640 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2641 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_DM,
2642 H2C_FUNC_FW_LPS_CH_INFO, 0, 0, len);
2643
2644 rtw89_phy_write32_mask(rtwdev, R_CHK_LPS_STAT, B_CHK_LPS_STAT, 0);
2645 ret = rtw89_h2c_tx(rtwdev, skb, false);
2646 if (ret) {
2647 rtw89_err(rtwdev, "failed to send h2c\n");
2648 goto fail;
2649 }
2650
2651 ret = read_poll_timeout(rtw89_phy_read32_mask, done, done, 50, 5000,
2652 true, rtwdev, R_CHK_LPS_STAT, B_CHK_LPS_STAT);
2653 if (ret)
2654 rtw89_warn(rtwdev, "h2c_lps_ch_info done polling timeout\n");
2655
2656 return 0;
2657 fail:
2658 dev_kfree_skb_any(skb);
2659
2660 return ret;
2661 }
2662
2663 #define H2C_P2P_ACT_LEN 20
rtw89_fw_h2c_p2p_act(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct ieee80211_bss_conf * bss_conf,struct ieee80211_p2p_noa_desc * desc,u8 act,u8 noa_id)2664 int rtw89_fw_h2c_p2p_act(struct rtw89_dev *rtwdev,
2665 struct rtw89_vif_link *rtwvif_link,
2666 struct ieee80211_bss_conf *bss_conf,
2667 struct ieee80211_p2p_noa_desc *desc,
2668 u8 act, u8 noa_id)
2669 {
2670 bool p2p_type_gc = rtwvif_link->wifi_role == RTW89_WIFI_ROLE_P2P_CLIENT;
2671 u8 ctwindow_oppps = bss_conf->p2p_noa_attr.oppps_ctwindow;
2672 struct sk_buff *skb;
2673 u8 *cmd;
2674 int ret;
2675
2676 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_P2P_ACT_LEN);
2677 if (!skb) {
2678 rtw89_err(rtwdev, "failed to alloc skb for h2c p2p act\n");
2679 return -ENOMEM;
2680 }
2681 skb_put(skb, H2C_P2P_ACT_LEN);
2682 cmd = skb->data;
2683
2684 RTW89_SET_FWCMD_P2P_MACID(cmd, rtwvif_link->mac_id);
2685 RTW89_SET_FWCMD_P2P_P2PID(cmd, 0);
2686 RTW89_SET_FWCMD_P2P_NOAID(cmd, noa_id);
2687 RTW89_SET_FWCMD_P2P_ACT(cmd, act);
2688 RTW89_SET_FWCMD_P2P_TYPE(cmd, p2p_type_gc);
2689 RTW89_SET_FWCMD_P2P_ALL_SLEP(cmd, 0);
2690 if (desc) {
2691 RTW89_SET_FWCMD_NOA_START_TIME(cmd, desc->start_time);
2692 RTW89_SET_FWCMD_NOA_INTERVAL(cmd, desc->interval);
2693 RTW89_SET_FWCMD_NOA_DURATION(cmd, desc->duration);
2694 RTW89_SET_FWCMD_NOA_COUNT(cmd, desc->count);
2695 RTW89_SET_FWCMD_NOA_CTWINDOW(cmd, ctwindow_oppps);
2696 }
2697
2698 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2699 H2C_CAT_MAC, H2C_CL_MAC_PS,
2700 H2C_FUNC_P2P_ACT, 0, 0,
2701 H2C_P2P_ACT_LEN);
2702
2703 ret = rtw89_h2c_tx(rtwdev, skb, false);
2704 if (ret) {
2705 rtw89_err(rtwdev, "failed to send h2c\n");
2706 goto fail;
2707 }
2708
2709 return 0;
2710 fail:
2711 dev_kfree_skb_any(skb);
2712
2713 return ret;
2714 }
2715
__rtw89_fw_h2c_set_tx_path(struct rtw89_dev * rtwdev,struct sk_buff * skb)2716 static void __rtw89_fw_h2c_set_tx_path(struct rtw89_dev *rtwdev,
2717 struct sk_buff *skb)
2718 {
2719 const struct rtw89_chip_info *chip = rtwdev->chip;
2720 struct rtw89_hal *hal = &rtwdev->hal;
2721 u8 ntx_path;
2722 u8 map_b;
2723
2724 if (chip->rf_path_num == 1) {
2725 ntx_path = RF_A;
2726 map_b = 0;
2727 } else {
2728 ntx_path = hal->antenna_tx ? hal->antenna_tx : RF_B;
2729 map_b = hal->antenna_tx == RF_AB ? 1 : 0;
2730 }
2731
2732 SET_CMC_TBL_NTX_PATH_EN(skb->data, ntx_path);
2733 SET_CMC_TBL_PATH_MAP_A(skb->data, 0);
2734 SET_CMC_TBL_PATH_MAP_B(skb->data, map_b);
2735 SET_CMC_TBL_PATH_MAP_C(skb->data, 0);
2736 SET_CMC_TBL_PATH_MAP_D(skb->data, 0);
2737 }
2738
2739 #define H2C_CMC_TBL_LEN 68
rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)2740 int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev,
2741 struct rtw89_vif_link *rtwvif_link,
2742 struct rtw89_sta_link *rtwsta_link)
2743 {
2744 const struct rtw89_chip_info *chip = rtwdev->chip;
2745 u8 macid = rtwsta_link ? rtwsta_link->mac_id : rtwvif_link->mac_id;
2746 struct sk_buff *skb;
2747 int ret;
2748
2749 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CMC_TBL_LEN);
2750 if (!skb) {
2751 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
2752 return -ENOMEM;
2753 }
2754 skb_put(skb, H2C_CMC_TBL_LEN);
2755 SET_CTRL_INFO_MACID(skb->data, macid);
2756 SET_CTRL_INFO_OPERATION(skb->data, 1);
2757 if (chip->h2c_cctl_func_id == H2C_FUNC_MAC_CCTLINFO_UD) {
2758 SET_CMC_TBL_TXPWR_MODE(skb->data, 0);
2759 __rtw89_fw_h2c_set_tx_path(rtwdev, skb);
2760 SET_CMC_TBL_ANTSEL_A(skb->data, 0);
2761 SET_CMC_TBL_ANTSEL_B(skb->data, 0);
2762 SET_CMC_TBL_ANTSEL_C(skb->data, 0);
2763 SET_CMC_TBL_ANTSEL_D(skb->data, 0);
2764 }
2765 SET_CMC_TBL_DOPPLER_CTRL(skb->data, 0);
2766 SET_CMC_TBL_TXPWR_TOLERENCE(skb->data, 0);
2767 if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE)
2768 SET_CMC_TBL_DATA_DCM(skb->data, 0);
2769
2770 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2771 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG,
2772 chip->h2c_cctl_func_id, 0, 1,
2773 H2C_CMC_TBL_LEN);
2774
2775 ret = rtw89_h2c_tx(rtwdev, skb, false);
2776 if (ret) {
2777 rtw89_err(rtwdev, "failed to send h2c\n");
2778 goto fail;
2779 }
2780
2781 return 0;
2782 fail:
2783 dev_kfree_skb_any(skb);
2784
2785 return ret;
2786 }
2787 EXPORT_SYMBOL(rtw89_fw_h2c_default_cmac_tbl);
2788
rtw89_fw_h2c_default_cmac_tbl_g7(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)2789 int rtw89_fw_h2c_default_cmac_tbl_g7(struct rtw89_dev *rtwdev,
2790 struct rtw89_vif_link *rtwvif_link,
2791 struct rtw89_sta_link *rtwsta_link)
2792 {
2793 u8 mac_id = rtwsta_link ? rtwsta_link->mac_id : rtwvif_link->mac_id;
2794 struct rtw89_h2c_cctlinfo_ud_g7 *h2c;
2795 u32 len = sizeof(*h2c);
2796 struct sk_buff *skb;
2797 int ret;
2798
2799 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
2800 if (!skb) {
2801 rtw89_err(rtwdev, "failed to alloc skb for cmac g7\n");
2802 return -ENOMEM;
2803 }
2804 skb_put(skb, len);
2805 h2c = (struct rtw89_h2c_cctlinfo_ud_g7 *)skb->data;
2806
2807 h2c->c0 = le32_encode_bits(mac_id, CCTLINFO_G7_C0_MACID) |
2808 le32_encode_bits(1, CCTLINFO_G7_C0_OP);
2809
2810 h2c->w0 = le32_encode_bits(4, CCTLINFO_G7_W0_DATARATE);
2811 h2c->m0 = cpu_to_le32(CCTLINFO_G7_W0_ALL);
2812
2813 h2c->w1 = le32_encode_bits(4, CCTLINFO_G7_W1_DATA_RTY_LOWEST_RATE) |
2814 le32_encode_bits(0xa, CCTLINFO_G7_W1_RTSRATE) |
2815 le32_encode_bits(4, CCTLINFO_G7_W1_RTS_RTY_LOWEST_RATE);
2816 h2c->m1 = cpu_to_le32(CCTLINFO_G7_W1_ALL);
2817
2818 h2c->m2 = cpu_to_le32(CCTLINFO_G7_W2_ALL);
2819
2820 h2c->m3 = cpu_to_le32(CCTLINFO_G7_W3_ALL);
2821
2822 h2c->w4 = le32_encode_bits(0xFFFF, CCTLINFO_G7_W4_ACT_SUBCH_CBW);
2823 h2c->m4 = cpu_to_le32(CCTLINFO_G7_W4_ALL);
2824
2825 h2c->w5 = le32_encode_bits(2, CCTLINFO_G7_W5_NOMINAL_PKT_PADDING0) |
2826 le32_encode_bits(2, CCTLINFO_G7_W5_NOMINAL_PKT_PADDING1) |
2827 le32_encode_bits(2, CCTLINFO_G7_W5_NOMINAL_PKT_PADDING2) |
2828 le32_encode_bits(2, CCTLINFO_G7_W5_NOMINAL_PKT_PADDING3) |
2829 le32_encode_bits(2, CCTLINFO_G7_W5_NOMINAL_PKT_PADDING4);
2830 h2c->m5 = cpu_to_le32(CCTLINFO_G7_W5_ALL);
2831
2832 h2c->w6 = le32_encode_bits(0xb, CCTLINFO_G7_W6_RESP_REF_RATE);
2833 h2c->m6 = cpu_to_le32(CCTLINFO_G7_W6_ALL);
2834
2835 h2c->w7 = le32_encode_bits(1, CCTLINFO_G7_W7_NC) |
2836 le32_encode_bits(1, CCTLINFO_G7_W7_NR) |
2837 le32_encode_bits(1, CCTLINFO_G7_W7_CB) |
2838 le32_encode_bits(0x1, CCTLINFO_G7_W7_CSI_PARA_EN) |
2839 le32_encode_bits(0xb, CCTLINFO_G7_W7_CSI_FIX_RATE);
2840 h2c->m7 = cpu_to_le32(CCTLINFO_G7_W7_ALL);
2841
2842 h2c->m8 = cpu_to_le32(CCTLINFO_G7_W8_ALL);
2843
2844 h2c->w14 = le32_encode_bits(0, CCTLINFO_G7_W14_VO_CURR_RATE) |
2845 le32_encode_bits(0, CCTLINFO_G7_W14_VI_CURR_RATE) |
2846 le32_encode_bits(0, CCTLINFO_G7_W14_BE_CURR_RATE_L);
2847 h2c->m14 = cpu_to_le32(CCTLINFO_G7_W14_ALL);
2848
2849 h2c->w15 = le32_encode_bits(0, CCTLINFO_G7_W15_BE_CURR_RATE_H) |
2850 le32_encode_bits(0, CCTLINFO_G7_W15_BK_CURR_RATE) |
2851 le32_encode_bits(0, CCTLINFO_G7_W15_MGNT_CURR_RATE);
2852 h2c->m15 = cpu_to_le32(CCTLINFO_G7_W15_ALL);
2853
2854 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2855 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG,
2856 H2C_FUNC_MAC_CCTLINFO_UD_G7, 0, 1,
2857 len);
2858
2859 ret = rtw89_h2c_tx(rtwdev, skb, false);
2860 if (ret) {
2861 rtw89_err(rtwdev, "failed to send h2c\n");
2862 goto fail;
2863 }
2864
2865 return 0;
2866 fail:
2867 dev_kfree_skb_any(skb);
2868
2869 return ret;
2870 }
2871 EXPORT_SYMBOL(rtw89_fw_h2c_default_cmac_tbl_g7);
2872
__get_sta_he_pkt_padding(struct rtw89_dev * rtwdev,struct ieee80211_link_sta * link_sta,u8 * pads)2873 static void __get_sta_he_pkt_padding(struct rtw89_dev *rtwdev,
2874 struct ieee80211_link_sta *link_sta,
2875 u8 *pads)
2876 {
2877 bool ppe_th;
2878 u8 ppe16, ppe8;
2879 u8 nss = min(link_sta->rx_nss, rtwdev->hal.tx_nss) - 1;
2880 u8 ppe_thres_hdr = link_sta->he_cap.ppe_thres[0];
2881 u8 ru_bitmap;
2882 u8 n, idx, sh;
2883 u16 ppe;
2884 int i;
2885
2886 ppe_th = FIELD_GET(IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
2887 link_sta->he_cap.he_cap_elem.phy_cap_info[6]);
2888 if (!ppe_th) {
2889 u8 pad;
2890
2891 pad = FIELD_GET(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK,
2892 link_sta->he_cap.he_cap_elem.phy_cap_info[9]);
2893
2894 for (i = 0; i < RTW89_PPE_BW_NUM; i++)
2895 pads[i] = pad;
2896
2897 return;
2898 }
2899
2900 ru_bitmap = FIELD_GET(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK, ppe_thres_hdr);
2901 n = hweight8(ru_bitmap);
2902 n = 7 + (n * IEEE80211_PPE_THRES_INFO_PPET_SIZE * 2) * nss;
2903
2904 for (i = 0; i < RTW89_PPE_BW_NUM; i++) {
2905 if (!(ru_bitmap & BIT(i))) {
2906 pads[i] = 1;
2907 continue;
2908 }
2909
2910 idx = n >> 3;
2911 sh = n & 7;
2912 n += IEEE80211_PPE_THRES_INFO_PPET_SIZE * 2;
2913
2914 ppe = le16_to_cpu(*((__le16 *)&link_sta->he_cap.ppe_thres[idx]));
2915 ppe16 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK;
2916 sh += IEEE80211_PPE_THRES_INFO_PPET_SIZE;
2917 ppe8 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK;
2918
2919 if (ppe16 != 7 && ppe8 == 7)
2920 pads[i] = RTW89_PE_DURATION_16;
2921 else if (ppe8 != 7)
2922 pads[i] = RTW89_PE_DURATION_8;
2923 else
2924 pads[i] = RTW89_PE_DURATION_0;
2925 }
2926 }
2927
rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)2928 int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev,
2929 struct rtw89_vif_link *rtwvif_link,
2930 struct rtw89_sta_link *rtwsta_link)
2931 {
2932 struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
2933 const struct rtw89_chip_info *chip = rtwdev->chip;
2934 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
2935 rtwvif_link->chanctx_idx);
2936 struct ieee80211_link_sta *link_sta;
2937 struct sk_buff *skb;
2938 u8 pads[RTW89_PPE_BW_NUM];
2939 u8 mac_id = rtwsta_link ? rtwsta_link->mac_id : rtwvif_link->mac_id;
2940 u16 lowest_rate;
2941 int ret;
2942
2943 memset(pads, 0, sizeof(pads));
2944
2945 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CMC_TBL_LEN);
2946 if (!skb) {
2947 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
2948 return -ENOMEM;
2949 }
2950
2951 rcu_read_lock();
2952
2953 if (rtwsta_link)
2954 link_sta = rtw89_sta_rcu_dereference_link(rtwsta_link, true);
2955
2956 if (rtwsta_link && link_sta->he_cap.has_he)
2957 __get_sta_he_pkt_padding(rtwdev, link_sta, pads);
2958
2959 if (vif->p2p)
2960 lowest_rate = RTW89_HW_RATE_OFDM6;
2961 else if (chan->band_type == RTW89_BAND_2G)
2962 lowest_rate = RTW89_HW_RATE_CCK1;
2963 else
2964 lowest_rate = RTW89_HW_RATE_OFDM6;
2965
2966 skb_put(skb, H2C_CMC_TBL_LEN);
2967 SET_CTRL_INFO_MACID(skb->data, mac_id);
2968 SET_CTRL_INFO_OPERATION(skb->data, 1);
2969 SET_CMC_TBL_DISRTSFB(skb->data, 1);
2970 SET_CMC_TBL_DISDATAFB(skb->data, 1);
2971 SET_CMC_TBL_RTS_RTY_LOWEST_RATE(skb->data, lowest_rate);
2972 SET_CMC_TBL_RTS_TXCNT_LMT_SEL(skb->data, 0);
2973 SET_CMC_TBL_DATA_TXCNT_LMT_SEL(skb->data, 0);
2974 if (vif->type == NL80211_IFTYPE_STATION)
2975 SET_CMC_TBL_ULDL(skb->data, 1);
2976 else
2977 SET_CMC_TBL_ULDL(skb->data, 0);
2978 SET_CMC_TBL_MULTI_PORT_ID(skb->data, rtwvif_link->port);
2979 if (chip->h2c_cctl_func_id == H2C_FUNC_MAC_CCTLINFO_UD_V1) {
2980 SET_CMC_TBL_NOMINAL_PKT_PADDING_V1(skb->data, pads[RTW89_CHANNEL_WIDTH_20]);
2981 SET_CMC_TBL_NOMINAL_PKT_PADDING40_V1(skb->data, pads[RTW89_CHANNEL_WIDTH_40]);
2982 SET_CMC_TBL_NOMINAL_PKT_PADDING80_V1(skb->data, pads[RTW89_CHANNEL_WIDTH_80]);
2983 SET_CMC_TBL_NOMINAL_PKT_PADDING160_V1(skb->data, pads[RTW89_CHANNEL_WIDTH_160]);
2984 } else if (chip->h2c_cctl_func_id == H2C_FUNC_MAC_CCTLINFO_UD) {
2985 SET_CMC_TBL_NOMINAL_PKT_PADDING(skb->data, pads[RTW89_CHANNEL_WIDTH_20]);
2986 SET_CMC_TBL_NOMINAL_PKT_PADDING40(skb->data, pads[RTW89_CHANNEL_WIDTH_40]);
2987 SET_CMC_TBL_NOMINAL_PKT_PADDING80(skb->data, pads[RTW89_CHANNEL_WIDTH_80]);
2988 SET_CMC_TBL_NOMINAL_PKT_PADDING160(skb->data, pads[RTW89_CHANNEL_WIDTH_160]);
2989 }
2990 if (rtwsta_link)
2991 SET_CMC_TBL_BSR_QUEUE_SIZE_FORMAT(skb->data,
2992 link_sta->he_cap.has_he);
2993 if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE)
2994 SET_CMC_TBL_DATA_DCM(skb->data, 0);
2995
2996 rcu_read_unlock();
2997
2998 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
2999 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG,
3000 chip->h2c_cctl_func_id, 0, 1,
3001 H2C_CMC_TBL_LEN);
3002
3003 ret = rtw89_h2c_tx(rtwdev, skb, false);
3004 if (ret) {
3005 rtw89_err(rtwdev, "failed to send h2c\n");
3006 goto fail;
3007 }
3008
3009 return 0;
3010 fail:
3011 dev_kfree_skb_any(skb);
3012
3013 return ret;
3014 }
3015 EXPORT_SYMBOL(rtw89_fw_h2c_assoc_cmac_tbl);
3016
__get_sta_eht_pkt_padding(struct rtw89_dev * rtwdev,struct ieee80211_link_sta * link_sta,u8 * pads)3017 static void __get_sta_eht_pkt_padding(struct rtw89_dev *rtwdev,
3018 struct ieee80211_link_sta *link_sta,
3019 u8 *pads)
3020 {
3021 u8 nss = min(link_sta->rx_nss, rtwdev->hal.tx_nss) - 1;
3022 u16 ppe_thres_hdr;
3023 u8 ppe16, ppe8;
3024 u8 n, idx, sh;
3025 u8 ru_bitmap;
3026 bool ppe_th;
3027 u16 ppe;
3028 int i;
3029
3030 ppe_th = !!u8_get_bits(link_sta->eht_cap.eht_cap_elem.phy_cap_info[5],
3031 IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT);
3032 if (!ppe_th) {
3033 u8 pad;
3034
3035 pad = u8_get_bits(link_sta->eht_cap.eht_cap_elem.phy_cap_info[5],
3036 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK);
3037
3038 for (i = 0; i < RTW89_PPE_BW_NUM; i++)
3039 pads[i] = pad;
3040
3041 return;
3042 }
3043
3044 ppe_thres_hdr = get_unaligned_le16(link_sta->eht_cap.eht_ppe_thres);
3045 ru_bitmap = u16_get_bits(ppe_thres_hdr,
3046 IEEE80211_EHT_PPE_THRES_RU_INDEX_BITMASK_MASK);
3047 n = hweight8(ru_bitmap);
3048 n = IEEE80211_EHT_PPE_THRES_INFO_HEADER_SIZE +
3049 (n * IEEE80211_EHT_PPE_THRES_INFO_PPET_SIZE * 2) * nss;
3050
3051 for (i = 0; i < RTW89_PPE_BW_NUM; i++) {
3052 if (!(ru_bitmap & BIT(i))) {
3053 pads[i] = 1;
3054 continue;
3055 }
3056
3057 idx = n >> 3;
3058 sh = n & 7;
3059 n += IEEE80211_EHT_PPE_THRES_INFO_PPET_SIZE * 2;
3060
3061 ppe = get_unaligned_le16(link_sta->eht_cap.eht_ppe_thres + idx);
3062 ppe16 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK;
3063 sh += IEEE80211_EHT_PPE_THRES_INFO_PPET_SIZE;
3064 ppe8 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK;
3065
3066 if (ppe16 != 7 && ppe8 == 7)
3067 pads[i] = RTW89_PE_DURATION_16_20;
3068 else if (ppe8 != 7)
3069 pads[i] = RTW89_PE_DURATION_8;
3070 else
3071 pads[i] = RTW89_PE_DURATION_0;
3072 }
3073 }
3074
rtw89_fw_h2c_assoc_cmac_tbl_g7(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)3075 int rtw89_fw_h2c_assoc_cmac_tbl_g7(struct rtw89_dev *rtwdev,
3076 struct rtw89_vif_link *rtwvif_link,
3077 struct rtw89_sta_link *rtwsta_link)
3078 {
3079 struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
3080 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, rtwvif_link->chanctx_idx);
3081 u8 mac_id = rtwsta_link ? rtwsta_link->mac_id : rtwvif_link->mac_id;
3082 struct rtw89_h2c_cctlinfo_ud_g7 *h2c;
3083 struct ieee80211_bss_conf *bss_conf;
3084 struct ieee80211_link_sta *link_sta;
3085 u8 pads[RTW89_PPE_BW_NUM];
3086 u32 len = sizeof(*h2c);
3087 struct sk_buff *skb;
3088 u16 lowest_rate;
3089 int ret;
3090
3091 memset(pads, 0, sizeof(pads));
3092
3093 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
3094 if (!skb) {
3095 rtw89_err(rtwdev, "failed to alloc skb for cmac g7\n");
3096 return -ENOMEM;
3097 }
3098
3099 rcu_read_lock();
3100
3101 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, true);
3102
3103 if (rtwsta_link) {
3104 link_sta = rtw89_sta_rcu_dereference_link(rtwsta_link, true);
3105
3106 if (link_sta->eht_cap.has_eht)
3107 __get_sta_eht_pkt_padding(rtwdev, link_sta, pads);
3108 else if (link_sta->he_cap.has_he)
3109 __get_sta_he_pkt_padding(rtwdev, link_sta, pads);
3110 }
3111
3112 if (vif->p2p)
3113 lowest_rate = RTW89_HW_RATE_OFDM6;
3114 else if (chan->band_type == RTW89_BAND_2G)
3115 lowest_rate = RTW89_HW_RATE_CCK1;
3116 else
3117 lowest_rate = RTW89_HW_RATE_OFDM6;
3118
3119 skb_put(skb, len);
3120 h2c = (struct rtw89_h2c_cctlinfo_ud_g7 *)skb->data;
3121
3122 h2c->c0 = le32_encode_bits(mac_id, CCTLINFO_G7_C0_MACID) |
3123 le32_encode_bits(1, CCTLINFO_G7_C0_OP);
3124
3125 h2c->w0 = le32_encode_bits(1, CCTLINFO_G7_W0_DISRTSFB) |
3126 le32_encode_bits(1, CCTLINFO_G7_W0_DISDATAFB);
3127 h2c->m0 = cpu_to_le32(CCTLINFO_G7_W0_DISRTSFB |
3128 CCTLINFO_G7_W0_DISDATAFB);
3129
3130 h2c->w1 = le32_encode_bits(lowest_rate, CCTLINFO_G7_W1_RTS_RTY_LOWEST_RATE);
3131 h2c->m1 = cpu_to_le32(CCTLINFO_G7_W1_RTS_RTY_LOWEST_RATE);
3132
3133 h2c->w2 = le32_encode_bits(0, CCTLINFO_G7_W2_DATA_TXCNT_LMT_SEL);
3134 h2c->m2 = cpu_to_le32(CCTLINFO_G7_W2_DATA_TXCNT_LMT_SEL);
3135
3136 h2c->w3 = le32_encode_bits(0, CCTLINFO_G7_W3_RTS_TXCNT_LMT_SEL);
3137 h2c->m3 = cpu_to_le32(CCTLINFO_G7_W3_RTS_TXCNT_LMT_SEL);
3138
3139 h2c->w4 = le32_encode_bits(rtwvif_link->port, CCTLINFO_G7_W4_MULTI_PORT_ID);
3140 h2c->m4 = cpu_to_le32(CCTLINFO_G7_W4_MULTI_PORT_ID);
3141
3142 if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE) {
3143 h2c->w4 |= le32_encode_bits(0, CCTLINFO_G7_W4_DATA_DCM);
3144 h2c->m4 |= cpu_to_le32(CCTLINFO_G7_W4_DATA_DCM);
3145 }
3146
3147 if (bss_conf->eht_support) {
3148 u16 punct = bss_conf->chanreq.oper.punctured;
3149
3150 h2c->w4 |= le32_encode_bits(~punct,
3151 CCTLINFO_G7_W4_ACT_SUBCH_CBW);
3152 h2c->m4 |= cpu_to_le32(CCTLINFO_G7_W4_ACT_SUBCH_CBW);
3153 }
3154
3155 h2c->w5 = le32_encode_bits(pads[RTW89_CHANNEL_WIDTH_20],
3156 CCTLINFO_G7_W5_NOMINAL_PKT_PADDING0) |
3157 le32_encode_bits(pads[RTW89_CHANNEL_WIDTH_40],
3158 CCTLINFO_G7_W5_NOMINAL_PKT_PADDING1) |
3159 le32_encode_bits(pads[RTW89_CHANNEL_WIDTH_80],
3160 CCTLINFO_G7_W5_NOMINAL_PKT_PADDING2) |
3161 le32_encode_bits(pads[RTW89_CHANNEL_WIDTH_160],
3162 CCTLINFO_G7_W5_NOMINAL_PKT_PADDING3) |
3163 le32_encode_bits(pads[RTW89_CHANNEL_WIDTH_320],
3164 CCTLINFO_G7_W5_NOMINAL_PKT_PADDING4);
3165 h2c->m5 = cpu_to_le32(CCTLINFO_G7_W5_NOMINAL_PKT_PADDING0 |
3166 CCTLINFO_G7_W5_NOMINAL_PKT_PADDING1 |
3167 CCTLINFO_G7_W5_NOMINAL_PKT_PADDING2 |
3168 CCTLINFO_G7_W5_NOMINAL_PKT_PADDING3 |
3169 CCTLINFO_G7_W5_NOMINAL_PKT_PADDING4);
3170
3171 h2c->w6 = le32_encode_bits(vif->cfg.aid, CCTLINFO_G7_W6_AID12_PAID) |
3172 le32_encode_bits(vif->type == NL80211_IFTYPE_STATION ? 1 : 0,
3173 CCTLINFO_G7_W6_ULDL);
3174 h2c->m6 = cpu_to_le32(CCTLINFO_G7_W6_AID12_PAID | CCTLINFO_G7_W6_ULDL);
3175
3176 if (rtwsta_link) {
3177 h2c->w8 = le32_encode_bits(link_sta->he_cap.has_he,
3178 CCTLINFO_G7_W8_BSR_QUEUE_SIZE_FORMAT);
3179 h2c->m8 = cpu_to_le32(CCTLINFO_G7_W8_BSR_QUEUE_SIZE_FORMAT);
3180 }
3181
3182 rcu_read_unlock();
3183
3184 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3185 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG,
3186 H2C_FUNC_MAC_CCTLINFO_UD_G7, 0, 1,
3187 len);
3188
3189 ret = rtw89_h2c_tx(rtwdev, skb, false);
3190 if (ret) {
3191 rtw89_err(rtwdev, "failed to send h2c\n");
3192 goto fail;
3193 }
3194
3195 return 0;
3196 fail:
3197 dev_kfree_skb_any(skb);
3198
3199 return ret;
3200 }
3201 EXPORT_SYMBOL(rtw89_fw_h2c_assoc_cmac_tbl_g7);
3202
rtw89_fw_h2c_ampdu_cmac_tbl_g7(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)3203 int rtw89_fw_h2c_ampdu_cmac_tbl_g7(struct rtw89_dev *rtwdev,
3204 struct rtw89_vif_link *rtwvif_link,
3205 struct rtw89_sta_link *rtwsta_link)
3206 {
3207 struct rtw89_sta *rtwsta = rtwsta_link->rtwsta;
3208 struct rtw89_h2c_cctlinfo_ud_g7 *h2c;
3209 u32 len = sizeof(*h2c);
3210 struct sk_buff *skb;
3211 u16 agg_num = 0;
3212 u8 ba_bmap = 0;
3213 int ret;
3214 u8 tid;
3215
3216 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
3217 if (!skb) {
3218 rtw89_err(rtwdev, "failed to alloc skb for ampdu cmac g7\n");
3219 return -ENOMEM;
3220 }
3221 skb_put(skb, len);
3222 h2c = (struct rtw89_h2c_cctlinfo_ud_g7 *)skb->data;
3223
3224 for_each_set_bit(tid, rtwsta->ampdu_map, IEEE80211_NUM_TIDS) {
3225 if (agg_num == 0)
3226 agg_num = rtwsta->ampdu_params[tid].agg_num;
3227 else
3228 agg_num = min(agg_num, rtwsta->ampdu_params[tid].agg_num);
3229 }
3230
3231 if (agg_num <= 0x20)
3232 ba_bmap = 3;
3233 else if (agg_num > 0x20 && agg_num <= 0x40)
3234 ba_bmap = 0;
3235 else if (agg_num > 0x40 && agg_num <= 0x80)
3236 ba_bmap = 1;
3237 else if (agg_num > 0x80 && agg_num <= 0x100)
3238 ba_bmap = 2;
3239 else if (agg_num > 0x100 && agg_num <= 0x200)
3240 ba_bmap = 4;
3241 else if (agg_num > 0x200 && agg_num <= 0x400)
3242 ba_bmap = 5;
3243
3244 h2c->c0 = le32_encode_bits(rtwsta_link->mac_id, CCTLINFO_G7_C0_MACID) |
3245 le32_encode_bits(1, CCTLINFO_G7_C0_OP);
3246
3247 h2c->w3 = le32_encode_bits(ba_bmap, CCTLINFO_G7_W3_BA_BMAP);
3248 h2c->m3 = cpu_to_le32(CCTLINFO_G7_W3_BA_BMAP);
3249
3250 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3251 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG,
3252 H2C_FUNC_MAC_CCTLINFO_UD_G7, 0, 0,
3253 len);
3254
3255 ret = rtw89_h2c_tx(rtwdev, skb, false);
3256 if (ret) {
3257 rtw89_err(rtwdev, "failed to send h2c\n");
3258 goto fail;
3259 }
3260
3261 return 0;
3262 fail:
3263 dev_kfree_skb_any(skb);
3264
3265 return ret;
3266 }
3267 EXPORT_SYMBOL(rtw89_fw_h2c_ampdu_cmac_tbl_g7);
3268
rtw89_fw_h2c_txtime_cmac_tbl(struct rtw89_dev * rtwdev,struct rtw89_sta_link * rtwsta_link)3269 int rtw89_fw_h2c_txtime_cmac_tbl(struct rtw89_dev *rtwdev,
3270 struct rtw89_sta_link *rtwsta_link)
3271 {
3272 const struct rtw89_chip_info *chip = rtwdev->chip;
3273 struct sk_buff *skb;
3274 int ret;
3275
3276 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CMC_TBL_LEN);
3277 if (!skb) {
3278 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
3279 return -ENOMEM;
3280 }
3281 skb_put(skb, H2C_CMC_TBL_LEN);
3282 SET_CTRL_INFO_MACID(skb->data, rtwsta_link->mac_id);
3283 SET_CTRL_INFO_OPERATION(skb->data, 1);
3284 if (rtwsta_link->cctl_tx_time) {
3285 SET_CMC_TBL_AMPDU_TIME_SEL(skb->data, 1);
3286 SET_CMC_TBL_AMPDU_MAX_TIME(skb->data, rtwsta_link->ampdu_max_time);
3287 }
3288 if (rtwsta_link->cctl_tx_retry_limit) {
3289 SET_CMC_TBL_DATA_TXCNT_LMT_SEL(skb->data, 1);
3290 SET_CMC_TBL_DATA_TX_CNT_LMT(skb->data, rtwsta_link->data_tx_cnt_lmt);
3291 }
3292
3293 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3294 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG,
3295 chip->h2c_cctl_func_id, 0, 1,
3296 H2C_CMC_TBL_LEN);
3297
3298 ret = rtw89_h2c_tx(rtwdev, skb, false);
3299 if (ret) {
3300 rtw89_err(rtwdev, "failed to send h2c\n");
3301 goto fail;
3302 }
3303
3304 return 0;
3305 fail:
3306 dev_kfree_skb_any(skb);
3307
3308 return ret;
3309 }
3310
rtw89_fw_h2c_txpath_cmac_tbl(struct rtw89_dev * rtwdev,struct rtw89_sta_link * rtwsta_link)3311 int rtw89_fw_h2c_txpath_cmac_tbl(struct rtw89_dev *rtwdev,
3312 struct rtw89_sta_link *rtwsta_link)
3313 {
3314 const struct rtw89_chip_info *chip = rtwdev->chip;
3315 struct sk_buff *skb;
3316 int ret;
3317
3318 if (chip->h2c_cctl_func_id != H2C_FUNC_MAC_CCTLINFO_UD)
3319 return 0;
3320
3321 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CMC_TBL_LEN);
3322 if (!skb) {
3323 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
3324 return -ENOMEM;
3325 }
3326 skb_put(skb, H2C_CMC_TBL_LEN);
3327 SET_CTRL_INFO_MACID(skb->data, rtwsta_link->mac_id);
3328 SET_CTRL_INFO_OPERATION(skb->data, 1);
3329
3330 __rtw89_fw_h2c_set_tx_path(rtwdev, skb);
3331
3332 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3333 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG,
3334 H2C_FUNC_MAC_CCTLINFO_UD, 0, 1,
3335 H2C_CMC_TBL_LEN);
3336
3337 ret = rtw89_h2c_tx(rtwdev, skb, false);
3338 if (ret) {
3339 rtw89_err(rtwdev, "failed to send h2c\n");
3340 goto fail;
3341 }
3342
3343 return 0;
3344 fail:
3345 dev_kfree_skb_any(skb);
3346
3347 return ret;
3348 }
3349
rtw89_fw_h2c_update_beacon(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)3350 int rtw89_fw_h2c_update_beacon(struct rtw89_dev *rtwdev,
3351 struct rtw89_vif_link *rtwvif_link)
3352 {
3353 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
3354 rtwvif_link->chanctx_idx);
3355 struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
3356 struct rtw89_h2c_bcn_upd *h2c;
3357 struct sk_buff *skb_beacon;
3358 struct ieee80211_hdr *hdr;
3359 u32 len = sizeof(*h2c);
3360 struct sk_buff *skb;
3361 int bcn_total_len;
3362 u16 beacon_rate;
3363 u16 tim_offset;
3364 void *noa_data;
3365 u8 noa_len;
3366 int ret;
3367
3368 if (vif->p2p)
3369 beacon_rate = RTW89_HW_RATE_OFDM6;
3370 else if (chan->band_type == RTW89_BAND_2G)
3371 beacon_rate = RTW89_HW_RATE_CCK1;
3372 else
3373 beacon_rate = RTW89_HW_RATE_OFDM6;
3374
3375 skb_beacon = ieee80211_beacon_get_tim(rtwdev->hw, vif, &tim_offset,
3376 NULL, 0);
3377 if (!skb_beacon) {
3378 rtw89_err(rtwdev, "failed to get beacon skb\n");
3379 return -ENOMEM;
3380 }
3381
3382 noa_len = rtw89_p2p_noa_fetch(rtwvif_link, &noa_data);
3383 if (noa_len &&
3384 (noa_len <= skb_tailroom(skb_beacon) ||
3385 pskb_expand_head(skb_beacon, 0, noa_len, GFP_KERNEL) == 0)) {
3386 skb_put_data(skb_beacon, noa_data, noa_len);
3387 }
3388
3389 hdr = (struct ieee80211_hdr *)skb_beacon;
3390 tim_offset -= ieee80211_hdrlen(hdr->frame_control);
3391
3392 bcn_total_len = len + skb_beacon->len;
3393 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, bcn_total_len);
3394 if (!skb) {
3395 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
3396 dev_kfree_skb_any(skb_beacon);
3397 return -ENOMEM;
3398 }
3399 skb_put(skb, len);
3400 h2c = (struct rtw89_h2c_bcn_upd *)skb->data;
3401
3402 h2c->w0 = le32_encode_bits(rtwvif_link->port, RTW89_H2C_BCN_UPD_W0_PORT) |
3403 le32_encode_bits(0, RTW89_H2C_BCN_UPD_W0_MBSSID) |
3404 le32_encode_bits(rtwvif_link->mac_idx, RTW89_H2C_BCN_UPD_W0_BAND) |
3405 le32_encode_bits(tim_offset | BIT(7), RTW89_H2C_BCN_UPD_W0_GRP_IE_OFST);
3406 h2c->w1 = le32_encode_bits(rtwvif_link->mac_id, RTW89_H2C_BCN_UPD_W1_MACID) |
3407 le32_encode_bits(RTW89_MGMT_HW_SSN_SEL, RTW89_H2C_BCN_UPD_W1_SSN_SEL) |
3408 le32_encode_bits(RTW89_MGMT_HW_SEQ_MODE, RTW89_H2C_BCN_UPD_W1_SSN_MODE) |
3409 le32_encode_bits(beacon_rate, RTW89_H2C_BCN_UPD_W1_RATE);
3410
3411 skb_put_data(skb, skb_beacon->data, skb_beacon->len);
3412 dev_kfree_skb_any(skb_beacon);
3413
3414 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3415 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG,
3416 H2C_FUNC_MAC_BCN_UPD, 0, 1,
3417 bcn_total_len);
3418
3419 ret = rtw89_h2c_tx(rtwdev, skb, false);
3420 if (ret) {
3421 rtw89_err(rtwdev, "failed to send h2c\n");
3422 dev_kfree_skb_any(skb);
3423 return ret;
3424 }
3425
3426 return 0;
3427 }
3428 EXPORT_SYMBOL(rtw89_fw_h2c_update_beacon);
3429
rtw89_fw_h2c_update_beacon_be(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)3430 int rtw89_fw_h2c_update_beacon_be(struct rtw89_dev *rtwdev,
3431 struct rtw89_vif_link *rtwvif_link)
3432 {
3433 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, rtwvif_link->chanctx_idx);
3434 struct ieee80211_vif *vif = rtwvif_link_to_vif(rtwvif_link);
3435 struct rtw89_h2c_bcn_upd_be *h2c;
3436 struct sk_buff *skb_beacon;
3437 struct ieee80211_hdr *hdr;
3438 u32 len = sizeof(*h2c);
3439 struct sk_buff *skb;
3440 int bcn_total_len;
3441 u16 beacon_rate;
3442 u16 tim_offset;
3443 void *noa_data;
3444 u8 noa_len;
3445 int ret;
3446
3447 if (vif->p2p)
3448 beacon_rate = RTW89_HW_RATE_OFDM6;
3449 else if (chan->band_type == RTW89_BAND_2G)
3450 beacon_rate = RTW89_HW_RATE_CCK1;
3451 else
3452 beacon_rate = RTW89_HW_RATE_OFDM6;
3453
3454 skb_beacon = ieee80211_beacon_get_tim(rtwdev->hw, vif, &tim_offset,
3455 NULL, 0);
3456 if (!skb_beacon) {
3457 rtw89_err(rtwdev, "failed to get beacon skb\n");
3458 return -ENOMEM;
3459 }
3460
3461 noa_len = rtw89_p2p_noa_fetch(rtwvif_link, &noa_data);
3462 if (noa_len &&
3463 (noa_len <= skb_tailroom(skb_beacon) ||
3464 pskb_expand_head(skb_beacon, 0, noa_len, GFP_KERNEL) == 0)) {
3465 skb_put_data(skb_beacon, noa_data, noa_len);
3466 }
3467
3468 hdr = (struct ieee80211_hdr *)skb_beacon;
3469 tim_offset -= ieee80211_hdrlen(hdr->frame_control);
3470
3471 bcn_total_len = len + skb_beacon->len;
3472 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, bcn_total_len);
3473 if (!skb) {
3474 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n");
3475 dev_kfree_skb_any(skb_beacon);
3476 return -ENOMEM;
3477 }
3478 skb_put(skb, len);
3479 h2c = (struct rtw89_h2c_bcn_upd_be *)skb->data;
3480
3481 h2c->w0 = le32_encode_bits(rtwvif_link->port, RTW89_H2C_BCN_UPD_BE_W0_PORT) |
3482 le32_encode_bits(0, RTW89_H2C_BCN_UPD_BE_W0_MBSSID) |
3483 le32_encode_bits(rtwvif_link->mac_idx, RTW89_H2C_BCN_UPD_BE_W0_BAND) |
3484 le32_encode_bits(tim_offset | BIT(7), RTW89_H2C_BCN_UPD_BE_W0_GRP_IE_OFST);
3485 h2c->w1 = le32_encode_bits(rtwvif_link->mac_id, RTW89_H2C_BCN_UPD_BE_W1_MACID) |
3486 le32_encode_bits(RTW89_MGMT_HW_SSN_SEL, RTW89_H2C_BCN_UPD_BE_W1_SSN_SEL) |
3487 le32_encode_bits(RTW89_MGMT_HW_SEQ_MODE, RTW89_H2C_BCN_UPD_BE_W1_SSN_MODE) |
3488 le32_encode_bits(beacon_rate, RTW89_H2C_BCN_UPD_BE_W1_RATE);
3489
3490 skb_put_data(skb, skb_beacon->data, skb_beacon->len);
3491 dev_kfree_skb_any(skb_beacon);
3492
3493 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3494 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG,
3495 H2C_FUNC_MAC_BCN_UPD_BE, 0, 1,
3496 bcn_total_len);
3497
3498 ret = rtw89_h2c_tx(rtwdev, skb, false);
3499 if (ret) {
3500 rtw89_err(rtwdev, "failed to send h2c\n");
3501 goto fail;
3502 }
3503
3504 return 0;
3505
3506 fail:
3507 dev_kfree_skb_any(skb);
3508
3509 return ret;
3510 }
3511 EXPORT_SYMBOL(rtw89_fw_h2c_update_beacon_be);
3512
3513 #define H2C_ROLE_MAINTAIN_LEN 4
rtw89_fw_h2c_role_maintain(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link,enum rtw89_upd_mode upd_mode)3514 int rtw89_fw_h2c_role_maintain(struct rtw89_dev *rtwdev,
3515 struct rtw89_vif_link *rtwvif_link,
3516 struct rtw89_sta_link *rtwsta_link,
3517 enum rtw89_upd_mode upd_mode)
3518 {
3519 struct sk_buff *skb;
3520 u8 mac_id = rtwsta_link ? rtwsta_link->mac_id : rtwvif_link->mac_id;
3521 u8 self_role;
3522 int ret;
3523
3524 if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE) {
3525 if (rtwsta_link)
3526 self_role = RTW89_SELF_ROLE_AP_CLIENT;
3527 else
3528 self_role = rtwvif_link->self_role;
3529 } else {
3530 self_role = rtwvif_link->self_role;
3531 }
3532
3533 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_ROLE_MAINTAIN_LEN);
3534 if (!skb) {
3535 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n");
3536 return -ENOMEM;
3537 }
3538 skb_put(skb, H2C_ROLE_MAINTAIN_LEN);
3539 SET_FWROLE_MAINTAIN_MACID(skb->data, mac_id);
3540 SET_FWROLE_MAINTAIN_SELF_ROLE(skb->data, self_role);
3541 SET_FWROLE_MAINTAIN_UPD_MODE(skb->data, upd_mode);
3542 SET_FWROLE_MAINTAIN_WIFI_ROLE(skb->data, rtwvif_link->wifi_role);
3543
3544 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3545 H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT,
3546 H2C_FUNC_MAC_FWROLE_MAINTAIN, 0, 1,
3547 H2C_ROLE_MAINTAIN_LEN);
3548
3549 ret = rtw89_h2c_tx(rtwdev, skb, false);
3550 if (ret) {
3551 rtw89_err(rtwdev, "failed to send h2c\n");
3552 goto fail;
3553 }
3554
3555 return 0;
3556 fail:
3557 dev_kfree_skb_any(skb);
3558
3559 return ret;
3560 }
3561
3562 static enum rtw89_fw_sta_type
rtw89_fw_get_sta_type(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link)3563 rtw89_fw_get_sta_type(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
3564 struct rtw89_sta_link *rtwsta_link)
3565 {
3566 struct ieee80211_bss_conf *bss_conf;
3567 struct ieee80211_link_sta *link_sta;
3568 enum rtw89_fw_sta_type type;
3569
3570 rcu_read_lock();
3571
3572 if (!rtwsta_link)
3573 goto by_vif;
3574
3575 link_sta = rtw89_sta_rcu_dereference_link(rtwsta_link, true);
3576
3577 if (link_sta->eht_cap.has_eht)
3578 type = RTW89_FW_BE_STA;
3579 else if (link_sta->he_cap.has_he)
3580 type = RTW89_FW_AX_STA;
3581 else
3582 type = RTW89_FW_N_AC_STA;
3583
3584 goto out;
3585
3586 by_vif:
3587 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, true);
3588
3589 if (bss_conf->eht_support)
3590 type = RTW89_FW_BE_STA;
3591 else if (bss_conf->he_support)
3592 type = RTW89_FW_AX_STA;
3593 else
3594 type = RTW89_FW_N_AC_STA;
3595
3596 out:
3597 rcu_read_unlock();
3598
3599 return type;
3600 }
3601
rtw89_fw_h2c_join_info(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct rtw89_sta_link * rtwsta_link,bool dis_conn)3602 int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
3603 struct rtw89_sta_link *rtwsta_link, bool dis_conn)
3604 {
3605 struct sk_buff *skb;
3606 u8 mac_id = rtwsta_link ? rtwsta_link->mac_id : rtwvif_link->mac_id;
3607 u8 self_role = rtwvif_link->self_role;
3608 enum rtw89_fw_sta_type sta_type;
3609 u8 net_type = rtwvif_link->net_type;
3610 struct rtw89_h2c_join_v1 *h2c_v1;
3611 struct rtw89_h2c_join *h2c;
3612 u32 len = sizeof(*h2c);
3613 bool format_v1 = false;
3614 int ret;
3615
3616 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) {
3617 len = sizeof(*h2c_v1);
3618 format_v1 = true;
3619 }
3620
3621 if (net_type == RTW89_NET_TYPE_AP_MODE && rtwsta_link) {
3622 self_role = RTW89_SELF_ROLE_AP_CLIENT;
3623 net_type = dis_conn ? RTW89_NET_TYPE_NO_LINK : net_type;
3624 }
3625
3626 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
3627 if (!skb) {
3628 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n");
3629 return -ENOMEM;
3630 }
3631 skb_put(skb, len);
3632 h2c = (struct rtw89_h2c_join *)skb->data;
3633
3634 h2c->w0 = le32_encode_bits(mac_id, RTW89_H2C_JOININFO_W0_MACID) |
3635 le32_encode_bits(dis_conn, RTW89_H2C_JOININFO_W0_OP) |
3636 le32_encode_bits(rtwvif_link->mac_idx, RTW89_H2C_JOININFO_W0_BAND) |
3637 le32_encode_bits(rtwvif_link->wmm, RTW89_H2C_JOININFO_W0_WMM) |
3638 le32_encode_bits(rtwvif_link->trigger, RTW89_H2C_JOININFO_W0_TGR) |
3639 le32_encode_bits(0, RTW89_H2C_JOININFO_W0_ISHESTA) |
3640 le32_encode_bits(0, RTW89_H2C_JOININFO_W0_DLBW) |
3641 le32_encode_bits(0, RTW89_H2C_JOININFO_W0_TF_MAC_PAD) |
3642 le32_encode_bits(0, RTW89_H2C_JOININFO_W0_DL_T_PE) |
3643 le32_encode_bits(rtwvif_link->port, RTW89_H2C_JOININFO_W0_PORT_ID) |
3644 le32_encode_bits(net_type, RTW89_H2C_JOININFO_W0_NET_TYPE) |
3645 le32_encode_bits(rtwvif_link->wifi_role,
3646 RTW89_H2C_JOININFO_W0_WIFI_ROLE) |
3647 le32_encode_bits(self_role, RTW89_H2C_JOININFO_W0_SELF_ROLE);
3648
3649 if (!format_v1)
3650 goto done;
3651
3652 h2c_v1 = (struct rtw89_h2c_join_v1 *)skb->data;
3653
3654 sta_type = rtw89_fw_get_sta_type(rtwdev, rtwvif_link, rtwsta_link);
3655
3656 h2c_v1->w1 = le32_encode_bits(sta_type, RTW89_H2C_JOININFO_W1_STA_TYPE);
3657 h2c_v1->w2 = 0;
3658
3659 done:
3660 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3661 H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT,
3662 H2C_FUNC_MAC_JOININFO, 0, 1,
3663 len);
3664
3665 ret = rtw89_h2c_tx(rtwdev, skb, false);
3666 if (ret) {
3667 rtw89_err(rtwdev, "failed to send h2c\n");
3668 goto fail;
3669 }
3670
3671 return 0;
3672 fail:
3673 dev_kfree_skb_any(skb);
3674
3675 return ret;
3676 }
3677
rtw89_fw_h2c_notify_dbcc(struct rtw89_dev * rtwdev,bool en)3678 int rtw89_fw_h2c_notify_dbcc(struct rtw89_dev *rtwdev, bool en)
3679 {
3680 struct rtw89_h2c_notify_dbcc *h2c;
3681 u32 len = sizeof(*h2c);
3682 struct sk_buff *skb;
3683 int ret;
3684
3685 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
3686 if (!skb) {
3687 rtw89_err(rtwdev, "failed to alloc skb for h2c notify dbcc\n");
3688 return -ENOMEM;
3689 }
3690 skb_put(skb, len);
3691 h2c = (struct rtw89_h2c_notify_dbcc *)skb->data;
3692
3693 h2c->w0 = le32_encode_bits(en, RTW89_H2C_NOTIFY_DBCC_EN);
3694
3695 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3696 H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT,
3697 H2C_FUNC_NOTIFY_DBCC, 0, 1,
3698 len);
3699
3700 ret = rtw89_h2c_tx(rtwdev, skb, false);
3701 if (ret) {
3702 rtw89_err(rtwdev, "failed to send h2c\n");
3703 goto fail;
3704 }
3705
3706 return 0;
3707 fail:
3708 dev_kfree_skb_any(skb);
3709
3710 return ret;
3711 }
3712
rtw89_fw_h2c_macid_pause(struct rtw89_dev * rtwdev,u8 sh,u8 grp,bool pause)3713 int rtw89_fw_h2c_macid_pause(struct rtw89_dev *rtwdev, u8 sh, u8 grp,
3714 bool pause)
3715 {
3716 struct rtw89_fw_macid_pause_sleep_grp *h2c_new;
3717 struct rtw89_fw_macid_pause_grp *h2c;
3718 __le32 set = cpu_to_le32(BIT(sh));
3719 u8 h2c_macid_pause_id;
3720 struct sk_buff *skb;
3721 u32 len;
3722 int ret;
3723
3724 if (RTW89_CHK_FW_FEATURE(MACID_PAUSE_SLEEP, &rtwdev->fw)) {
3725 h2c_macid_pause_id = H2C_FUNC_MAC_MACID_PAUSE_SLEEP;
3726 len = sizeof(*h2c_new);
3727 } else {
3728 h2c_macid_pause_id = H2C_FUNC_MAC_MACID_PAUSE;
3729 len = sizeof(*h2c);
3730 }
3731
3732 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
3733 if (!skb) {
3734 rtw89_err(rtwdev, "failed to alloc skb for h2c macid pause\n");
3735 return -ENOMEM;
3736 }
3737 skb_put(skb, len);
3738
3739 if (h2c_macid_pause_id == H2C_FUNC_MAC_MACID_PAUSE_SLEEP) {
3740 h2c_new = (struct rtw89_fw_macid_pause_sleep_grp *)skb->data;
3741
3742 h2c_new->n[0].pause_mask_grp[grp] = set;
3743 h2c_new->n[0].sleep_mask_grp[grp] = set;
3744 if (pause) {
3745 h2c_new->n[0].pause_grp[grp] = set;
3746 h2c_new->n[0].sleep_grp[grp] = set;
3747 }
3748 } else {
3749 h2c = (struct rtw89_fw_macid_pause_grp *)skb->data;
3750
3751 h2c->mask_grp[grp] = set;
3752 if (pause)
3753 h2c->pause_grp[grp] = set;
3754 }
3755
3756 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3757 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
3758 h2c_macid_pause_id, 1, 0,
3759 len);
3760
3761 ret = rtw89_h2c_tx(rtwdev, skb, false);
3762 if (ret) {
3763 rtw89_err(rtwdev, "failed to send h2c\n");
3764 goto fail;
3765 }
3766
3767 return 0;
3768 fail:
3769 dev_kfree_skb_any(skb);
3770
3771 return ret;
3772 }
3773
3774 #define H2C_EDCA_LEN 12
rtw89_fw_h2c_set_edca(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,u8 ac,u32 val)3775 int rtw89_fw_h2c_set_edca(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
3776 u8 ac, u32 val)
3777 {
3778 struct sk_buff *skb;
3779 int ret;
3780
3781 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_EDCA_LEN);
3782 if (!skb) {
3783 rtw89_err(rtwdev, "failed to alloc skb for h2c edca\n");
3784 return -ENOMEM;
3785 }
3786 skb_put(skb, H2C_EDCA_LEN);
3787 RTW89_SET_EDCA_SEL(skb->data, 0);
3788 RTW89_SET_EDCA_BAND(skb->data, rtwvif_link->mac_idx);
3789 RTW89_SET_EDCA_WMM(skb->data, 0);
3790 RTW89_SET_EDCA_AC(skb->data, ac);
3791 RTW89_SET_EDCA_PARAM(skb->data, val);
3792
3793 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3794 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
3795 H2C_FUNC_USR_EDCA, 0, 1,
3796 H2C_EDCA_LEN);
3797
3798 ret = rtw89_h2c_tx(rtwdev, skb, false);
3799 if (ret) {
3800 rtw89_err(rtwdev, "failed to send h2c\n");
3801 goto fail;
3802 }
3803
3804 return 0;
3805 fail:
3806 dev_kfree_skb_any(skb);
3807
3808 return ret;
3809 }
3810
3811 #define H2C_TSF32_TOGL_LEN 4
rtw89_fw_h2c_tsf32_toggle(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool en)3812 int rtw89_fw_h2c_tsf32_toggle(struct rtw89_dev *rtwdev,
3813 struct rtw89_vif_link *rtwvif_link,
3814 bool en)
3815 {
3816 struct sk_buff *skb;
3817 u16 early_us = en ? 2000 : 0;
3818 u8 *cmd;
3819 int ret;
3820
3821 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_TSF32_TOGL_LEN);
3822 if (!skb) {
3823 rtw89_err(rtwdev, "failed to alloc skb for h2c p2p act\n");
3824 return -ENOMEM;
3825 }
3826 skb_put(skb, H2C_TSF32_TOGL_LEN);
3827 cmd = skb->data;
3828
3829 RTW89_SET_FWCMD_TSF32_TOGL_BAND(cmd, rtwvif_link->mac_idx);
3830 RTW89_SET_FWCMD_TSF32_TOGL_EN(cmd, en);
3831 RTW89_SET_FWCMD_TSF32_TOGL_PORT(cmd, rtwvif_link->port);
3832 RTW89_SET_FWCMD_TSF32_TOGL_EARLY(cmd, early_us);
3833
3834 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3835 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
3836 H2C_FUNC_TSF32_TOGL, 0, 0,
3837 H2C_TSF32_TOGL_LEN);
3838
3839 ret = rtw89_h2c_tx(rtwdev, skb, false);
3840 if (ret) {
3841 rtw89_err(rtwdev, "failed to send h2c\n");
3842 goto fail;
3843 }
3844
3845 return 0;
3846 fail:
3847 dev_kfree_skb_any(skb);
3848
3849 return ret;
3850 }
3851
3852 #define H2C_OFLD_CFG_LEN 8
rtw89_fw_h2c_set_ofld_cfg(struct rtw89_dev * rtwdev)3853 int rtw89_fw_h2c_set_ofld_cfg(struct rtw89_dev *rtwdev)
3854 {
3855 static const u8 cfg[] = {0x09, 0x00, 0x00, 0x00, 0x5e, 0x00, 0x00, 0x00};
3856 struct sk_buff *skb;
3857 int ret;
3858
3859 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_OFLD_CFG_LEN);
3860 if (!skb) {
3861 rtw89_err(rtwdev, "failed to alloc skb for h2c ofld\n");
3862 return -ENOMEM;
3863 }
3864 skb_put_data(skb, cfg, H2C_OFLD_CFG_LEN);
3865
3866 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3867 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
3868 H2C_FUNC_OFLD_CFG, 0, 1,
3869 H2C_OFLD_CFG_LEN);
3870
3871 ret = rtw89_h2c_tx(rtwdev, skb, false);
3872 if (ret) {
3873 rtw89_err(rtwdev, "failed to send h2c\n");
3874 goto fail;
3875 }
3876
3877 return 0;
3878 fail:
3879 dev_kfree_skb_any(skb);
3880
3881 return ret;
3882 }
3883
rtw89_fw_h2c_set_bcn_fltr_cfg(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool connect)3884 int rtw89_fw_h2c_set_bcn_fltr_cfg(struct rtw89_dev *rtwdev,
3885 struct rtw89_vif_link *rtwvif_link,
3886 bool connect)
3887 {
3888 struct ieee80211_bss_conf *bss_conf;
3889 s32 thold = RTW89_DEFAULT_CQM_THOLD;
3890 u32 hyst = RTW89_DEFAULT_CQM_HYST;
3891 struct rtw89_h2c_bcnfltr *h2c;
3892 u32 len = sizeof(*h2c);
3893 struct sk_buff *skb;
3894 int ret;
3895
3896 if (!RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw))
3897 return -EINVAL;
3898
3899 if (!rtwvif_link || rtwvif_link->net_type != RTW89_NET_TYPE_INFRA)
3900 return -EINVAL;
3901
3902 rcu_read_lock();
3903
3904 bss_conf = rtw89_vif_rcu_dereference_link(rtwvif_link, false);
3905
3906 if (bss_conf->cqm_rssi_hyst)
3907 hyst = bss_conf->cqm_rssi_hyst;
3908 if (bss_conf->cqm_rssi_thold)
3909 thold = bss_conf->cqm_rssi_thold;
3910
3911 rcu_read_unlock();
3912
3913 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
3914 if (!skb) {
3915 rtw89_err(rtwdev, "failed to alloc skb for h2c bcn filter\n");
3916 return -ENOMEM;
3917 }
3918
3919 skb_put(skb, len);
3920 h2c = (struct rtw89_h2c_bcnfltr *)skb->data;
3921
3922 h2c->w0 = le32_encode_bits(connect, RTW89_H2C_BCNFLTR_W0_MON_RSSI) |
3923 le32_encode_bits(connect, RTW89_H2C_BCNFLTR_W0_MON_BCN) |
3924 le32_encode_bits(connect, RTW89_H2C_BCNFLTR_W0_MON_EN) |
3925 le32_encode_bits(RTW89_BCN_FLTR_OFFLOAD_MODE_DEFAULT,
3926 RTW89_H2C_BCNFLTR_W0_MODE) |
3927 le32_encode_bits(RTW89_BCN_LOSS_CNT, RTW89_H2C_BCNFLTR_W0_BCN_LOSS_CNT) |
3928 le32_encode_bits(hyst, RTW89_H2C_BCNFLTR_W0_RSSI_HYST) |
3929 le32_encode_bits(thold + MAX_RSSI,
3930 RTW89_H2C_BCNFLTR_W0_RSSI_THRESHOLD) |
3931 le32_encode_bits(rtwvif_link->mac_id, RTW89_H2C_BCNFLTR_W0_MAC_ID);
3932
3933 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3934 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
3935 H2C_FUNC_CFG_BCNFLTR, 0, 1, len);
3936
3937 ret = rtw89_h2c_tx(rtwdev, skb, false);
3938 if (ret) {
3939 rtw89_err(rtwdev, "failed to send h2c\n");
3940 goto fail;
3941 }
3942
3943 return 0;
3944 fail:
3945 dev_kfree_skb_any(skb);
3946
3947 return ret;
3948 }
3949
rtw89_fw_h2c_rssi_offload(struct rtw89_dev * rtwdev,struct rtw89_rx_phy_ppdu * phy_ppdu)3950 int rtw89_fw_h2c_rssi_offload(struct rtw89_dev *rtwdev,
3951 struct rtw89_rx_phy_ppdu *phy_ppdu)
3952 {
3953 struct rtw89_h2c_ofld_rssi *h2c;
3954 u32 len = sizeof(*h2c);
3955 struct sk_buff *skb;
3956 s8 rssi;
3957 int ret;
3958
3959 if (!RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw))
3960 return -EINVAL;
3961
3962 if (!phy_ppdu)
3963 return -EINVAL;
3964
3965 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
3966 if (!skb) {
3967 rtw89_err(rtwdev, "failed to alloc skb for h2c rssi\n");
3968 return -ENOMEM;
3969 }
3970
3971 rssi = phy_ppdu->rssi_avg >> RSSI_FACTOR;
3972 skb_put(skb, len);
3973 h2c = (struct rtw89_h2c_ofld_rssi *)skb->data;
3974
3975 h2c->w0 = le32_encode_bits(phy_ppdu->mac_id, RTW89_H2C_OFLD_RSSI_W0_MACID) |
3976 le32_encode_bits(1, RTW89_H2C_OFLD_RSSI_W0_NUM);
3977 h2c->w1 = le32_encode_bits(rssi, RTW89_H2C_OFLD_RSSI_W1_VAL);
3978
3979 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
3980 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
3981 H2C_FUNC_OFLD_RSSI, 0, 1, len);
3982
3983 ret = rtw89_h2c_tx(rtwdev, skb, false);
3984 if (ret) {
3985 rtw89_err(rtwdev, "failed to send h2c\n");
3986 goto fail;
3987 }
3988
3989 return 0;
3990 fail:
3991 dev_kfree_skb_any(skb);
3992
3993 return ret;
3994 }
3995
rtw89_fw_h2c_tp_offload(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)3996 int rtw89_fw_h2c_tp_offload(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link)
3997 {
3998 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
3999 struct rtw89_traffic_stats *stats = &rtwvif->stats;
4000 struct rtw89_h2c_ofld *h2c;
4001 u32 len = sizeof(*h2c);
4002 struct sk_buff *skb;
4003 int ret;
4004
4005 if (rtwvif_link->net_type != RTW89_NET_TYPE_INFRA)
4006 return -EINVAL;
4007
4008 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
4009 if (!skb) {
4010 rtw89_err(rtwdev, "failed to alloc skb for h2c tp\n");
4011 return -ENOMEM;
4012 }
4013
4014 skb_put(skb, len);
4015 h2c = (struct rtw89_h2c_ofld *)skb->data;
4016
4017 h2c->w0 = le32_encode_bits(rtwvif_link->mac_id, RTW89_H2C_OFLD_W0_MAC_ID) |
4018 le32_encode_bits(stats->tx_throughput, RTW89_H2C_OFLD_W0_TX_TP) |
4019 le32_encode_bits(stats->rx_throughput, RTW89_H2C_OFLD_W0_RX_TP);
4020
4021 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4022 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
4023 H2C_FUNC_OFLD_TP, 0, 1, len);
4024
4025 ret = rtw89_h2c_tx(rtwdev, skb, false);
4026 if (ret) {
4027 rtw89_err(rtwdev, "failed to send h2c\n");
4028 goto fail;
4029 }
4030
4031 return 0;
4032 fail:
4033 dev_kfree_skb_any(skb);
4034
4035 return ret;
4036 }
4037
rtw89_fw_h2c_ra(struct rtw89_dev * rtwdev,struct rtw89_ra_info * ra,bool csi)4038 int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi)
4039 {
4040 const struct rtw89_chip_info *chip = rtwdev->chip;
4041 struct rtw89_h2c_ra_v1 *h2c_v1;
4042 struct rtw89_h2c_ra *h2c;
4043 u32 len = sizeof(*h2c);
4044 bool format_v1 = false;
4045 struct sk_buff *skb;
4046 int ret;
4047
4048 if (chip->chip_gen == RTW89_CHIP_BE) {
4049 len = sizeof(*h2c_v1);
4050 format_v1 = true;
4051 }
4052
4053 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
4054 if (!skb) {
4055 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n");
4056 return -ENOMEM;
4057 }
4058 skb_put(skb, len);
4059 h2c = (struct rtw89_h2c_ra *)skb->data;
4060 rtw89_debug(rtwdev, RTW89_DBG_RA,
4061 "ra cmd msk: %llx ", ra->ra_mask);
4062
4063 h2c->w0 = le32_encode_bits(ra->mode_ctrl, RTW89_H2C_RA_W0_MODE) |
4064 le32_encode_bits(ra->bw_cap, RTW89_H2C_RA_W0_BW_CAP) |
4065 le32_encode_bits(ra->macid, RTW89_H2C_RA_W0_MACID) |
4066 le32_encode_bits(ra->dcm_cap, RTW89_H2C_RA_W0_DCM) |
4067 le32_encode_bits(ra->er_cap, RTW89_H2C_RA_W0_ER) |
4068 le32_encode_bits(ra->init_rate_lv, RTW89_H2C_RA_W0_INIT_RATE_LV) |
4069 le32_encode_bits(ra->upd_all, RTW89_H2C_RA_W0_UPD_ALL) |
4070 le32_encode_bits(ra->en_sgi, RTW89_H2C_RA_W0_SGI) |
4071 le32_encode_bits(ra->ldpc_cap, RTW89_H2C_RA_W0_LDPC) |
4072 le32_encode_bits(ra->stbc_cap, RTW89_H2C_RA_W0_STBC) |
4073 le32_encode_bits(ra->ss_num, RTW89_H2C_RA_W0_SS_NUM) |
4074 le32_encode_bits(ra->giltf, RTW89_H2C_RA_W0_GILTF) |
4075 le32_encode_bits(ra->upd_bw_nss_mask, RTW89_H2C_RA_W0_UPD_BW_NSS_MASK) |
4076 le32_encode_bits(ra->upd_mask, RTW89_H2C_RA_W0_UPD_MASK);
4077 h2c->w1 = le32_encode_bits(ra->ra_mask, RTW89_H2C_RA_W1_RAMASK_LO32);
4078 h2c->w2 = le32_encode_bits(ra->ra_mask >> 32, RTW89_H2C_RA_W2_RAMASK_HI32);
4079 h2c->w3 = le32_encode_bits(ra->fix_giltf_en, RTW89_H2C_RA_W3_FIX_GILTF_EN) |
4080 le32_encode_bits(ra->fix_giltf, RTW89_H2C_RA_W3_FIX_GILTF);
4081
4082 if (!format_v1)
4083 goto csi;
4084
4085 h2c_v1 = (struct rtw89_h2c_ra_v1 *)h2c;
4086 h2c_v1->w4 = le32_encode_bits(ra->mode_ctrl, RTW89_H2C_RA_V1_W4_MODE_EHT) |
4087 le32_encode_bits(ra->bw_cap, RTW89_H2C_RA_V1_W4_BW_EHT);
4088
4089 csi:
4090 if (!csi)
4091 goto done;
4092
4093 h2c->w2 |= le32_encode_bits(1, RTW89_H2C_RA_W2_BFEE_CSI_CTL);
4094 h2c->w3 |= le32_encode_bits(ra->band_num, RTW89_H2C_RA_W3_BAND_NUM) |
4095 le32_encode_bits(ra->cr_tbl_sel, RTW89_H2C_RA_W3_CR_TBL_SEL) |
4096 le32_encode_bits(ra->fixed_csi_rate_en, RTW89_H2C_RA_W3_FIXED_CSI_RATE_EN) |
4097 le32_encode_bits(ra->ra_csi_rate_en, RTW89_H2C_RA_W3_RA_CSI_RATE_EN) |
4098 le32_encode_bits(ra->csi_mcs_ss_idx, RTW89_H2C_RA_W3_FIXED_CSI_MCS_SS_IDX) |
4099 le32_encode_bits(ra->csi_mode, RTW89_H2C_RA_W3_FIXED_CSI_MODE) |
4100 le32_encode_bits(ra->csi_gi_ltf, RTW89_H2C_RA_W3_FIXED_CSI_GI_LTF) |
4101 le32_encode_bits(ra->csi_bw, RTW89_H2C_RA_W3_FIXED_CSI_BW);
4102
4103 done:
4104 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4105 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RA,
4106 H2C_FUNC_OUTSRC_RA_MACIDCFG, 0, 0,
4107 len);
4108
4109 ret = rtw89_h2c_tx(rtwdev, skb, false);
4110 if (ret) {
4111 rtw89_err(rtwdev, "failed to send h2c\n");
4112 goto fail;
4113 }
4114
4115 return 0;
4116 fail:
4117 dev_kfree_skb_any(skb);
4118
4119 return ret;
4120 }
4121
rtw89_fw_h2c_cxdrv_init(struct rtw89_dev * rtwdev,u8 type)4122 int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev, u8 type)
4123 {
4124 struct rtw89_btc *btc = &rtwdev->btc;
4125 struct rtw89_btc_dm *dm = &btc->dm;
4126 struct rtw89_btc_init_info *init_info = &dm->init_info.init;
4127 struct rtw89_btc_module *module = &init_info->module;
4128 struct rtw89_btc_ant_info *ant = &module->ant;
4129 struct rtw89_h2c_cxinit *h2c;
4130 u32 len = sizeof(*h2c);
4131 struct sk_buff *skb;
4132 int ret;
4133
4134 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
4135 if (!skb) {
4136 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_init\n");
4137 return -ENOMEM;
4138 }
4139 skb_put(skb, len);
4140 h2c = (struct rtw89_h2c_cxinit *)skb->data;
4141
4142 h2c->hdr.type = type;
4143 h2c->hdr.len = len - H2C_LEN_CXDRVHDR;
4144
4145 h2c->ant_type = ant->type;
4146 h2c->ant_num = ant->num;
4147 h2c->ant_iso = ant->isolation;
4148 h2c->ant_info =
4149 u8_encode_bits(ant->single_pos, RTW89_H2C_CXINIT_ANT_INFO_POS) |
4150 u8_encode_bits(ant->diversity, RTW89_H2C_CXINIT_ANT_INFO_DIVERSITY) |
4151 u8_encode_bits(ant->btg_pos, RTW89_H2C_CXINIT_ANT_INFO_BTG_POS) |
4152 u8_encode_bits(ant->stream_cnt, RTW89_H2C_CXINIT_ANT_INFO_STREAM_CNT);
4153
4154 h2c->mod_rfe = module->rfe_type;
4155 h2c->mod_cv = module->cv;
4156 h2c->mod_info =
4157 u8_encode_bits(module->bt_solo, RTW89_H2C_CXINIT_MOD_INFO_BT_SOLO) |
4158 u8_encode_bits(module->bt_pos, RTW89_H2C_CXINIT_MOD_INFO_BT_POS) |
4159 u8_encode_bits(module->switch_type, RTW89_H2C_CXINIT_MOD_INFO_SW_TYPE) |
4160 u8_encode_bits(module->wa_type, RTW89_H2C_CXINIT_MOD_INFO_WA_TYPE);
4161 h2c->mod_adie_kt = module->kt_ver_adie;
4162 h2c->wl_gch = init_info->wl_guard_ch;
4163
4164 h2c->info =
4165 u8_encode_bits(init_info->wl_only, RTW89_H2C_CXINIT_INFO_WL_ONLY) |
4166 u8_encode_bits(init_info->wl_init_ok, RTW89_H2C_CXINIT_INFO_WL_INITOK) |
4167 u8_encode_bits(init_info->dbcc_en, RTW89_H2C_CXINIT_INFO_DBCC_EN) |
4168 u8_encode_bits(init_info->cx_other, RTW89_H2C_CXINIT_INFO_CX_OTHER) |
4169 u8_encode_bits(init_info->bt_only, RTW89_H2C_CXINIT_INFO_BT_ONLY);
4170
4171 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4172 H2C_CAT_OUTSRC, BTFC_SET,
4173 SET_DRV_INFO, 0, 0,
4174 len);
4175
4176 ret = rtw89_h2c_tx(rtwdev, skb, false);
4177 if (ret) {
4178 rtw89_err(rtwdev, "failed to send h2c\n");
4179 goto fail;
4180 }
4181
4182 return 0;
4183 fail:
4184 dev_kfree_skb_any(skb);
4185
4186 return ret;
4187 }
4188
rtw89_fw_h2c_cxdrv_init_v7(struct rtw89_dev * rtwdev,u8 type)4189 int rtw89_fw_h2c_cxdrv_init_v7(struct rtw89_dev *rtwdev, u8 type)
4190 {
4191 struct rtw89_btc *btc = &rtwdev->btc;
4192 struct rtw89_btc_dm *dm = &btc->dm;
4193 struct rtw89_btc_init_info_v7 *init_info = &dm->init_info.init_v7;
4194 struct rtw89_h2c_cxinit_v7 *h2c;
4195 u32 len = sizeof(*h2c);
4196 struct sk_buff *skb;
4197 int ret;
4198
4199 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
4200 if (!skb) {
4201 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_init_v7\n");
4202 return -ENOMEM;
4203 }
4204 skb_put(skb, len);
4205 h2c = (struct rtw89_h2c_cxinit_v7 *)skb->data;
4206
4207 h2c->hdr.type = type;
4208 h2c->hdr.ver = btc->ver->fcxinit;
4209 h2c->hdr.len = len - H2C_LEN_CXDRVHDR_V7;
4210 h2c->init = *init_info;
4211
4212 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4213 H2C_CAT_OUTSRC, BTFC_SET,
4214 SET_DRV_INFO, 0, 0,
4215 len);
4216
4217 ret = rtw89_h2c_tx(rtwdev, skb, false);
4218 if (ret) {
4219 rtw89_err(rtwdev, "failed to send h2c\n");
4220 goto fail;
4221 }
4222
4223 return 0;
4224 fail:
4225 dev_kfree_skb_any(skb);
4226
4227 return ret;
4228 }
4229
4230 #define PORT_DATA_OFFSET 4
4231 #define H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN 12
4232 #define H2C_LEN_CXDRVINFO_ROLE_SIZE(max_role_num) \
4233 (4 + 12 * (max_role_num) + H2C_LEN_CXDRVHDR)
4234
rtw89_fw_h2c_cxdrv_role(struct rtw89_dev * rtwdev,u8 type)4235 int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev, u8 type)
4236 {
4237 struct rtw89_btc *btc = &rtwdev->btc;
4238 const struct rtw89_btc_ver *ver = btc->ver;
4239 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4240 struct rtw89_btc_wl_role_info *role_info = &wl->role_info;
4241 struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role;
4242 struct rtw89_btc_wl_active_role *active = role_info->active_role;
4243 struct sk_buff *skb;
4244 u32 len;
4245 u8 offset = 0;
4246 u8 *cmd;
4247 int ret;
4248 int i;
4249
4250 len = H2C_LEN_CXDRVINFO_ROLE_SIZE(ver->max_role_num);
4251
4252 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
4253 if (!skb) {
4254 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n");
4255 return -ENOMEM;
4256 }
4257 skb_put(skb, len);
4258 cmd = skb->data;
4259
4260 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, type);
4261 RTW89_SET_FWCMD_CXHDR_LEN(cmd, len - H2C_LEN_CXDRVHDR);
4262
4263 RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt);
4264 RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode);
4265
4266 RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none);
4267 RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station);
4268 RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap);
4269 RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap);
4270 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc);
4271 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master);
4272 RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh);
4273 RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter);
4274 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device);
4275 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc);
4276 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go);
4277 RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan);
4278
4279 for (i = 0; i < RTW89_PORT_NUM; i++, active++) {
4280 RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, active->connected, i, offset);
4281 RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, active->pid, i, offset);
4282 RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, active->phy, i, offset);
4283 RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, active->noa, i, offset);
4284 RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, active->band, i, offset);
4285 RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, active->client_ps, i, offset);
4286 RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, active->bw, i, offset);
4287 RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, active->role, i, offset);
4288 RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, active->ch, i, offset);
4289 RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, active->tx_lvl, i, offset);
4290 RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, active->rx_lvl, i, offset);
4291 RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, active->tx_rate, i, offset);
4292 RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, active->rx_rate, i, offset);
4293 }
4294
4295 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4296 H2C_CAT_OUTSRC, BTFC_SET,
4297 SET_DRV_INFO, 0, 0,
4298 len);
4299
4300 ret = rtw89_h2c_tx(rtwdev, skb, false);
4301 if (ret) {
4302 rtw89_err(rtwdev, "failed to send h2c\n");
4303 goto fail;
4304 }
4305
4306 return 0;
4307 fail:
4308 dev_kfree_skb_any(skb);
4309
4310 return ret;
4311 }
4312
4313 #define H2C_LEN_CXDRVINFO_ROLE_SIZE_V1(max_role_num) \
4314 (4 + 16 * (max_role_num) + H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN + H2C_LEN_CXDRVHDR)
4315
rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev * rtwdev,u8 type)4316 int rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev *rtwdev, u8 type)
4317 {
4318 struct rtw89_btc *btc = &rtwdev->btc;
4319 const struct rtw89_btc_ver *ver = btc->ver;
4320 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4321 struct rtw89_btc_wl_role_info_v1 *role_info = &wl->role_info_v1;
4322 struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role;
4323 struct rtw89_btc_wl_active_role_v1 *active = role_info->active_role_v1;
4324 struct sk_buff *skb;
4325 u32 len;
4326 u8 *cmd, offset;
4327 int ret;
4328 int i;
4329
4330 len = H2C_LEN_CXDRVINFO_ROLE_SIZE_V1(ver->max_role_num);
4331
4332 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
4333 if (!skb) {
4334 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n");
4335 return -ENOMEM;
4336 }
4337 skb_put(skb, len);
4338 cmd = skb->data;
4339
4340 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, type);
4341 RTW89_SET_FWCMD_CXHDR_LEN(cmd, len - H2C_LEN_CXDRVHDR);
4342
4343 RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt);
4344 RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode);
4345
4346 RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none);
4347 RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station);
4348 RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap);
4349 RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap);
4350 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc);
4351 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master);
4352 RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh);
4353 RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter);
4354 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device);
4355 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc);
4356 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go);
4357 RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan);
4358
4359 offset = PORT_DATA_OFFSET;
4360 for (i = 0; i < RTW89_PORT_NUM; i++, active++) {
4361 RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, active->connected, i, offset);
4362 RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, active->pid, i, offset);
4363 RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, active->phy, i, offset);
4364 RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, active->noa, i, offset);
4365 RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, active->band, i, offset);
4366 RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, active->client_ps, i, offset);
4367 RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, active->bw, i, offset);
4368 RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, active->role, i, offset);
4369 RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, active->ch, i, offset);
4370 RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, active->tx_lvl, i, offset);
4371 RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, active->rx_lvl, i, offset);
4372 RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, active->tx_rate, i, offset);
4373 RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, active->rx_rate, i, offset);
4374 RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR(cmd, active->noa_duration, i, offset);
4375 }
4376
4377 offset = len - H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN;
4378 RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(cmd, role_info->mrole_type, offset);
4379 RTW89_SET_FWCMD_CXROLE_MROLE_NOA(cmd, role_info->mrole_noa_duration, offset);
4380 RTW89_SET_FWCMD_CXROLE_DBCC_EN(cmd, role_info->dbcc_en, offset);
4381 RTW89_SET_FWCMD_CXROLE_DBCC_CHG(cmd, role_info->dbcc_chg, offset);
4382 RTW89_SET_FWCMD_CXROLE_DBCC_2G_PHY(cmd, role_info->dbcc_2g_phy, offset);
4383 RTW89_SET_FWCMD_CXROLE_LINK_MODE_CHG(cmd, role_info->link_mode_chg, offset);
4384
4385 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4386 H2C_CAT_OUTSRC, BTFC_SET,
4387 SET_DRV_INFO, 0, 0,
4388 len);
4389
4390 ret = rtw89_h2c_tx(rtwdev, skb, false);
4391 if (ret) {
4392 rtw89_err(rtwdev, "failed to send h2c\n");
4393 goto fail;
4394 }
4395
4396 return 0;
4397 fail:
4398 dev_kfree_skb_any(skb);
4399
4400 return ret;
4401 }
4402
4403 #define H2C_LEN_CXDRVINFO_ROLE_SIZE_V2(max_role_num) \
4404 (4 + 8 * (max_role_num) + H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN + H2C_LEN_CXDRVHDR)
4405
rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev * rtwdev,u8 type)4406 int rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev *rtwdev, u8 type)
4407 {
4408 struct rtw89_btc *btc = &rtwdev->btc;
4409 const struct rtw89_btc_ver *ver = btc->ver;
4410 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4411 struct rtw89_btc_wl_role_info_v2 *role_info = &wl->role_info_v2;
4412 struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role;
4413 struct rtw89_btc_wl_active_role_v2 *active = role_info->active_role_v2;
4414 struct sk_buff *skb;
4415 u32 len;
4416 u8 *cmd, offset;
4417 int ret;
4418 int i;
4419
4420 len = H2C_LEN_CXDRVINFO_ROLE_SIZE_V2(ver->max_role_num);
4421
4422 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
4423 if (!skb) {
4424 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n");
4425 return -ENOMEM;
4426 }
4427 skb_put(skb, len);
4428 cmd = skb->data;
4429
4430 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, type);
4431 RTW89_SET_FWCMD_CXHDR_LEN(cmd, len - H2C_LEN_CXDRVHDR);
4432
4433 RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt);
4434 RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode);
4435
4436 RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none);
4437 RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station);
4438 RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap);
4439 RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap);
4440 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc);
4441 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master);
4442 RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh);
4443 RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter);
4444 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device);
4445 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc);
4446 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go);
4447 RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan);
4448
4449 offset = PORT_DATA_OFFSET;
4450 for (i = 0; i < RTW89_PORT_NUM; i++, active++) {
4451 RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED_V2(cmd, active->connected, i, offset);
4452 RTW89_SET_FWCMD_CXROLE_ACT_PID_V2(cmd, active->pid, i, offset);
4453 RTW89_SET_FWCMD_CXROLE_ACT_PHY_V2(cmd, active->phy, i, offset);
4454 RTW89_SET_FWCMD_CXROLE_ACT_NOA_V2(cmd, active->noa, i, offset);
4455 RTW89_SET_FWCMD_CXROLE_ACT_BAND_V2(cmd, active->band, i, offset);
4456 RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS_V2(cmd, active->client_ps, i, offset);
4457 RTW89_SET_FWCMD_CXROLE_ACT_BW_V2(cmd, active->bw, i, offset);
4458 RTW89_SET_FWCMD_CXROLE_ACT_ROLE_V2(cmd, active->role, i, offset);
4459 RTW89_SET_FWCMD_CXROLE_ACT_CH_V2(cmd, active->ch, i, offset);
4460 RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR_V2(cmd, active->noa_duration, i, offset);
4461 }
4462
4463 offset = len - H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN;
4464 RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(cmd, role_info->mrole_type, offset);
4465 RTW89_SET_FWCMD_CXROLE_MROLE_NOA(cmd, role_info->mrole_noa_duration, offset);
4466 RTW89_SET_FWCMD_CXROLE_DBCC_EN(cmd, role_info->dbcc_en, offset);
4467 RTW89_SET_FWCMD_CXROLE_DBCC_CHG(cmd, role_info->dbcc_chg, offset);
4468 RTW89_SET_FWCMD_CXROLE_DBCC_2G_PHY(cmd, role_info->dbcc_2g_phy, offset);
4469 RTW89_SET_FWCMD_CXROLE_LINK_MODE_CHG(cmd, role_info->link_mode_chg, offset);
4470
4471 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4472 H2C_CAT_OUTSRC, BTFC_SET,
4473 SET_DRV_INFO, 0, 0,
4474 len);
4475
4476 ret = rtw89_h2c_tx(rtwdev, skb, false);
4477 if (ret) {
4478 rtw89_err(rtwdev, "failed to send h2c\n");
4479 goto fail;
4480 }
4481
4482 return 0;
4483 fail:
4484 dev_kfree_skb_any(skb);
4485
4486 return ret;
4487 }
4488
rtw89_fw_h2c_cxdrv_role_v7(struct rtw89_dev * rtwdev,u8 type)4489 int rtw89_fw_h2c_cxdrv_role_v7(struct rtw89_dev *rtwdev, u8 type)
4490 {
4491 struct rtw89_btc *btc = &rtwdev->btc;
4492 struct rtw89_btc_wl_role_info_v7 *role = &btc->cx.wl.role_info_v7;
4493 struct rtw89_h2c_cxrole_v7 *h2c;
4494 u32 len = sizeof(*h2c);
4495 struct sk_buff *skb;
4496 int ret;
4497
4498 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
4499 if (!skb) {
4500 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n");
4501 return -ENOMEM;
4502 }
4503 skb_put(skb, len);
4504 h2c = (struct rtw89_h2c_cxrole_v7 *)skb->data;
4505
4506 h2c->hdr.type = type;
4507 h2c->hdr.ver = btc->ver->fwlrole;
4508 h2c->hdr.len = len - H2C_LEN_CXDRVHDR_V7;
4509 memcpy(&h2c->_u8, role, sizeof(h2c->_u8));
4510 h2c->_u32.role_map = cpu_to_le32(role->role_map);
4511 h2c->_u32.mrole_type = cpu_to_le32(role->mrole_type);
4512 h2c->_u32.mrole_noa_duration = cpu_to_le32(role->mrole_noa_duration);
4513 h2c->_u32.dbcc_en = cpu_to_le32(role->dbcc_en);
4514 h2c->_u32.dbcc_chg = cpu_to_le32(role->dbcc_chg);
4515 h2c->_u32.dbcc_2g_phy = cpu_to_le32(role->dbcc_2g_phy);
4516
4517 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4518 H2C_CAT_OUTSRC, BTFC_SET,
4519 SET_DRV_INFO, 0, 0,
4520 len);
4521
4522 ret = rtw89_h2c_tx(rtwdev, skb, false);
4523 if (ret) {
4524 rtw89_err(rtwdev, "failed to send h2c\n");
4525 goto fail;
4526 }
4527
4528 return 0;
4529 fail:
4530 dev_kfree_skb_any(skb);
4531
4532 return ret;
4533 }
4534
rtw89_fw_h2c_cxdrv_role_v8(struct rtw89_dev * rtwdev,u8 type)4535 int rtw89_fw_h2c_cxdrv_role_v8(struct rtw89_dev *rtwdev, u8 type)
4536 {
4537 struct rtw89_btc *btc = &rtwdev->btc;
4538 struct rtw89_btc_wl_role_info_v8 *role = &btc->cx.wl.role_info_v8;
4539 struct rtw89_h2c_cxrole_v8 *h2c;
4540 u32 len = sizeof(*h2c);
4541 struct sk_buff *skb;
4542 int ret;
4543
4544 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
4545 if (!skb) {
4546 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n");
4547 return -ENOMEM;
4548 }
4549 skb_put(skb, len);
4550 h2c = (struct rtw89_h2c_cxrole_v8 *)skb->data;
4551
4552 h2c->hdr.type = type;
4553 h2c->hdr.ver = btc->ver->fwlrole;
4554 h2c->hdr.len = len - H2C_LEN_CXDRVHDR_V7;
4555 memcpy(&h2c->_u8, role, sizeof(h2c->_u8));
4556 h2c->_u32.role_map = cpu_to_le32(role->role_map);
4557 h2c->_u32.mrole_type = cpu_to_le32(role->mrole_type);
4558 h2c->_u32.mrole_noa_duration = cpu_to_le32(role->mrole_noa_duration);
4559
4560 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4561 H2C_CAT_OUTSRC, BTFC_SET,
4562 SET_DRV_INFO, 0, 0,
4563 len);
4564
4565 ret = rtw89_h2c_tx(rtwdev, skb, false);
4566 if (ret) {
4567 rtw89_err(rtwdev, "failed to send h2c\n");
4568 goto fail;
4569 }
4570
4571 return 0;
4572 fail:
4573 dev_kfree_skb_any(skb);
4574
4575 return ret;
4576 }
4577
4578 #define H2C_LEN_CXDRVINFO_CTRL (4 + H2C_LEN_CXDRVHDR)
rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev * rtwdev,u8 type)4579 int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev, u8 type)
4580 {
4581 struct rtw89_btc *btc = &rtwdev->btc;
4582 const struct rtw89_btc_ver *ver = btc->ver;
4583 struct rtw89_btc_ctrl *ctrl = &btc->ctrl.ctrl;
4584 struct sk_buff *skb;
4585 u8 *cmd;
4586 int ret;
4587
4588 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_CTRL);
4589 if (!skb) {
4590 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n");
4591 return -ENOMEM;
4592 }
4593 skb_put(skb, H2C_LEN_CXDRVINFO_CTRL);
4594 cmd = skb->data;
4595
4596 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, type);
4597 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_CTRL - H2C_LEN_CXDRVHDR);
4598
4599 RTW89_SET_FWCMD_CXCTRL_MANUAL(cmd, ctrl->manual);
4600 RTW89_SET_FWCMD_CXCTRL_IGNORE_BT(cmd, ctrl->igno_bt);
4601 RTW89_SET_FWCMD_CXCTRL_ALWAYS_FREERUN(cmd, ctrl->always_freerun);
4602 if (ver->fcxctrl == 0)
4603 RTW89_SET_FWCMD_CXCTRL_TRACE_STEP(cmd, ctrl->trace_step);
4604
4605 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4606 H2C_CAT_OUTSRC, BTFC_SET,
4607 SET_DRV_INFO, 0, 0,
4608 H2C_LEN_CXDRVINFO_CTRL);
4609
4610 ret = rtw89_h2c_tx(rtwdev, skb, false);
4611 if (ret) {
4612 rtw89_err(rtwdev, "failed to send h2c\n");
4613 goto fail;
4614 }
4615
4616 return 0;
4617 fail:
4618 dev_kfree_skb_any(skb);
4619
4620 return ret;
4621 }
4622
rtw89_fw_h2c_cxdrv_ctrl_v7(struct rtw89_dev * rtwdev,u8 type)4623 int rtw89_fw_h2c_cxdrv_ctrl_v7(struct rtw89_dev *rtwdev, u8 type)
4624 {
4625 struct rtw89_btc *btc = &rtwdev->btc;
4626 struct rtw89_btc_ctrl_v7 *ctrl = &btc->ctrl.ctrl_v7;
4627 struct rtw89_h2c_cxctrl_v7 *h2c;
4628 u32 len = sizeof(*h2c);
4629 struct sk_buff *skb;
4630 int ret;
4631
4632 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
4633 if (!skb) {
4634 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl_v7\n");
4635 return -ENOMEM;
4636 }
4637 skb_put(skb, len);
4638 h2c = (struct rtw89_h2c_cxctrl_v7 *)skb->data;
4639
4640 h2c->hdr.type = type;
4641 h2c->hdr.ver = btc->ver->fcxctrl;
4642 h2c->hdr.len = sizeof(*h2c) - H2C_LEN_CXDRVHDR_V7;
4643 h2c->ctrl = *ctrl;
4644
4645 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4646 H2C_CAT_OUTSRC, BTFC_SET,
4647 SET_DRV_INFO, 0, 0, len);
4648
4649 ret = rtw89_h2c_tx(rtwdev, skb, false);
4650 if (ret) {
4651 rtw89_err(rtwdev, "failed to send h2c\n");
4652 goto fail;
4653 }
4654
4655 return 0;
4656 fail:
4657 dev_kfree_skb_any(skb);
4658
4659 return ret;
4660 }
4661
4662 #define H2C_LEN_CXDRVINFO_TRX (28 + H2C_LEN_CXDRVHDR)
rtw89_fw_h2c_cxdrv_trx(struct rtw89_dev * rtwdev,u8 type)4663 int rtw89_fw_h2c_cxdrv_trx(struct rtw89_dev *rtwdev, u8 type)
4664 {
4665 struct rtw89_btc *btc = &rtwdev->btc;
4666 struct rtw89_btc_trx_info *trx = &btc->dm.trx_info;
4667 struct sk_buff *skb;
4668 u8 *cmd;
4669 int ret;
4670
4671 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_TRX);
4672 if (!skb) {
4673 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_trx\n");
4674 return -ENOMEM;
4675 }
4676 skb_put(skb, H2C_LEN_CXDRVINFO_TRX);
4677 cmd = skb->data;
4678
4679 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, type);
4680 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_TRX - H2C_LEN_CXDRVHDR);
4681
4682 RTW89_SET_FWCMD_CXTRX_TXLV(cmd, trx->tx_lvl);
4683 RTW89_SET_FWCMD_CXTRX_RXLV(cmd, trx->rx_lvl);
4684 RTW89_SET_FWCMD_CXTRX_WLRSSI(cmd, trx->wl_rssi);
4685 RTW89_SET_FWCMD_CXTRX_BTRSSI(cmd, trx->bt_rssi);
4686 RTW89_SET_FWCMD_CXTRX_TXPWR(cmd, trx->tx_power);
4687 RTW89_SET_FWCMD_CXTRX_RXGAIN(cmd, trx->rx_gain);
4688 RTW89_SET_FWCMD_CXTRX_BTTXPWR(cmd, trx->bt_tx_power);
4689 RTW89_SET_FWCMD_CXTRX_BTRXGAIN(cmd, trx->bt_rx_gain);
4690 RTW89_SET_FWCMD_CXTRX_CN(cmd, trx->cn);
4691 RTW89_SET_FWCMD_CXTRX_NHM(cmd, trx->nhm);
4692 RTW89_SET_FWCMD_CXTRX_BTPROFILE(cmd, trx->bt_profile);
4693 RTW89_SET_FWCMD_CXTRX_RSVD2(cmd, trx->rsvd2);
4694 RTW89_SET_FWCMD_CXTRX_TXRATE(cmd, trx->tx_rate);
4695 RTW89_SET_FWCMD_CXTRX_RXRATE(cmd, trx->rx_rate);
4696 RTW89_SET_FWCMD_CXTRX_TXTP(cmd, trx->tx_tp);
4697 RTW89_SET_FWCMD_CXTRX_RXTP(cmd, trx->rx_tp);
4698 RTW89_SET_FWCMD_CXTRX_RXERRRA(cmd, trx->rx_err_ratio);
4699
4700 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4701 H2C_CAT_OUTSRC, BTFC_SET,
4702 SET_DRV_INFO, 0, 0,
4703 H2C_LEN_CXDRVINFO_TRX);
4704
4705 ret = rtw89_h2c_tx(rtwdev, skb, false);
4706 if (ret) {
4707 rtw89_err(rtwdev, "failed to send h2c\n");
4708 goto fail;
4709 }
4710
4711 return 0;
4712 fail:
4713 dev_kfree_skb_any(skb);
4714
4715 return ret;
4716 }
4717
4718 #define H2C_LEN_CXDRVINFO_RFK (4 + H2C_LEN_CXDRVHDR)
rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev * rtwdev,u8 type)4719 int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev, u8 type)
4720 {
4721 struct rtw89_btc *btc = &rtwdev->btc;
4722 struct rtw89_btc_wl_info *wl = &btc->cx.wl;
4723 struct rtw89_btc_wl_rfk_info *rfk_info = &wl->rfk_info;
4724 struct sk_buff *skb;
4725 u8 *cmd;
4726 int ret;
4727
4728 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_RFK);
4729 if (!skb) {
4730 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n");
4731 return -ENOMEM;
4732 }
4733 skb_put(skb, H2C_LEN_CXDRVINFO_RFK);
4734 cmd = skb->data;
4735
4736 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, type);
4737 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_RFK - H2C_LEN_CXDRVHDR);
4738
4739 RTW89_SET_FWCMD_CXRFK_STATE(cmd, rfk_info->state);
4740 RTW89_SET_FWCMD_CXRFK_PATH_MAP(cmd, rfk_info->path_map);
4741 RTW89_SET_FWCMD_CXRFK_PHY_MAP(cmd, rfk_info->phy_map);
4742 RTW89_SET_FWCMD_CXRFK_BAND(cmd, rfk_info->band);
4743 RTW89_SET_FWCMD_CXRFK_TYPE(cmd, rfk_info->type);
4744
4745 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4746 H2C_CAT_OUTSRC, BTFC_SET,
4747 SET_DRV_INFO, 0, 0,
4748 H2C_LEN_CXDRVINFO_RFK);
4749
4750 ret = rtw89_h2c_tx(rtwdev, skb, false);
4751 if (ret) {
4752 rtw89_err(rtwdev, "failed to send h2c\n");
4753 goto fail;
4754 }
4755
4756 return 0;
4757 fail:
4758 dev_kfree_skb_any(skb);
4759
4760 return ret;
4761 }
4762
4763 #define H2C_LEN_PKT_OFLD 4
rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev * rtwdev,u8 id)4764 int rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev *rtwdev, u8 id)
4765 {
4766 struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait;
4767 struct sk_buff *skb;
4768 unsigned int cond;
4769 u8 *cmd;
4770 int ret;
4771
4772 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_PKT_OFLD);
4773 if (!skb) {
4774 rtw89_err(rtwdev, "failed to alloc skb for h2c pkt offload\n");
4775 return -ENOMEM;
4776 }
4777 skb_put(skb, H2C_LEN_PKT_OFLD);
4778 cmd = skb->data;
4779
4780 RTW89_SET_FWCMD_PACKET_OFLD_PKT_IDX(cmd, id);
4781 RTW89_SET_FWCMD_PACKET_OFLD_PKT_OP(cmd, RTW89_PKT_OFLD_OP_DEL);
4782
4783 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4784 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
4785 H2C_FUNC_PACKET_OFLD, 1, 1,
4786 H2C_LEN_PKT_OFLD);
4787
4788 cond = RTW89_FW_OFLD_WAIT_COND_PKT_OFLD(id, RTW89_PKT_OFLD_OP_DEL);
4789
4790 ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
4791 if (ret < 0) {
4792 rtw89_debug(rtwdev, RTW89_DBG_FW,
4793 "failed to del pkt ofld: id %d, ret %d\n",
4794 id, ret);
4795 return ret;
4796 }
4797
4798 rtw89_core_release_bit_map(rtwdev->pkt_offload, id);
4799 return 0;
4800 }
4801
rtw89_fw_h2c_add_pkt_offload(struct rtw89_dev * rtwdev,u8 * id,struct sk_buff * skb_ofld)4802 int rtw89_fw_h2c_add_pkt_offload(struct rtw89_dev *rtwdev, u8 *id,
4803 struct sk_buff *skb_ofld)
4804 {
4805 struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait;
4806 struct sk_buff *skb;
4807 unsigned int cond;
4808 u8 *cmd;
4809 u8 alloc_id;
4810 int ret;
4811
4812 alloc_id = rtw89_core_acquire_bit_map(rtwdev->pkt_offload,
4813 RTW89_MAX_PKT_OFLD_NUM);
4814 if (alloc_id == RTW89_MAX_PKT_OFLD_NUM)
4815 return -ENOSPC;
4816
4817 *id = alloc_id;
4818
4819 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_PKT_OFLD + skb_ofld->len);
4820 if (!skb) {
4821 rtw89_err(rtwdev, "failed to alloc skb for h2c pkt offload\n");
4822 rtw89_core_release_bit_map(rtwdev->pkt_offload, alloc_id);
4823 return -ENOMEM;
4824 }
4825 skb_put(skb, H2C_LEN_PKT_OFLD);
4826 cmd = skb->data;
4827
4828 RTW89_SET_FWCMD_PACKET_OFLD_PKT_IDX(cmd, alloc_id);
4829 RTW89_SET_FWCMD_PACKET_OFLD_PKT_OP(cmd, RTW89_PKT_OFLD_OP_ADD);
4830 RTW89_SET_FWCMD_PACKET_OFLD_PKT_LENGTH(cmd, skb_ofld->len);
4831 skb_put_data(skb, skb_ofld->data, skb_ofld->len);
4832
4833 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4834 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
4835 H2C_FUNC_PACKET_OFLD, 1, 1,
4836 H2C_LEN_PKT_OFLD + skb_ofld->len);
4837
4838 cond = RTW89_FW_OFLD_WAIT_COND_PKT_OFLD(alloc_id, RTW89_PKT_OFLD_OP_ADD);
4839
4840 ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
4841 if (ret < 0) {
4842 rtw89_debug(rtwdev, RTW89_DBG_FW,
4843 "failed to add pkt ofld: id %d, ret %d\n",
4844 alloc_id, ret);
4845 rtw89_core_release_bit_map(rtwdev->pkt_offload, alloc_id);
4846 return ret;
4847 }
4848
4849 return 0;
4850 }
4851
rtw89_fw_h2c_scan_list_offload(struct rtw89_dev * rtwdev,int ch_num,struct list_head * chan_list)4852 int rtw89_fw_h2c_scan_list_offload(struct rtw89_dev *rtwdev, int ch_num,
4853 struct list_head *chan_list)
4854 {
4855 struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait;
4856 struct rtw89_h2c_chinfo_elem *elem;
4857 struct rtw89_mac_chinfo *ch_info;
4858 struct rtw89_h2c_chinfo *h2c;
4859 struct sk_buff *skb;
4860 unsigned int cond;
4861 int skb_len;
4862 int ret;
4863
4864 static_assert(sizeof(*elem) == RTW89_MAC_CHINFO_SIZE);
4865
4866 skb_len = struct_size(h2c, elem, ch_num);
4867 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, skb_len);
4868 if (!skb) {
4869 rtw89_err(rtwdev, "failed to alloc skb for h2c scan list\n");
4870 return -ENOMEM;
4871 }
4872 skb_put(skb, sizeof(*h2c));
4873 h2c = (struct rtw89_h2c_chinfo *)skb->data;
4874
4875 h2c->ch_num = ch_num;
4876 h2c->elem_size = sizeof(*elem) / 4; /* in unit of 4 bytes */
4877
4878 list_for_each_entry(ch_info, chan_list, list) {
4879 elem = (struct rtw89_h2c_chinfo_elem *)skb_put(skb, sizeof(*elem));
4880
4881 elem->w0 = le32_encode_bits(ch_info->period, RTW89_H2C_CHINFO_W0_PERIOD) |
4882 le32_encode_bits(ch_info->dwell_time, RTW89_H2C_CHINFO_W0_DWELL) |
4883 le32_encode_bits(ch_info->central_ch, RTW89_H2C_CHINFO_W0_CENTER_CH) |
4884 le32_encode_bits(ch_info->pri_ch, RTW89_H2C_CHINFO_W0_PRI_CH);
4885
4886 elem->w1 = le32_encode_bits(ch_info->bw, RTW89_H2C_CHINFO_W1_BW) |
4887 le32_encode_bits(ch_info->notify_action, RTW89_H2C_CHINFO_W1_ACTION) |
4888 le32_encode_bits(ch_info->num_pkt, RTW89_H2C_CHINFO_W1_NUM_PKT) |
4889 le32_encode_bits(ch_info->tx_pkt, RTW89_H2C_CHINFO_W1_TX) |
4890 le32_encode_bits(ch_info->pause_data, RTW89_H2C_CHINFO_W1_PAUSE_DATA) |
4891 le32_encode_bits(ch_info->ch_band, RTW89_H2C_CHINFO_W1_BAND) |
4892 le32_encode_bits(ch_info->probe_id, RTW89_H2C_CHINFO_W1_PKT_ID) |
4893 le32_encode_bits(ch_info->dfs_ch, RTW89_H2C_CHINFO_W1_DFS) |
4894 le32_encode_bits(ch_info->tx_null, RTW89_H2C_CHINFO_W1_TX_NULL) |
4895 le32_encode_bits(ch_info->rand_seq_num, RTW89_H2C_CHINFO_W1_RANDOM);
4896
4897 elem->w2 = le32_encode_bits(ch_info->pkt_id[0], RTW89_H2C_CHINFO_W2_PKT0) |
4898 le32_encode_bits(ch_info->pkt_id[1], RTW89_H2C_CHINFO_W2_PKT1) |
4899 le32_encode_bits(ch_info->pkt_id[2], RTW89_H2C_CHINFO_W2_PKT2) |
4900 le32_encode_bits(ch_info->pkt_id[3], RTW89_H2C_CHINFO_W2_PKT3);
4901
4902 elem->w3 = le32_encode_bits(ch_info->pkt_id[4], RTW89_H2C_CHINFO_W3_PKT4) |
4903 le32_encode_bits(ch_info->pkt_id[5], RTW89_H2C_CHINFO_W3_PKT5) |
4904 le32_encode_bits(ch_info->pkt_id[6], RTW89_H2C_CHINFO_W3_PKT6) |
4905 le32_encode_bits(ch_info->pkt_id[7], RTW89_H2C_CHINFO_W3_PKT7);
4906 }
4907
4908 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
4909 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
4910 H2C_FUNC_ADD_SCANOFLD_CH, 1, 1, skb_len);
4911
4912 cond = RTW89_SCANOFLD_WAIT_COND_ADD_CH;
4913
4914 ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
4915 if (ret) {
4916 rtw89_debug(rtwdev, RTW89_DBG_FW, "failed to add scan ofld ch\n");
4917 return ret;
4918 }
4919
4920 return 0;
4921 }
4922
rtw89_fw_h2c_scan_list_offload_be(struct rtw89_dev * rtwdev,int ch_num,struct list_head * chan_list)4923 int rtw89_fw_h2c_scan_list_offload_be(struct rtw89_dev *rtwdev, int ch_num,
4924 struct list_head *chan_list)
4925 {
4926 struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait;
4927 struct rtw89_h2c_chinfo_elem_be *elem;
4928 struct rtw89_mac_chinfo_be *ch_info;
4929 struct rtw89_h2c_chinfo *h2c;
4930 struct sk_buff *skb;
4931 unsigned int cond;
4932 int skb_len;
4933 int ret;
4934
4935 static_assert(sizeof(*elem) == RTW89_MAC_CHINFO_SIZE);
4936
4937 skb_len = struct_size(h2c, elem, ch_num);
4938 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, skb_len);
4939 if (!skb) {
4940 rtw89_err(rtwdev, "failed to alloc skb for h2c scan list\n");
4941 return -ENOMEM;
4942 }
4943
4944 skb_put(skb, sizeof(*h2c));
4945 h2c = (struct rtw89_h2c_chinfo *)skb->data;
4946
4947 h2c->ch_num = ch_num;
4948 h2c->elem_size = sizeof(*elem) / 4; /* in unit of 4 bytes */
4949 h2c->arg = u8_encode_bits(RTW89_PHY_0, RTW89_H2C_CHINFO_ARG_MAC_IDX_MASK);
4950
4951 list_for_each_entry(ch_info, chan_list, list) {
4952 elem = (struct rtw89_h2c_chinfo_elem_be *)skb_put(skb, sizeof(*elem));
4953
4954 elem->w0 = le32_encode_bits(ch_info->period, RTW89_H2C_CHINFO_BE_W0_PERIOD) |
4955 le32_encode_bits(ch_info->dwell_time, RTW89_H2C_CHINFO_BE_W0_DWELL) |
4956 le32_encode_bits(ch_info->central_ch,
4957 RTW89_H2C_CHINFO_BE_W0_CENTER_CH) |
4958 le32_encode_bits(ch_info->pri_ch, RTW89_H2C_CHINFO_BE_W0_PRI_CH);
4959
4960 elem->w1 = le32_encode_bits(ch_info->bw, RTW89_H2C_CHINFO_BE_W1_BW) |
4961 le32_encode_bits(ch_info->ch_band, RTW89_H2C_CHINFO_BE_W1_CH_BAND) |
4962 le32_encode_bits(ch_info->dfs_ch, RTW89_H2C_CHINFO_BE_W1_DFS) |
4963 le32_encode_bits(ch_info->pause_data,
4964 RTW89_H2C_CHINFO_BE_W1_PAUSE_DATA) |
4965 le32_encode_bits(ch_info->tx_null, RTW89_H2C_CHINFO_BE_W1_TX_NULL) |
4966 le32_encode_bits(ch_info->rand_seq_num,
4967 RTW89_H2C_CHINFO_BE_W1_RANDOM) |
4968 le32_encode_bits(ch_info->notify_action,
4969 RTW89_H2C_CHINFO_BE_W1_NOTIFY) |
4970 le32_encode_bits(ch_info->probe_id != 0xff ? 1 : 0,
4971 RTW89_H2C_CHINFO_BE_W1_PROBE) |
4972 le32_encode_bits(ch_info->leave_crit,
4973 RTW89_H2C_CHINFO_BE_W1_EARLY_LEAVE_CRIT) |
4974 le32_encode_bits(ch_info->chkpt_timer,
4975 RTW89_H2C_CHINFO_BE_W1_CHKPT_TIMER);
4976
4977 elem->w2 = le32_encode_bits(ch_info->leave_time,
4978 RTW89_H2C_CHINFO_BE_W2_EARLY_LEAVE_TIME) |
4979 le32_encode_bits(ch_info->leave_th,
4980 RTW89_H2C_CHINFO_BE_W2_EARLY_LEAVE_TH) |
4981 le32_encode_bits(ch_info->tx_pkt_ctrl,
4982 RTW89_H2C_CHINFO_BE_W2_TX_PKT_CTRL);
4983
4984 elem->w3 = le32_encode_bits(ch_info->pkt_id[0], RTW89_H2C_CHINFO_BE_W3_PKT0) |
4985 le32_encode_bits(ch_info->pkt_id[1], RTW89_H2C_CHINFO_BE_W3_PKT1) |
4986 le32_encode_bits(ch_info->pkt_id[2], RTW89_H2C_CHINFO_BE_W3_PKT2) |
4987 le32_encode_bits(ch_info->pkt_id[3], RTW89_H2C_CHINFO_BE_W3_PKT3);
4988
4989 elem->w4 = le32_encode_bits(ch_info->pkt_id[4], RTW89_H2C_CHINFO_BE_W4_PKT4) |
4990 le32_encode_bits(ch_info->pkt_id[5], RTW89_H2C_CHINFO_BE_W4_PKT5) |
4991 le32_encode_bits(ch_info->pkt_id[6], RTW89_H2C_CHINFO_BE_W4_PKT6) |
4992 le32_encode_bits(ch_info->pkt_id[7], RTW89_H2C_CHINFO_BE_W4_PKT7);
4993
4994 elem->w5 = le32_encode_bits(ch_info->sw_def, RTW89_H2C_CHINFO_BE_W5_SW_DEF) |
4995 le32_encode_bits(ch_info->fw_probe0_ssids,
4996 RTW89_H2C_CHINFO_BE_W5_FW_PROBE0_SSIDS);
4997
4998 elem->w6 = le32_encode_bits(ch_info->fw_probe0_shortssids,
4999 RTW89_H2C_CHINFO_BE_W6_FW_PROBE0_SHORTSSIDS) |
5000 le32_encode_bits(ch_info->fw_probe0_bssids,
5001 RTW89_H2C_CHINFO_BE_W6_FW_PROBE0_BSSIDS);
5002 }
5003
5004 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5005 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
5006 H2C_FUNC_ADD_SCANOFLD_CH, 1, 1, skb_len);
5007
5008 cond = RTW89_SCANOFLD_WAIT_COND_ADD_CH;
5009
5010 ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
5011 if (ret) {
5012 rtw89_debug(rtwdev, RTW89_DBG_FW, "failed to add scan ofld ch\n");
5013 return ret;
5014 }
5015
5016 return 0;
5017 }
5018
5019 #define RTW89_SCAN_DELAY_TSF_UNIT 1000000
rtw89_fw_h2c_scan_offload_ax(struct rtw89_dev * rtwdev,struct rtw89_scan_option * option,struct rtw89_vif_link * rtwvif_link,bool wowlan)5020 int rtw89_fw_h2c_scan_offload_ax(struct rtw89_dev *rtwdev,
5021 struct rtw89_scan_option *option,
5022 struct rtw89_vif_link *rtwvif_link,
5023 bool wowlan)
5024 {
5025 struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait;
5026 struct rtw89_chan *op = &rtwdev->scan_info.op_chan;
5027 enum rtw89_scan_mode scan_mode = RTW89_SCAN_IMMEDIATE;
5028 struct rtw89_h2c_scanofld *h2c;
5029 u32 len = sizeof(*h2c);
5030 struct sk_buff *skb;
5031 unsigned int cond;
5032 u64 tsf = 0;
5033 int ret;
5034
5035 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5036 if (!skb) {
5037 rtw89_err(rtwdev, "failed to alloc skb for h2c scan offload\n");
5038 return -ENOMEM;
5039 }
5040 skb_put(skb, len);
5041 h2c = (struct rtw89_h2c_scanofld *)skb->data;
5042
5043 if (option->delay) {
5044 ret = rtw89_mac_port_get_tsf(rtwdev, rtwvif_link, &tsf);
5045 if (ret) {
5046 rtw89_warn(rtwdev, "NLO failed to get port tsf: %d\n", ret);
5047 scan_mode = RTW89_SCAN_IMMEDIATE;
5048 } else {
5049 scan_mode = RTW89_SCAN_DELAY;
5050 tsf += option->delay * RTW89_SCAN_DELAY_TSF_UNIT;
5051 }
5052 }
5053
5054 h2c->w0 = le32_encode_bits(rtwvif_link->mac_id, RTW89_H2C_SCANOFLD_W0_MACID) |
5055 le32_encode_bits(rtwvif_link->port, RTW89_H2C_SCANOFLD_W0_PORT_ID) |
5056 le32_encode_bits(RTW89_PHY_0, RTW89_H2C_SCANOFLD_W0_BAND) |
5057 le32_encode_bits(option->enable, RTW89_H2C_SCANOFLD_W0_OPERATION);
5058
5059 h2c->w1 = le32_encode_bits(true, RTW89_H2C_SCANOFLD_W1_NOTIFY_END) |
5060 le32_encode_bits(option->target_ch_mode,
5061 RTW89_H2C_SCANOFLD_W1_TARGET_CH_MODE) |
5062 le32_encode_bits(scan_mode, RTW89_H2C_SCANOFLD_W1_START_MODE) |
5063 le32_encode_bits(option->repeat, RTW89_H2C_SCANOFLD_W1_SCAN_TYPE);
5064
5065 h2c->w2 = le32_encode_bits(option->norm_pd, RTW89_H2C_SCANOFLD_W2_NORM_PD) |
5066 le32_encode_bits(option->slow_pd, RTW89_H2C_SCANOFLD_W2_SLOW_PD);
5067
5068 if (option->target_ch_mode) {
5069 h2c->w1 |= le32_encode_bits(op->band_width,
5070 RTW89_H2C_SCANOFLD_W1_TARGET_CH_BW) |
5071 le32_encode_bits(op->primary_channel,
5072 RTW89_H2C_SCANOFLD_W1_TARGET_PRI_CH) |
5073 le32_encode_bits(op->channel,
5074 RTW89_H2C_SCANOFLD_W1_TARGET_CENTRAL_CH);
5075 h2c->w0 |= le32_encode_bits(op->band_type,
5076 RTW89_H2C_SCANOFLD_W0_TARGET_CH_BAND);
5077 }
5078
5079 h2c->tsf_high = le32_encode_bits(upper_32_bits(tsf),
5080 RTW89_H2C_SCANOFLD_W3_TSF_HIGH);
5081 h2c->tsf_low = le32_encode_bits(lower_32_bits(tsf),
5082 RTW89_H2C_SCANOFLD_W4_TSF_LOW);
5083
5084 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5085 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
5086 H2C_FUNC_SCANOFLD, 1, 1,
5087 len);
5088
5089 if (option->enable)
5090 cond = RTW89_SCANOFLD_WAIT_COND_START;
5091 else
5092 cond = RTW89_SCANOFLD_WAIT_COND_STOP;
5093
5094 ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
5095 if (ret) {
5096 rtw89_debug(rtwdev, RTW89_DBG_FW, "failed to scan ofld\n");
5097 return ret;
5098 }
5099
5100 return 0;
5101 }
5102
rtw89_scan_get_6g_disabled_chan(struct rtw89_dev * rtwdev,struct rtw89_scan_option * option)5103 static void rtw89_scan_get_6g_disabled_chan(struct rtw89_dev *rtwdev,
5104 struct rtw89_scan_option *option)
5105 {
5106 struct ieee80211_supported_band *sband;
5107 struct ieee80211_channel *chan;
5108 u8 i, idx;
5109
5110 sband = rtwdev->hw->wiphy->bands[NL80211_BAND_6GHZ];
5111 if (!sband) {
5112 option->prohib_chan = U64_MAX;
5113 return;
5114 }
5115
5116 for (i = 0; i < sband->n_channels; i++) {
5117 chan = &sband->channels[i];
5118 if (chan->flags & IEEE80211_CHAN_DISABLED) {
5119 idx = (chan->hw_value - 1) / 4;
5120 option->prohib_chan |= BIT(idx);
5121 }
5122 }
5123 }
5124
rtw89_fw_h2c_scan_offload_be(struct rtw89_dev * rtwdev,struct rtw89_scan_option * option,struct rtw89_vif_link * rtwvif_link,bool wowlan)5125 int rtw89_fw_h2c_scan_offload_be(struct rtw89_dev *rtwdev,
5126 struct rtw89_scan_option *option,
5127 struct rtw89_vif_link *rtwvif_link,
5128 bool wowlan)
5129 {
5130 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
5131 struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info;
5132 struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait;
5133 struct cfg80211_scan_request *req = rtwvif->scan_req;
5134 struct rtw89_h2c_scanofld_be_macc_role *macc_role;
5135 struct rtw89_chan *op = &scan_info->op_chan;
5136 struct rtw89_h2c_scanofld_be_opch *opch;
5137 struct rtw89_pktofld_info *pkt_info;
5138 struct rtw89_h2c_scanofld_be *h2c;
5139 struct sk_buff *skb;
5140 u8 macc_role_size = sizeof(*macc_role) * option->num_macc_role;
5141 u8 opch_size = sizeof(*opch) * option->num_opch;
5142 u8 probe_id[NUM_NL80211_BANDS];
5143 u8 cfg_len = sizeof(*h2c);
5144 unsigned int cond;
5145 void *ptr;
5146 int ret;
5147 u32 len;
5148 u8 i;
5149
5150 rtw89_scan_get_6g_disabled_chan(rtwdev, option);
5151
5152 len = cfg_len + macc_role_size + opch_size;
5153 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5154 if (!skb) {
5155 rtw89_err(rtwdev, "failed to alloc skb for h2c scan offload\n");
5156 return -ENOMEM;
5157 }
5158
5159 skb_put(skb, len);
5160 h2c = (struct rtw89_h2c_scanofld_be *)skb->data;
5161 ptr = skb->data;
5162
5163 memset(probe_id, RTW89_SCANOFLD_PKT_NONE, sizeof(probe_id));
5164
5165 if (!wowlan) {
5166 list_for_each_entry(pkt_info, &scan_info->pkt_list[NL80211_BAND_6GHZ], list) {
5167 if (pkt_info->wildcard_6ghz) {
5168 /* Provide wildcard as template */
5169 probe_id[NL80211_BAND_6GHZ] = pkt_info->id;
5170 break;
5171 }
5172 }
5173 }
5174
5175 h2c->w0 = le32_encode_bits(option->operation, RTW89_H2C_SCANOFLD_BE_W0_OP) |
5176 le32_encode_bits(option->scan_mode,
5177 RTW89_H2C_SCANOFLD_BE_W0_SCAN_MODE) |
5178 le32_encode_bits(option->repeat, RTW89_H2C_SCANOFLD_BE_W0_REPEAT) |
5179 le32_encode_bits(true, RTW89_H2C_SCANOFLD_BE_W0_NOTIFY_END) |
5180 le32_encode_bits(true, RTW89_H2C_SCANOFLD_BE_W0_LEARN_CH) |
5181 le32_encode_bits(rtwvif_link->mac_id, RTW89_H2C_SCANOFLD_BE_W0_MACID) |
5182 le32_encode_bits(rtwvif_link->port, RTW89_H2C_SCANOFLD_BE_W0_PORT) |
5183 le32_encode_bits(option->band, RTW89_H2C_SCANOFLD_BE_W0_BAND);
5184
5185 h2c->w1 = le32_encode_bits(option->num_macc_role, RTW89_H2C_SCANOFLD_BE_W1_NUM_MACC_ROLE) |
5186 le32_encode_bits(option->num_opch, RTW89_H2C_SCANOFLD_BE_W1_NUM_OP) |
5187 le32_encode_bits(option->norm_pd, RTW89_H2C_SCANOFLD_BE_W1_NORM_PD);
5188
5189 h2c->w2 = le32_encode_bits(option->slow_pd, RTW89_H2C_SCANOFLD_BE_W2_SLOW_PD) |
5190 le32_encode_bits(option->norm_cy, RTW89_H2C_SCANOFLD_BE_W2_NORM_CY) |
5191 le32_encode_bits(option->opch_end, RTW89_H2C_SCANOFLD_BE_W2_OPCH_END);
5192
5193 h2c->w3 = le32_encode_bits(0, RTW89_H2C_SCANOFLD_BE_W3_NUM_SSID) |
5194 le32_encode_bits(0, RTW89_H2C_SCANOFLD_BE_W3_NUM_SHORT_SSID) |
5195 le32_encode_bits(0, RTW89_H2C_SCANOFLD_BE_W3_NUM_BSSID) |
5196 le32_encode_bits(probe_id[NL80211_BAND_2GHZ], RTW89_H2C_SCANOFLD_BE_W3_PROBEID);
5197
5198 h2c->w4 = le32_encode_bits(probe_id[NL80211_BAND_5GHZ],
5199 RTW89_H2C_SCANOFLD_BE_W4_PROBE_5G) |
5200 le32_encode_bits(probe_id[NL80211_BAND_6GHZ],
5201 RTW89_H2C_SCANOFLD_BE_W4_PROBE_6G) |
5202 le32_encode_bits(option->delay, RTW89_H2C_SCANOFLD_BE_W4_DELAY_START);
5203
5204 h2c->w5 = le32_encode_bits(option->mlo_mode, RTW89_H2C_SCANOFLD_BE_W5_MLO_MODE);
5205
5206 h2c->w6 = le32_encode_bits(option->prohib_chan,
5207 RTW89_H2C_SCANOFLD_BE_W6_CHAN_PROHIB_LOW);
5208 h2c->w7 = le32_encode_bits(option->prohib_chan >> 32,
5209 RTW89_H2C_SCANOFLD_BE_W7_CHAN_PROHIB_HIGH);
5210 if (!wowlan && req->no_cck) {
5211 h2c->w0 |= le32_encode_bits(true, RTW89_H2C_SCANOFLD_BE_W0_PROBE_WITH_RATE);
5212 h2c->w8 = le32_encode_bits(RTW89_HW_RATE_OFDM6,
5213 RTW89_H2C_SCANOFLD_BE_W8_PROBE_RATE_2GHZ) |
5214 le32_encode_bits(RTW89_HW_RATE_OFDM6,
5215 RTW89_H2C_SCANOFLD_BE_W8_PROBE_RATE_5GHZ) |
5216 le32_encode_bits(RTW89_HW_RATE_OFDM6,
5217 RTW89_H2C_SCANOFLD_BE_W8_PROBE_RATE_6GHZ);
5218 }
5219
5220 if (RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD_BE_V0, &rtwdev->fw)) {
5221 cfg_len = offsetofend(typeof(*h2c), w8);
5222 goto flex_member;
5223 }
5224
5225 h2c->w9 = le32_encode_bits(sizeof(*h2c) / sizeof(h2c->w0),
5226 RTW89_H2C_SCANOFLD_BE_W9_SIZE_CFG) |
5227 le32_encode_bits(sizeof(*macc_role) / sizeof(macc_role->w0),
5228 RTW89_H2C_SCANOFLD_BE_W9_SIZE_MACC) |
5229 le32_encode_bits(sizeof(*opch) / sizeof(opch->w0),
5230 RTW89_H2C_SCANOFLD_BE_W9_SIZE_OP);
5231
5232 flex_member:
5233 ptr += cfg_len;
5234
5235 for (i = 0; i < option->num_macc_role; i++) {
5236 macc_role = ptr;
5237 macc_role->w0 =
5238 le32_encode_bits(0, RTW89_H2C_SCANOFLD_BE_MACC_ROLE_W0_BAND) |
5239 le32_encode_bits(0, RTW89_H2C_SCANOFLD_BE_MACC_ROLE_W0_PORT) |
5240 le32_encode_bits(0, RTW89_H2C_SCANOFLD_BE_MACC_ROLE_W0_MACID) |
5241 le32_encode_bits(0, RTW89_H2C_SCANOFLD_BE_MACC_ROLE_W0_OPCH_END);
5242 ptr += sizeof(*macc_role);
5243 }
5244
5245 for (i = 0; i < option->num_opch; i++) {
5246 opch = ptr;
5247 opch->w0 = le32_encode_bits(rtwvif_link->mac_id,
5248 RTW89_H2C_SCANOFLD_BE_OPCH_W0_MACID) |
5249 le32_encode_bits(option->band,
5250 RTW89_H2C_SCANOFLD_BE_OPCH_W0_BAND) |
5251 le32_encode_bits(rtwvif_link->port,
5252 RTW89_H2C_SCANOFLD_BE_OPCH_W0_PORT) |
5253 le32_encode_bits(RTW89_SCAN_OPMODE_INTV,
5254 RTW89_H2C_SCANOFLD_BE_OPCH_W0_POLICY) |
5255 le32_encode_bits(true,
5256 RTW89_H2C_SCANOFLD_BE_OPCH_W0_TXNULL) |
5257 le32_encode_bits(RTW89_OFF_CHAN_TIME / 10,
5258 RTW89_H2C_SCANOFLD_BE_OPCH_W0_POLICY_VAL);
5259
5260 opch->w1 = le32_encode_bits(RTW89_CHANNEL_TIME,
5261 RTW89_H2C_SCANOFLD_BE_OPCH_W1_DURATION) |
5262 le32_encode_bits(op->band_type,
5263 RTW89_H2C_SCANOFLD_BE_OPCH_W1_CH_BAND) |
5264 le32_encode_bits(op->band_width,
5265 RTW89_H2C_SCANOFLD_BE_OPCH_W1_BW) |
5266 le32_encode_bits(0x3,
5267 RTW89_H2C_SCANOFLD_BE_OPCH_W1_NOTIFY) |
5268 le32_encode_bits(op->primary_channel,
5269 RTW89_H2C_SCANOFLD_BE_OPCH_W1_PRI_CH) |
5270 le32_encode_bits(op->channel,
5271 RTW89_H2C_SCANOFLD_BE_OPCH_W1_CENTRAL_CH);
5272
5273 opch->w2 = le32_encode_bits(0,
5274 RTW89_H2C_SCANOFLD_BE_OPCH_W2_PKTS_CTRL) |
5275 le32_encode_bits(0,
5276 RTW89_H2C_SCANOFLD_BE_OPCH_W2_SW_DEF) |
5277 le32_encode_bits(2,
5278 RTW89_H2C_SCANOFLD_BE_OPCH_W2_SS);
5279
5280 opch->w3 = le32_encode_bits(RTW89_SCANOFLD_PKT_NONE,
5281 RTW89_H2C_SCANOFLD_BE_OPCH_W3_PKT0) |
5282 le32_encode_bits(RTW89_SCANOFLD_PKT_NONE,
5283 RTW89_H2C_SCANOFLD_BE_OPCH_W3_PKT1) |
5284 le32_encode_bits(RTW89_SCANOFLD_PKT_NONE,
5285 RTW89_H2C_SCANOFLD_BE_OPCH_W3_PKT2) |
5286 le32_encode_bits(RTW89_SCANOFLD_PKT_NONE,
5287 RTW89_H2C_SCANOFLD_BE_OPCH_W3_PKT3);
5288 ptr += sizeof(*opch);
5289 }
5290
5291 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5292 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD,
5293 H2C_FUNC_SCANOFLD_BE, 1, 1,
5294 len);
5295
5296 if (option->enable)
5297 cond = RTW89_SCANOFLD_BE_WAIT_COND_START;
5298 else
5299 cond = RTW89_SCANOFLD_BE_WAIT_COND_STOP;
5300
5301 ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
5302 if (ret) {
5303 rtw89_debug(rtwdev, RTW89_DBG_FW, "failed to scan be ofld\n");
5304 return ret;
5305 }
5306
5307 return 0;
5308 }
5309
rtw89_fw_h2c_rf_reg(struct rtw89_dev * rtwdev,struct rtw89_fw_h2c_rf_reg_info * info,u16 len,u8 page)5310 int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev,
5311 struct rtw89_fw_h2c_rf_reg_info *info,
5312 u16 len, u8 page)
5313 {
5314 struct sk_buff *skb;
5315 u8 class = info->rf_path == RF_PATH_A ?
5316 H2C_CL_OUTSRC_RF_REG_A : H2C_CL_OUTSRC_RF_REG_B;
5317 int ret;
5318
5319 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5320 if (!skb) {
5321 rtw89_err(rtwdev, "failed to alloc skb for h2c rf reg\n");
5322 return -ENOMEM;
5323 }
5324 skb_put_data(skb, info->rtw89_phy_config_rf_h2c[page], len);
5325
5326 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5327 H2C_CAT_OUTSRC, class, page, 0, 0,
5328 len);
5329
5330 ret = rtw89_h2c_tx(rtwdev, skb, false);
5331 if (ret) {
5332 rtw89_err(rtwdev, "failed to send h2c\n");
5333 goto fail;
5334 }
5335
5336 return 0;
5337 fail:
5338 dev_kfree_skb_any(skb);
5339
5340 return ret;
5341 }
5342
rtw89_fw_h2c_rf_ntfy_mcc(struct rtw89_dev * rtwdev)5343 int rtw89_fw_h2c_rf_ntfy_mcc(struct rtw89_dev *rtwdev)
5344 {
5345 struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc;
5346 struct rtw89_fw_h2c_rf_get_mccch *mccch;
5347 struct sk_buff *skb;
5348 int ret;
5349 u8 idx;
5350
5351 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, sizeof(*mccch));
5352 if (!skb) {
5353 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n");
5354 return -ENOMEM;
5355 }
5356 skb_put(skb, sizeof(*mccch));
5357 mccch = (struct rtw89_fw_h2c_rf_get_mccch *)skb->data;
5358
5359 idx = rfk_mcc->table_idx;
5360 mccch->ch_0 = cpu_to_le32(rfk_mcc->ch[0]);
5361 mccch->ch_1 = cpu_to_le32(rfk_mcc->ch[1]);
5362 mccch->band_0 = cpu_to_le32(rfk_mcc->band[0]);
5363 mccch->band_1 = cpu_to_le32(rfk_mcc->band[1]);
5364 mccch->current_channel = cpu_to_le32(rfk_mcc->ch[idx]);
5365 mccch->current_band_type = cpu_to_le32(rfk_mcc->band[idx]);
5366
5367 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5368 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RF_FW_NOTIFY,
5369 H2C_FUNC_OUTSRC_RF_GET_MCCCH, 0, 0,
5370 sizeof(*mccch));
5371
5372 ret = rtw89_h2c_tx(rtwdev, skb, false);
5373 if (ret) {
5374 rtw89_err(rtwdev, "failed to send h2c\n");
5375 goto fail;
5376 }
5377
5378 return 0;
5379 fail:
5380 dev_kfree_skb_any(skb);
5381
5382 return ret;
5383 }
5384 EXPORT_SYMBOL(rtw89_fw_h2c_rf_ntfy_mcc);
5385
rtw89_fw_h2c_rf_pre_ntfy(struct rtw89_dev * rtwdev,enum rtw89_phy_idx phy_idx)5386 int rtw89_fw_h2c_rf_pre_ntfy(struct rtw89_dev *rtwdev,
5387 enum rtw89_phy_idx phy_idx)
5388 {
5389 struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc;
5390 struct rtw89_fw_h2c_rfk_pre_info_v0 *h2c_v0;
5391 struct rtw89_fw_h2c_rfk_pre_info *h2c;
5392 u8 tbl_sel = rfk_mcc->table_idx;
5393 u32 len = sizeof(*h2c);
5394 struct sk_buff *skb;
5395 u8 ver = U8_MAX;
5396 u8 tbl, path;
5397 u32 val32;
5398 int ret;
5399
5400 if (RTW89_CHK_FW_FEATURE(RFK_PRE_NOTIFY_V0, &rtwdev->fw)) {
5401 len = sizeof(*h2c_v0);
5402 ver = 0;
5403 }
5404
5405 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5406 if (!skb) {
5407 rtw89_err(rtwdev, "failed to alloc skb for h2c rfk_pre_ntfy\n");
5408 return -ENOMEM;
5409 }
5410 skb_put(skb, len);
5411 h2c = (struct rtw89_fw_h2c_rfk_pre_info *)skb->data;
5412
5413 h2c->common.mlo_mode = cpu_to_le32(rtwdev->mlo_dbcc_mode);
5414
5415 BUILD_BUG_ON(NUM_OF_RTW89_FW_RFK_TBL > RTW89_RFK_CHS_NR);
5416
5417 for (tbl = 0; tbl < NUM_OF_RTW89_FW_RFK_TBL; tbl++) {
5418 for (path = 0; path < NUM_OF_RTW89_FW_RFK_PATH; path++) {
5419 h2c->common.dbcc.ch[path][tbl] =
5420 cpu_to_le32(rfk_mcc->ch[tbl]);
5421 h2c->common.dbcc.band[path][tbl] =
5422 cpu_to_le32(rfk_mcc->band[tbl]);
5423 }
5424 }
5425
5426 for (path = 0; path < NUM_OF_RTW89_FW_RFK_PATH; path++) {
5427 h2c->common.tbl.cur_ch[path] = cpu_to_le32(rfk_mcc->ch[tbl_sel]);
5428 h2c->common.tbl.cur_band[path] = cpu_to_le32(rfk_mcc->band[tbl_sel]);
5429 }
5430
5431 h2c->common.phy_idx = cpu_to_le32(phy_idx);
5432
5433 if (ver == 0) { /* RFK_PRE_NOTIFY_V0 */
5434 h2c_v0 = (struct rtw89_fw_h2c_rfk_pre_info_v0 *)skb->data;
5435
5436 h2c_v0->cur_band = cpu_to_le32(rfk_mcc->band[tbl_sel]);
5437 h2c_v0->cur_bw = cpu_to_le32(rfk_mcc->bw[tbl_sel]);
5438 h2c_v0->cur_center_ch = cpu_to_le32(rfk_mcc->ch[tbl_sel]);
5439
5440 val32 = rtw89_phy_read32_mask(rtwdev, R_COEF_SEL, B_COEF_SEL_IQC_V1);
5441 h2c_v0->ktbl_sel0 = cpu_to_le32(val32);
5442 val32 = rtw89_phy_read32_mask(rtwdev, R_COEF_SEL_C1, B_COEF_SEL_IQC_V1);
5443 h2c_v0->ktbl_sel1 = cpu_to_le32(val32);
5444 val32 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK);
5445 h2c_v0->rfmod0 = cpu_to_le32(val32);
5446 val32 = rtw89_read_rf(rtwdev, RF_PATH_B, RR_CFGCH, RFREG_MASK);
5447 h2c_v0->rfmod1 = cpu_to_le32(val32);
5448
5449 if (rtw89_is_mlo_1_1(rtwdev))
5450 h2c_v0->mlo_1_1 = cpu_to_le32(1);
5451
5452 h2c_v0->rfe_type = cpu_to_le32(rtwdev->efuse.rfe_type);
5453
5454 goto done;
5455 }
5456
5457 if (rtw89_is_mlo_1_1(rtwdev))
5458 h2c->mlo_1_1 = cpu_to_le32(1);
5459 done:
5460 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5461 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RF_FW_RFK,
5462 H2C_FUNC_RFK_PRE_NOTIFY, 0, 0,
5463 len);
5464
5465 ret = rtw89_h2c_tx(rtwdev, skb, false);
5466 if (ret) {
5467 rtw89_err(rtwdev, "failed to send h2c\n");
5468 goto fail;
5469 }
5470
5471 return 0;
5472 fail:
5473 dev_kfree_skb_any(skb);
5474
5475 return ret;
5476 }
5477
rtw89_fw_h2c_rf_tssi(struct rtw89_dev * rtwdev,enum rtw89_phy_idx phy_idx,const struct rtw89_chan * chan,enum rtw89_tssi_mode tssi_mode)5478 int rtw89_fw_h2c_rf_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
5479 const struct rtw89_chan *chan, enum rtw89_tssi_mode tssi_mode)
5480 {
5481 struct rtw89_hal *hal = &rtwdev->hal;
5482 struct rtw89_h2c_rf_tssi *h2c;
5483 u32 len = sizeof(*h2c);
5484 struct sk_buff *skb;
5485 int ret;
5486
5487 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5488 if (!skb) {
5489 rtw89_err(rtwdev, "failed to alloc skb for h2c RF TSSI\n");
5490 return -ENOMEM;
5491 }
5492 skb_put(skb, len);
5493 h2c = (struct rtw89_h2c_rf_tssi *)skb->data;
5494
5495 h2c->len = cpu_to_le16(len);
5496 h2c->phy = phy_idx;
5497 h2c->ch = chan->channel;
5498 h2c->bw = chan->band_width;
5499 h2c->band = chan->band_type;
5500 h2c->hwtx_en = true;
5501 h2c->cv = hal->cv;
5502 h2c->tssi_mode = tssi_mode;
5503
5504 rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de(rtwdev, phy_idx, chan, h2c);
5505 rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl(rtwdev, phy_idx, chan, h2c);
5506
5507 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5508 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RF_FW_RFK,
5509 H2C_FUNC_RFK_TSSI_OFFLOAD, 0, 0, len);
5510
5511 ret = rtw89_h2c_tx(rtwdev, skb, false);
5512 if (ret) {
5513 rtw89_err(rtwdev, "failed to send h2c\n");
5514 goto fail;
5515 }
5516
5517 return 0;
5518 fail:
5519 dev_kfree_skb_any(skb);
5520
5521 return ret;
5522 }
5523
rtw89_fw_h2c_rf_iqk(struct rtw89_dev * rtwdev,enum rtw89_phy_idx phy_idx,const struct rtw89_chan * chan)5524 int rtw89_fw_h2c_rf_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
5525 const struct rtw89_chan *chan)
5526 {
5527 struct rtw89_h2c_rf_iqk *h2c;
5528 u32 len = sizeof(*h2c);
5529 struct sk_buff *skb;
5530 int ret;
5531
5532 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5533 if (!skb) {
5534 rtw89_err(rtwdev, "failed to alloc skb for h2c RF IQK\n");
5535 return -ENOMEM;
5536 }
5537 skb_put(skb, len);
5538 h2c = (struct rtw89_h2c_rf_iqk *)skb->data;
5539
5540 h2c->phy_idx = cpu_to_le32(phy_idx);
5541 h2c->dbcc = cpu_to_le32(rtwdev->dbcc_en);
5542
5543 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5544 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RF_FW_RFK,
5545 H2C_FUNC_RFK_IQK_OFFLOAD, 0, 0, len);
5546
5547 ret = rtw89_h2c_tx(rtwdev, skb, false);
5548 if (ret) {
5549 rtw89_err(rtwdev, "failed to send h2c\n");
5550 goto fail;
5551 }
5552
5553 return 0;
5554 fail:
5555 dev_kfree_skb_any(skb);
5556
5557 return ret;
5558 }
5559
rtw89_fw_h2c_rf_dpk(struct rtw89_dev * rtwdev,enum rtw89_phy_idx phy_idx,const struct rtw89_chan * chan)5560 int rtw89_fw_h2c_rf_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
5561 const struct rtw89_chan *chan)
5562 {
5563 struct rtw89_h2c_rf_dpk *h2c;
5564 u32 len = sizeof(*h2c);
5565 struct sk_buff *skb;
5566 int ret;
5567
5568 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5569 if (!skb) {
5570 rtw89_err(rtwdev, "failed to alloc skb for h2c RF DPK\n");
5571 return -ENOMEM;
5572 }
5573 skb_put(skb, len);
5574 h2c = (struct rtw89_h2c_rf_dpk *)skb->data;
5575
5576 h2c->len = len;
5577 h2c->phy = phy_idx;
5578 h2c->dpk_enable = true;
5579 h2c->kpath = RF_AB;
5580 h2c->cur_band = chan->band_type;
5581 h2c->cur_bw = chan->band_width;
5582 h2c->cur_ch = chan->channel;
5583 h2c->dpk_dbg_en = rtw89_debug_is_enabled(rtwdev, RTW89_DBG_RFK);
5584
5585 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5586 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RF_FW_RFK,
5587 H2C_FUNC_RFK_DPK_OFFLOAD, 0, 0, len);
5588
5589 ret = rtw89_h2c_tx(rtwdev, skb, false);
5590 if (ret) {
5591 rtw89_err(rtwdev, "failed to send h2c\n");
5592 goto fail;
5593 }
5594
5595 return 0;
5596 fail:
5597 dev_kfree_skb_any(skb);
5598
5599 return ret;
5600 }
5601
rtw89_fw_h2c_rf_txgapk(struct rtw89_dev * rtwdev,enum rtw89_phy_idx phy_idx,const struct rtw89_chan * chan)5602 int rtw89_fw_h2c_rf_txgapk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
5603 const struct rtw89_chan *chan)
5604 {
5605 struct rtw89_hal *hal = &rtwdev->hal;
5606 struct rtw89_h2c_rf_txgapk *h2c;
5607 u32 len = sizeof(*h2c);
5608 struct sk_buff *skb;
5609 int ret;
5610
5611 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5612 if (!skb) {
5613 rtw89_err(rtwdev, "failed to alloc skb for h2c RF TXGAPK\n");
5614 return -ENOMEM;
5615 }
5616 skb_put(skb, len);
5617 h2c = (struct rtw89_h2c_rf_txgapk *)skb->data;
5618
5619 h2c->len = len;
5620 h2c->ktype = 2;
5621 h2c->phy = phy_idx;
5622 h2c->kpath = RF_AB;
5623 h2c->band = chan->band_type;
5624 h2c->bw = chan->band_width;
5625 h2c->ch = chan->channel;
5626 h2c->cv = hal->cv;
5627
5628 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5629 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RF_FW_RFK,
5630 H2C_FUNC_RFK_TXGAPK_OFFLOAD, 0, 0, len);
5631
5632 ret = rtw89_h2c_tx(rtwdev, skb, false);
5633 if (ret) {
5634 rtw89_err(rtwdev, "failed to send h2c\n");
5635 goto fail;
5636 }
5637
5638 return 0;
5639 fail:
5640 dev_kfree_skb_any(skb);
5641
5642 return ret;
5643 }
5644
rtw89_fw_h2c_rf_dack(struct rtw89_dev * rtwdev,enum rtw89_phy_idx phy_idx,const struct rtw89_chan * chan)5645 int rtw89_fw_h2c_rf_dack(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
5646 const struct rtw89_chan *chan)
5647 {
5648 struct rtw89_h2c_rf_dack *h2c;
5649 u32 len = sizeof(*h2c);
5650 struct sk_buff *skb;
5651 int ret;
5652
5653 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5654 if (!skb) {
5655 rtw89_err(rtwdev, "failed to alloc skb for h2c RF DACK\n");
5656 return -ENOMEM;
5657 }
5658 skb_put(skb, len);
5659 h2c = (struct rtw89_h2c_rf_dack *)skb->data;
5660
5661 h2c->len = cpu_to_le32(len);
5662 h2c->phy = cpu_to_le32(phy_idx);
5663 h2c->type = cpu_to_le32(0);
5664
5665 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5666 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RF_FW_RFK,
5667 H2C_FUNC_RFK_DACK_OFFLOAD, 0, 0, len);
5668
5669 ret = rtw89_h2c_tx(rtwdev, skb, false);
5670 if (ret) {
5671 rtw89_err(rtwdev, "failed to send h2c\n");
5672 goto fail;
5673 }
5674
5675 return 0;
5676 fail:
5677 dev_kfree_skb_any(skb);
5678
5679 return ret;
5680 }
5681
rtw89_fw_h2c_rf_rxdck(struct rtw89_dev * rtwdev,enum rtw89_phy_idx phy_idx,const struct rtw89_chan * chan)5682 int rtw89_fw_h2c_rf_rxdck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx,
5683 const struct rtw89_chan *chan)
5684 {
5685 struct rtw89_h2c_rf_rxdck *h2c;
5686 u32 len = sizeof(*h2c);
5687 struct sk_buff *skb;
5688 int ret;
5689
5690 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5691 if (!skb) {
5692 rtw89_err(rtwdev, "failed to alloc skb for h2c RF RXDCK\n");
5693 return -ENOMEM;
5694 }
5695 skb_put(skb, len);
5696 h2c = (struct rtw89_h2c_rf_rxdck *)skb->data;
5697
5698 h2c->len = len;
5699 h2c->phy = phy_idx;
5700 h2c->is_afe = false;
5701 h2c->kpath = RF_AB;
5702 h2c->cur_band = chan->band_type;
5703 h2c->cur_bw = chan->band_width;
5704 h2c->cur_ch = chan->channel;
5705 h2c->rxdck_dbg_en = rtw89_debug_is_enabled(rtwdev, RTW89_DBG_RFK);
5706
5707 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5708 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RF_FW_RFK,
5709 H2C_FUNC_RFK_RXDCK_OFFLOAD, 0, 0, len);
5710
5711 ret = rtw89_h2c_tx(rtwdev, skb, false);
5712 if (ret) {
5713 rtw89_err(rtwdev, "failed to send h2c\n");
5714 goto fail;
5715 }
5716
5717 return 0;
5718 fail:
5719 dev_kfree_skb_any(skb);
5720
5721 return ret;
5722 }
5723
rtw89_fw_h2c_raw_with_hdr(struct rtw89_dev * rtwdev,u8 h2c_class,u8 h2c_func,u8 * buf,u16 len,bool rack,bool dack)5724 int rtw89_fw_h2c_raw_with_hdr(struct rtw89_dev *rtwdev,
5725 u8 h2c_class, u8 h2c_func, u8 *buf, u16 len,
5726 bool rack, bool dack)
5727 {
5728 struct sk_buff *skb;
5729 int ret;
5730
5731 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
5732 if (!skb) {
5733 rtw89_err(rtwdev, "failed to alloc skb for raw with hdr\n");
5734 return -ENOMEM;
5735 }
5736 skb_put_data(skb, buf, len);
5737
5738 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
5739 H2C_CAT_OUTSRC, h2c_class, h2c_func, rack, dack,
5740 len);
5741
5742 ret = rtw89_h2c_tx(rtwdev, skb, false);
5743 if (ret) {
5744 rtw89_err(rtwdev, "failed to send h2c\n");
5745 goto fail;
5746 }
5747
5748 return 0;
5749 fail:
5750 dev_kfree_skb_any(skb);
5751
5752 return ret;
5753 }
5754
rtw89_fw_h2c_raw(struct rtw89_dev * rtwdev,const u8 * buf,u16 len)5755 int rtw89_fw_h2c_raw(struct rtw89_dev *rtwdev, const u8 *buf, u16 len)
5756 {
5757 struct sk_buff *skb;
5758 int ret;
5759
5760 skb = rtw89_fw_h2c_alloc_skb_no_hdr(rtwdev, len);
5761 if (!skb) {
5762 rtw89_err(rtwdev, "failed to alloc skb for h2c raw\n");
5763 return -ENOMEM;
5764 }
5765 skb_put_data(skb, buf, len);
5766
5767 ret = rtw89_h2c_tx(rtwdev, skb, false);
5768 if (ret) {
5769 rtw89_err(rtwdev, "failed to send h2c\n");
5770 goto fail;
5771 }
5772
5773 return 0;
5774 fail:
5775 dev_kfree_skb_any(skb);
5776
5777 return ret;
5778 }
5779
rtw89_fw_send_all_early_h2c(struct rtw89_dev * rtwdev)5780 void rtw89_fw_send_all_early_h2c(struct rtw89_dev *rtwdev)
5781 {
5782 struct rtw89_early_h2c *early_h2c;
5783
5784 lockdep_assert_held(&rtwdev->mutex);
5785
5786 list_for_each_entry(early_h2c, &rtwdev->early_h2c_list, list) {
5787 rtw89_fw_h2c_raw(rtwdev, early_h2c->h2c, early_h2c->h2c_len);
5788 }
5789 }
5790
rtw89_fw_free_all_early_h2c(struct rtw89_dev * rtwdev)5791 void rtw89_fw_free_all_early_h2c(struct rtw89_dev *rtwdev)
5792 {
5793 struct rtw89_early_h2c *early_h2c, *tmp;
5794
5795 mutex_lock(&rtwdev->mutex);
5796 list_for_each_entry_safe(early_h2c, tmp, &rtwdev->early_h2c_list, list) {
5797 list_del(&early_h2c->list);
5798 kfree(early_h2c->h2c);
5799 kfree(early_h2c);
5800 }
5801 mutex_unlock(&rtwdev->mutex);
5802 }
5803
rtw89_fw_c2h_parse_attr(struct sk_buff * c2h)5804 static void rtw89_fw_c2h_parse_attr(struct sk_buff *c2h)
5805 {
5806 const struct rtw89_c2h_hdr *hdr = (const struct rtw89_c2h_hdr *)c2h->data;
5807 struct rtw89_fw_c2h_attr *attr = RTW89_SKB_C2H_CB(c2h);
5808
5809 attr->category = le32_get_bits(hdr->w0, RTW89_C2H_HDR_W0_CATEGORY);
5810 attr->class = le32_get_bits(hdr->w0, RTW89_C2H_HDR_W0_CLASS);
5811 attr->func = le32_get_bits(hdr->w0, RTW89_C2H_HDR_W0_FUNC);
5812 attr->len = le32_get_bits(hdr->w1, RTW89_C2H_HDR_W1_LEN);
5813 }
5814
rtw89_fw_c2h_chk_atomic(struct rtw89_dev * rtwdev,struct sk_buff * c2h)5815 static bool rtw89_fw_c2h_chk_atomic(struct rtw89_dev *rtwdev,
5816 struct sk_buff *c2h)
5817 {
5818 struct rtw89_fw_c2h_attr *attr = RTW89_SKB_C2H_CB(c2h);
5819 u8 category = attr->category;
5820 u8 class = attr->class;
5821 u8 func = attr->func;
5822
5823 switch (category) {
5824 default:
5825 return false;
5826 case RTW89_C2H_CAT_MAC:
5827 return rtw89_mac_c2h_chk_atomic(rtwdev, c2h, class, func);
5828 case RTW89_C2H_CAT_OUTSRC:
5829 return rtw89_phy_c2h_chk_atomic(rtwdev, class, func);
5830 }
5831 }
5832
rtw89_fw_c2h_irqsafe(struct rtw89_dev * rtwdev,struct sk_buff * c2h)5833 void rtw89_fw_c2h_irqsafe(struct rtw89_dev *rtwdev, struct sk_buff *c2h)
5834 {
5835 rtw89_fw_c2h_parse_attr(c2h);
5836 if (!rtw89_fw_c2h_chk_atomic(rtwdev, c2h))
5837 goto enqueue;
5838
5839 rtw89_fw_c2h_cmd_handle(rtwdev, c2h);
5840 dev_kfree_skb_any(c2h);
5841 return;
5842
5843 enqueue:
5844 skb_queue_tail(&rtwdev->c2h_queue, c2h);
5845 ieee80211_queue_work(rtwdev->hw, &rtwdev->c2h_work);
5846 }
5847
rtw89_fw_c2h_cmd_handle(struct rtw89_dev * rtwdev,struct sk_buff * skb)5848 static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev,
5849 struct sk_buff *skb)
5850 {
5851 struct rtw89_fw_c2h_attr *attr = RTW89_SKB_C2H_CB(skb);
5852 u8 category = attr->category;
5853 u8 class = attr->class;
5854 u8 func = attr->func;
5855 u16 len = attr->len;
5856 bool dump = true;
5857
5858 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags))
5859 return;
5860
5861 switch (category) {
5862 case RTW89_C2H_CAT_TEST:
5863 break;
5864 case RTW89_C2H_CAT_MAC:
5865 rtw89_mac_c2h_handle(rtwdev, skb, len, class, func);
5866 if (class == RTW89_MAC_C2H_CLASS_INFO &&
5867 func == RTW89_MAC_C2H_FUNC_C2H_LOG)
5868 dump = false;
5869 break;
5870 case RTW89_C2H_CAT_OUTSRC:
5871 if (class >= RTW89_PHY_C2H_CLASS_BTC_MIN &&
5872 class <= RTW89_PHY_C2H_CLASS_BTC_MAX)
5873 rtw89_btc_c2h_handle(rtwdev, skb, len, class, func);
5874 else
5875 rtw89_phy_c2h_handle(rtwdev, skb, len, class, func);
5876 break;
5877 }
5878
5879 if (dump)
5880 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "C2H: ", skb->data, skb->len);
5881 }
5882
rtw89_fw_c2h_work(struct work_struct * work)5883 void rtw89_fw_c2h_work(struct work_struct *work)
5884 {
5885 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev,
5886 c2h_work);
5887 struct sk_buff *skb, *tmp;
5888
5889 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
5890 skb_unlink(skb, &rtwdev->c2h_queue);
5891 mutex_lock(&rtwdev->mutex);
5892 rtw89_fw_c2h_cmd_handle(rtwdev, skb);
5893 mutex_unlock(&rtwdev->mutex);
5894 dev_kfree_skb_any(skb);
5895 }
5896 }
5897
rtw89_fw_write_h2c_reg(struct rtw89_dev * rtwdev,struct rtw89_mac_h2c_info * info)5898 static int rtw89_fw_write_h2c_reg(struct rtw89_dev *rtwdev,
5899 struct rtw89_mac_h2c_info *info)
5900 {
5901 const struct rtw89_chip_info *chip = rtwdev->chip;
5902 struct rtw89_fw_info *fw_info = &rtwdev->fw;
5903 const u32 *h2c_reg = chip->h2c_regs;
5904 u8 i, val, len;
5905 int ret;
5906
5907 ret = read_poll_timeout(rtw89_read8, val, val == 0, 1000, 5000, false,
5908 rtwdev, chip->h2c_ctrl_reg);
5909 if (ret) {
5910 rtw89_warn(rtwdev, "FW does not process h2c registers\n");
5911 return ret;
5912 }
5913
5914 len = DIV_ROUND_UP(info->content_len + RTW89_H2CREG_HDR_LEN,
5915 sizeof(info->u.h2creg[0]));
5916
5917 u32p_replace_bits(&info->u.hdr.w0, info->id, RTW89_H2CREG_HDR_FUNC_MASK);
5918 u32p_replace_bits(&info->u.hdr.w0, len, RTW89_H2CREG_HDR_LEN_MASK);
5919
5920 for (i = 0; i < RTW89_H2CREG_MAX; i++)
5921 rtw89_write32(rtwdev, h2c_reg[i], info->u.h2creg[i]);
5922
5923 fw_info->h2c_counter++;
5924 rtw89_write8_mask(rtwdev, chip->h2c_counter_reg.addr,
5925 chip->h2c_counter_reg.mask, fw_info->h2c_counter);
5926 rtw89_write8(rtwdev, chip->h2c_ctrl_reg, B_AX_H2CREG_TRIGGER);
5927
5928 return 0;
5929 }
5930
rtw89_fw_read_c2h_reg(struct rtw89_dev * rtwdev,struct rtw89_mac_c2h_info * info)5931 static int rtw89_fw_read_c2h_reg(struct rtw89_dev *rtwdev,
5932 struct rtw89_mac_c2h_info *info)
5933 {
5934 const struct rtw89_chip_info *chip = rtwdev->chip;
5935 struct rtw89_fw_info *fw_info = &rtwdev->fw;
5936 const u32 *c2h_reg = chip->c2h_regs;
5937 u32 ret, timeout;
5938 u8 i, val;
5939
5940 info->id = RTW89_FWCMD_C2HREG_FUNC_NULL;
5941
5942 if (rtwdev->hci.type == RTW89_HCI_TYPE_USB)
5943 timeout = RTW89_C2H_TIMEOUT_USB;
5944 else
5945 timeout = RTW89_C2H_TIMEOUT;
5946
5947 ret = read_poll_timeout_atomic(rtw89_read8, val, val, 1,
5948 timeout, false, rtwdev,
5949 chip->c2h_ctrl_reg);
5950 if (ret) {
5951 rtw89_warn(rtwdev, "c2h reg timeout\n");
5952 return ret;
5953 }
5954
5955 for (i = 0; i < RTW89_C2HREG_MAX; i++)
5956 info->u.c2hreg[i] = rtw89_read32(rtwdev, c2h_reg[i]);
5957
5958 rtw89_write8(rtwdev, chip->c2h_ctrl_reg, 0);
5959
5960 info->id = u32_get_bits(info->u.hdr.w0, RTW89_C2HREG_HDR_FUNC_MASK);
5961 info->content_len =
5962 (u32_get_bits(info->u.hdr.w0, RTW89_C2HREG_HDR_LEN_MASK) << 2) -
5963 RTW89_C2HREG_HDR_LEN;
5964
5965 fw_info->c2h_counter++;
5966 rtw89_write8_mask(rtwdev, chip->c2h_counter_reg.addr,
5967 chip->c2h_counter_reg.mask, fw_info->c2h_counter);
5968
5969 return 0;
5970 }
5971
rtw89_fw_msg_reg(struct rtw89_dev * rtwdev,struct rtw89_mac_h2c_info * h2c_info,struct rtw89_mac_c2h_info * c2h_info)5972 int rtw89_fw_msg_reg(struct rtw89_dev *rtwdev,
5973 struct rtw89_mac_h2c_info *h2c_info,
5974 struct rtw89_mac_c2h_info *c2h_info)
5975 {
5976 u32 ret;
5977
5978 if (h2c_info && h2c_info->id != RTW89_FWCMD_H2CREG_FUNC_GET_FEATURE)
5979 lockdep_assert_held(&rtwdev->mutex);
5980
5981 if (!h2c_info && !c2h_info)
5982 return -EINVAL;
5983
5984 if (!h2c_info)
5985 goto recv_c2h;
5986
5987 ret = rtw89_fw_write_h2c_reg(rtwdev, h2c_info);
5988 if (ret)
5989 return ret;
5990
5991 recv_c2h:
5992 if (!c2h_info)
5993 return 0;
5994
5995 ret = rtw89_fw_read_c2h_reg(rtwdev, c2h_info);
5996 if (ret)
5997 return ret;
5998
5999 return 0;
6000 }
6001
rtw89_fw_st_dbg_dump(struct rtw89_dev * rtwdev)6002 void rtw89_fw_st_dbg_dump(struct rtw89_dev *rtwdev)
6003 {
6004 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) {
6005 rtw89_err(rtwdev, "[ERR]pwr is off\n");
6006 return;
6007 }
6008
6009 rtw89_info(rtwdev, "FW status = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM0));
6010 rtw89_info(rtwdev, "FW BADADDR = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM1));
6011 rtw89_info(rtwdev, "FW EPC/RA = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM2));
6012 rtw89_info(rtwdev, "FW MISC = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM3));
6013 rtw89_info(rtwdev, "R_AX_HALT_C2H = 0x%x\n",
6014 rtw89_read32(rtwdev, R_AX_HALT_C2H));
6015 rtw89_info(rtwdev, "R_AX_SER_DBG_INFO = 0x%x\n",
6016 rtw89_read32(rtwdev, R_AX_SER_DBG_INFO));
6017
6018 rtw89_fw_prog_cnt_dump(rtwdev);
6019 }
6020
rtw89_release_pkt_list(struct rtw89_dev * rtwdev)6021 static void rtw89_release_pkt_list(struct rtw89_dev *rtwdev)
6022 {
6023 struct list_head *pkt_list = rtwdev->scan_info.pkt_list;
6024 struct rtw89_pktofld_info *info, *tmp;
6025 u8 idx;
6026
6027 for (idx = NL80211_BAND_2GHZ; idx < NUM_NL80211_BANDS; idx++) {
6028 if (!(rtwdev->chip->support_bands & BIT(idx)))
6029 continue;
6030
6031 list_for_each_entry_safe(info, tmp, &pkt_list[idx], list) {
6032 if (test_bit(info->id, rtwdev->pkt_offload))
6033 rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id);
6034 list_del(&info->list);
6035 kfree(info);
6036 }
6037 }
6038 }
6039
rtw89_is_6ghz_wildcard_probe_req(struct rtw89_dev * rtwdev,struct cfg80211_scan_request * req,struct rtw89_pktofld_info * info,enum nl80211_band band,u8 ssid_idx)6040 static bool rtw89_is_6ghz_wildcard_probe_req(struct rtw89_dev *rtwdev,
6041 struct cfg80211_scan_request *req,
6042 struct rtw89_pktofld_info *info,
6043 enum nl80211_band band, u8 ssid_idx)
6044 {
6045 if (band != NL80211_BAND_6GHZ)
6046 return false;
6047
6048 if (req->ssids[ssid_idx].ssid_len) {
6049 memcpy(info->ssid, req->ssids[ssid_idx].ssid,
6050 req->ssids[ssid_idx].ssid_len);
6051 info->ssid_len = req->ssids[ssid_idx].ssid_len;
6052 return false;
6053 } else {
6054 info->wildcard_6ghz = true;
6055 return true;
6056 }
6057 }
6058
rtw89_append_probe_req_ie(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct sk_buff * skb,u8 ssid_idx)6059 static int rtw89_append_probe_req_ie(struct rtw89_dev *rtwdev,
6060 struct rtw89_vif_link *rtwvif_link,
6061 struct sk_buff *skb, u8 ssid_idx)
6062 {
6063 struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info;
6064 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
6065 struct ieee80211_scan_ies *ies = rtwvif->scan_ies;
6066 struct cfg80211_scan_request *req = rtwvif->scan_req;
6067 struct rtw89_pktofld_info *info;
6068 struct sk_buff *new;
6069 int ret = 0;
6070 u8 band;
6071
6072 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
6073 if (!(rtwdev->chip->support_bands & BIT(band)))
6074 continue;
6075
6076 new = skb_copy(skb, GFP_KERNEL);
6077 if (!new) {
6078 ret = -ENOMEM;
6079 goto out;
6080 }
6081 skb_put_data(new, ies->ies[band], ies->len[band]);
6082 skb_put_data(new, ies->common_ies, ies->common_ie_len);
6083
6084 info = kzalloc(sizeof(*info), GFP_KERNEL);
6085 if (!info) {
6086 ret = -ENOMEM;
6087 kfree_skb(new);
6088 goto out;
6089 }
6090
6091 rtw89_is_6ghz_wildcard_probe_req(rtwdev, req, info, band, ssid_idx);
6092
6093 ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, new);
6094 if (ret) {
6095 kfree_skb(new);
6096 kfree(info);
6097 goto out;
6098 }
6099
6100 list_add_tail(&info->list, &scan_info->pkt_list[band]);
6101 kfree_skb(new);
6102 }
6103 out:
6104 return ret;
6105 }
6106
rtw89_hw_scan_update_probe_req(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)6107 static int rtw89_hw_scan_update_probe_req(struct rtw89_dev *rtwdev,
6108 struct rtw89_vif_link *rtwvif_link)
6109 {
6110 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
6111 struct cfg80211_scan_request *req = rtwvif->scan_req;
6112 struct sk_buff *skb;
6113 u8 num = req->n_ssids, i;
6114 int ret;
6115
6116 for (i = 0; i < num; i++) {
6117 skb = ieee80211_probereq_get(rtwdev->hw, rtwvif_link->mac_addr,
6118 req->ssids[i].ssid,
6119 req->ssids[i].ssid_len,
6120 req->ie_len);
6121 if (!skb)
6122 return -ENOMEM;
6123
6124 ret = rtw89_append_probe_req_ie(rtwdev, rtwvif_link, skb, i);
6125 kfree_skb(skb);
6126
6127 if (ret)
6128 return ret;
6129 }
6130
6131 return 0;
6132 }
6133
rtw89_update_6ghz_rnr_chan(struct rtw89_dev * rtwdev,struct ieee80211_scan_ies * ies,struct cfg80211_scan_request * req,struct rtw89_mac_chinfo * ch_info)6134 static int rtw89_update_6ghz_rnr_chan(struct rtw89_dev *rtwdev,
6135 struct ieee80211_scan_ies *ies,
6136 struct cfg80211_scan_request *req,
6137 struct rtw89_mac_chinfo *ch_info)
6138 {
6139 struct rtw89_vif_link *rtwvif_link = rtwdev->scan_info.scanning_vif;
6140 struct list_head *pkt_list = rtwdev->scan_info.pkt_list;
6141 struct cfg80211_scan_6ghz_params *params;
6142 struct rtw89_pktofld_info *info, *tmp;
6143 struct ieee80211_hdr *hdr;
6144 struct sk_buff *skb;
6145 bool found;
6146 int ret = 0;
6147 u8 i;
6148
6149 if (!req->n_6ghz_params)
6150 return 0;
6151
6152 for (i = 0; i < req->n_6ghz_params; i++) {
6153 params = &req->scan_6ghz_params[i];
6154
6155 if (req->channels[params->channel_idx]->hw_value !=
6156 ch_info->pri_ch)
6157 continue;
6158
6159 found = false;
6160 list_for_each_entry(tmp, &pkt_list[NL80211_BAND_6GHZ], list) {
6161 if (ether_addr_equal(tmp->bssid, params->bssid)) {
6162 found = true;
6163 break;
6164 }
6165 }
6166 if (found)
6167 continue;
6168
6169 skb = ieee80211_probereq_get(rtwdev->hw, rtwvif_link->mac_addr,
6170 NULL, 0, req->ie_len);
6171 if (!skb)
6172 return -ENOMEM;
6173
6174 skb_put_data(skb, ies->ies[NL80211_BAND_6GHZ], ies->len[NL80211_BAND_6GHZ]);
6175 skb_put_data(skb, ies->common_ies, ies->common_ie_len);
6176 hdr = (struct ieee80211_hdr *)skb->data;
6177 ether_addr_copy(hdr->addr3, params->bssid);
6178
6179 info = kzalloc(sizeof(*info), GFP_KERNEL);
6180 if (!info) {
6181 ret = -ENOMEM;
6182 kfree_skb(skb);
6183 goto out;
6184 }
6185
6186 ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, skb);
6187 if (ret) {
6188 kfree_skb(skb);
6189 kfree(info);
6190 goto out;
6191 }
6192
6193 ether_addr_copy(info->bssid, params->bssid);
6194 info->channel_6ghz = req->channels[params->channel_idx]->hw_value;
6195 list_add_tail(&info->list, &rtwdev->scan_info.pkt_list[NL80211_BAND_6GHZ]);
6196
6197 ch_info->tx_pkt = true;
6198 ch_info->period = RTW89_CHANNEL_TIME_6G + RTW89_DWELL_TIME_6G;
6199
6200 kfree_skb(skb);
6201 }
6202
6203 out:
6204 return ret;
6205 }
6206
rtw89_pno_scan_add_chan_ax(struct rtw89_dev * rtwdev,int chan_type,int ssid_num,struct rtw89_mac_chinfo * ch_info)6207 static void rtw89_pno_scan_add_chan_ax(struct rtw89_dev *rtwdev,
6208 int chan_type, int ssid_num,
6209 struct rtw89_mac_chinfo *ch_info)
6210 {
6211 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
6212 struct rtw89_pktofld_info *info;
6213 u8 probe_count = 0;
6214
6215 ch_info->notify_action = RTW89_SCANOFLD_DEBUG_MASK;
6216 ch_info->dfs_ch = chan_type == RTW89_CHAN_DFS;
6217 ch_info->bw = RTW89_SCAN_WIDTH;
6218 ch_info->tx_pkt = true;
6219 ch_info->cfg_tx_pwr = false;
6220 ch_info->tx_pwr_idx = 0;
6221 ch_info->tx_null = false;
6222 ch_info->pause_data = false;
6223 ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE;
6224
6225 if (ssid_num) {
6226 list_for_each_entry(info, &rtw_wow->pno_pkt_list, list) {
6227 if (info->channel_6ghz &&
6228 ch_info->pri_ch != info->channel_6ghz)
6229 continue;
6230 else if (info->channel_6ghz && probe_count != 0)
6231 ch_info->period += RTW89_CHANNEL_TIME_6G;
6232
6233 if (info->wildcard_6ghz)
6234 continue;
6235
6236 ch_info->pkt_id[probe_count++] = info->id;
6237 if (probe_count >= RTW89_SCANOFLD_MAX_SSID)
6238 break;
6239 }
6240 ch_info->num_pkt = probe_count;
6241 }
6242
6243 switch (chan_type) {
6244 case RTW89_CHAN_DFS:
6245 if (ch_info->ch_band != RTW89_BAND_6G)
6246 ch_info->period = max_t(u8, ch_info->period,
6247 RTW89_DFS_CHAN_TIME);
6248 ch_info->dwell_time = RTW89_DWELL_TIME;
6249 break;
6250 case RTW89_CHAN_ACTIVE:
6251 break;
6252 default:
6253 rtw89_err(rtwdev, "Channel type out of bound\n");
6254 }
6255 }
6256
rtw89_hw_scan_add_chan(struct rtw89_dev * rtwdev,int chan_type,int ssid_num,struct rtw89_mac_chinfo * ch_info)6257 static void rtw89_hw_scan_add_chan(struct rtw89_dev *rtwdev, int chan_type,
6258 int ssid_num,
6259 struct rtw89_mac_chinfo *ch_info)
6260 {
6261 struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info;
6262 struct rtw89_vif_link *rtwvif_link = rtwdev->scan_info.scanning_vif;
6263 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
6264 struct ieee80211_scan_ies *ies = rtwvif->scan_ies;
6265 struct cfg80211_scan_request *req = rtwvif->scan_req;
6266 struct rtw89_chan *op = &rtwdev->scan_info.op_chan;
6267 struct rtw89_pktofld_info *info;
6268 u8 band, probe_count = 0;
6269 int ret;
6270
6271 ch_info->notify_action = RTW89_SCANOFLD_DEBUG_MASK;
6272 ch_info->dfs_ch = chan_type == RTW89_CHAN_DFS;
6273 ch_info->bw = RTW89_SCAN_WIDTH;
6274 ch_info->tx_pkt = true;
6275 ch_info->cfg_tx_pwr = false;
6276 ch_info->tx_pwr_idx = 0;
6277 ch_info->tx_null = false;
6278 ch_info->pause_data = false;
6279 ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE;
6280
6281 if (ch_info->ch_band == RTW89_BAND_6G) {
6282 if ((ssid_num == 1 && req->ssids[0].ssid_len == 0) ||
6283 !ch_info->is_psc) {
6284 ch_info->tx_pkt = false;
6285 if (!req->duration_mandatory)
6286 ch_info->period -= RTW89_DWELL_TIME_6G;
6287 }
6288 }
6289
6290 ret = rtw89_update_6ghz_rnr_chan(rtwdev, ies, req, ch_info);
6291 if (ret)
6292 rtw89_warn(rtwdev, "RNR fails: %d\n", ret);
6293
6294 if (ssid_num) {
6295 band = rtw89_hw_to_nl80211_band(ch_info->ch_band);
6296
6297 list_for_each_entry(info, &scan_info->pkt_list[band], list) {
6298 if (info->channel_6ghz &&
6299 ch_info->pri_ch != info->channel_6ghz)
6300 continue;
6301 else if (info->channel_6ghz && probe_count != 0)
6302 ch_info->period += RTW89_CHANNEL_TIME_6G;
6303
6304 if (info->wildcard_6ghz)
6305 continue;
6306
6307 ch_info->pkt_id[probe_count++] = info->id;
6308 if (probe_count >= RTW89_SCANOFLD_MAX_SSID)
6309 break;
6310 }
6311 ch_info->num_pkt = probe_count;
6312 }
6313
6314 switch (chan_type) {
6315 case RTW89_CHAN_OPERATE:
6316 ch_info->central_ch = op->channel;
6317 ch_info->pri_ch = op->primary_channel;
6318 ch_info->ch_band = op->band_type;
6319 ch_info->bw = op->band_width;
6320 ch_info->tx_null = true;
6321 ch_info->num_pkt = 0;
6322 break;
6323 case RTW89_CHAN_DFS:
6324 if (ch_info->ch_band != RTW89_BAND_6G)
6325 ch_info->period = max_t(u8, ch_info->period,
6326 RTW89_DFS_CHAN_TIME);
6327 ch_info->dwell_time = RTW89_DWELL_TIME;
6328 break;
6329 case RTW89_CHAN_ACTIVE:
6330 break;
6331 default:
6332 rtw89_err(rtwdev, "Channel type out of bound\n");
6333 }
6334 }
6335
rtw89_pno_scan_add_chan_be(struct rtw89_dev * rtwdev,int chan_type,int ssid_num,struct rtw89_mac_chinfo_be * ch_info)6336 static void rtw89_pno_scan_add_chan_be(struct rtw89_dev *rtwdev, int chan_type,
6337 int ssid_num,
6338 struct rtw89_mac_chinfo_be *ch_info)
6339 {
6340 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
6341 struct rtw89_pktofld_info *info;
6342 u8 probe_count = 0, i;
6343
6344 ch_info->notify_action = RTW89_SCANOFLD_DEBUG_MASK;
6345 ch_info->dfs_ch = chan_type == RTW89_CHAN_DFS;
6346 ch_info->bw = RTW89_SCAN_WIDTH;
6347 ch_info->tx_null = false;
6348 ch_info->pause_data = false;
6349 ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE;
6350
6351 if (ssid_num) {
6352 list_for_each_entry(info, &rtw_wow->pno_pkt_list, list) {
6353 ch_info->pkt_id[probe_count++] = info->id;
6354 if (probe_count >= RTW89_SCANOFLD_MAX_SSID)
6355 break;
6356 }
6357 }
6358
6359 for (i = probe_count; i < RTW89_SCANOFLD_MAX_SSID; i++)
6360 ch_info->pkt_id[i] = RTW89_SCANOFLD_PKT_NONE;
6361
6362 switch (chan_type) {
6363 case RTW89_CHAN_DFS:
6364 ch_info->period = max_t(u8, ch_info->period, RTW89_DFS_CHAN_TIME);
6365 ch_info->dwell_time = RTW89_DWELL_TIME;
6366 break;
6367 case RTW89_CHAN_ACTIVE:
6368 break;
6369 default:
6370 rtw89_warn(rtwdev, "Channel type out of bound\n");
6371 break;
6372 }
6373 }
6374
rtw89_hw_scan_add_chan_be(struct rtw89_dev * rtwdev,int chan_type,int ssid_num,struct rtw89_mac_chinfo_be * ch_info)6375 static void rtw89_hw_scan_add_chan_be(struct rtw89_dev *rtwdev, int chan_type,
6376 int ssid_num,
6377 struct rtw89_mac_chinfo_be *ch_info)
6378 {
6379 struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info;
6380 struct rtw89_vif_link *rtwvif_link = rtwdev->scan_info.scanning_vif;
6381 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
6382 struct cfg80211_scan_request *req = rtwvif->scan_req;
6383 struct rtw89_pktofld_info *info;
6384 u8 band, probe_count = 0, i;
6385
6386 ch_info->notify_action = RTW89_SCANOFLD_DEBUG_MASK;
6387 ch_info->dfs_ch = chan_type == RTW89_CHAN_DFS;
6388 ch_info->bw = RTW89_SCAN_WIDTH;
6389 ch_info->tx_null = false;
6390 ch_info->pause_data = false;
6391 ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE;
6392
6393 if (ssid_num) {
6394 band = rtw89_hw_to_nl80211_band(ch_info->ch_band);
6395
6396 list_for_each_entry(info, &scan_info->pkt_list[band], list) {
6397 if (info->channel_6ghz &&
6398 ch_info->pri_ch != info->channel_6ghz)
6399 continue;
6400
6401 if (info->wildcard_6ghz)
6402 continue;
6403
6404 ch_info->pkt_id[probe_count++] = info->id;
6405 if (probe_count >= RTW89_SCANOFLD_MAX_SSID)
6406 break;
6407 }
6408 }
6409
6410 if (ch_info->ch_band == RTW89_BAND_6G) {
6411 if ((ssid_num == 1 && req->ssids[0].ssid_len == 0) ||
6412 !ch_info->is_psc) {
6413 ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE;
6414 if (!req->duration_mandatory)
6415 ch_info->period -= RTW89_DWELL_TIME_6G;
6416 }
6417 }
6418
6419 for (i = probe_count; i < RTW89_SCANOFLD_MAX_SSID; i++)
6420 ch_info->pkt_id[i] = RTW89_SCANOFLD_PKT_NONE;
6421
6422 switch (chan_type) {
6423 case RTW89_CHAN_DFS:
6424 if (ch_info->ch_band != RTW89_BAND_6G)
6425 ch_info->period =
6426 max_t(u8, ch_info->period, RTW89_DFS_CHAN_TIME);
6427 ch_info->dwell_time = RTW89_DWELL_TIME;
6428 break;
6429 case RTW89_CHAN_ACTIVE:
6430 break;
6431 default:
6432 rtw89_warn(rtwdev, "Channel type out of bound\n");
6433 break;
6434 }
6435 }
6436
rtw89_pno_scan_add_chan_list_ax(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)6437 int rtw89_pno_scan_add_chan_list_ax(struct rtw89_dev *rtwdev,
6438 struct rtw89_vif_link *rtwvif_link)
6439 {
6440 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
6441 struct cfg80211_sched_scan_request *nd_config = rtw_wow->nd_config;
6442 struct rtw89_mac_chinfo *ch_info, *tmp;
6443 struct ieee80211_channel *channel;
6444 struct list_head chan_list;
6445 int list_len;
6446 enum rtw89_chan_type type;
6447 int ret = 0;
6448 u32 idx;
6449
6450 INIT_LIST_HEAD(&chan_list);
6451 for (idx = 0, list_len = 0;
6452 idx < nd_config->n_channels && list_len < RTW89_SCAN_LIST_LIMIT;
6453 idx++, list_len++) {
6454 channel = nd_config->channels[idx];
6455 ch_info = kzalloc(sizeof(*ch_info), GFP_KERNEL);
6456 if (!ch_info) {
6457 ret = -ENOMEM;
6458 goto out;
6459 }
6460
6461 ch_info->period = RTW89_CHANNEL_TIME;
6462 ch_info->ch_band = rtw89_nl80211_to_hw_band(channel->band);
6463 ch_info->central_ch = channel->hw_value;
6464 ch_info->pri_ch = channel->hw_value;
6465 ch_info->is_psc = cfg80211_channel_is_psc(channel);
6466
6467 if (channel->flags &
6468 (IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR))
6469 type = RTW89_CHAN_DFS;
6470 else
6471 type = RTW89_CHAN_ACTIVE;
6472
6473 rtw89_pno_scan_add_chan_ax(rtwdev, type, nd_config->n_match_sets, ch_info);
6474 list_add_tail(&ch_info->list, &chan_list);
6475 }
6476 ret = rtw89_fw_h2c_scan_list_offload(rtwdev, list_len, &chan_list);
6477
6478 out:
6479 list_for_each_entry_safe(ch_info, tmp, &chan_list, list) {
6480 list_del(&ch_info->list);
6481 kfree(ch_info);
6482 }
6483
6484 return ret;
6485 }
6486
rtw89_hw_scan_add_chan_list_ax(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool connected)6487 int rtw89_hw_scan_add_chan_list_ax(struct rtw89_dev *rtwdev,
6488 struct rtw89_vif_link *rtwvif_link, bool connected)
6489 {
6490 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
6491 struct cfg80211_scan_request *req = rtwvif->scan_req;
6492 struct rtw89_mac_chinfo *ch_info, *tmp;
6493 struct ieee80211_channel *channel;
6494 struct list_head chan_list;
6495 bool random_seq = req->flags & NL80211_SCAN_FLAG_RANDOM_SN;
6496 int list_len, off_chan_time = 0;
6497 enum rtw89_chan_type type;
6498 int ret = 0;
6499 u32 idx;
6500
6501 INIT_LIST_HEAD(&chan_list);
6502 for (idx = rtwdev->scan_info.last_chan_idx, list_len = 0;
6503 idx < req->n_channels && list_len < RTW89_SCAN_LIST_LIMIT;
6504 idx++, list_len++) {
6505 channel = req->channels[idx];
6506 ch_info = kzalloc(sizeof(*ch_info), GFP_KERNEL);
6507 if (!ch_info) {
6508 ret = -ENOMEM;
6509 goto out;
6510 }
6511
6512 if (req->duration)
6513 ch_info->period = req->duration;
6514 else if (channel->band == NL80211_BAND_6GHZ)
6515 ch_info->period = RTW89_CHANNEL_TIME_6G +
6516 RTW89_DWELL_TIME_6G;
6517 else
6518 ch_info->period = RTW89_CHANNEL_TIME;
6519
6520 ch_info->ch_band = rtw89_nl80211_to_hw_band(channel->band);
6521 ch_info->central_ch = channel->hw_value;
6522 ch_info->pri_ch = channel->hw_value;
6523 ch_info->rand_seq_num = random_seq;
6524 ch_info->is_psc = cfg80211_channel_is_psc(channel);
6525
6526 if (channel->flags &
6527 (IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR))
6528 type = RTW89_CHAN_DFS;
6529 else
6530 type = RTW89_CHAN_ACTIVE;
6531 rtw89_hw_scan_add_chan(rtwdev, type, req->n_ssids, ch_info);
6532
6533 if (connected &&
6534 off_chan_time + ch_info->period > RTW89_OFF_CHAN_TIME) {
6535 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
6536 if (!tmp) {
6537 ret = -ENOMEM;
6538 kfree(ch_info);
6539 goto out;
6540 }
6541
6542 type = RTW89_CHAN_OPERATE;
6543 tmp->period = req->duration_mandatory ?
6544 req->duration : RTW89_CHANNEL_TIME;
6545 rtw89_hw_scan_add_chan(rtwdev, type, 0, tmp);
6546 list_add_tail(&tmp->list, &chan_list);
6547 off_chan_time = 0;
6548 list_len++;
6549 }
6550 list_add_tail(&ch_info->list, &chan_list);
6551 off_chan_time += ch_info->period;
6552 }
6553 rtwdev->scan_info.last_chan_idx = idx;
6554 ret = rtw89_fw_h2c_scan_list_offload(rtwdev, list_len, &chan_list);
6555
6556 out:
6557 list_for_each_entry_safe(ch_info, tmp, &chan_list, list) {
6558 list_del(&ch_info->list);
6559 kfree(ch_info);
6560 }
6561
6562 return ret;
6563 }
6564
rtw89_pno_scan_add_chan_list_be(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)6565 int rtw89_pno_scan_add_chan_list_be(struct rtw89_dev *rtwdev,
6566 struct rtw89_vif_link *rtwvif_link)
6567 {
6568 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
6569 struct cfg80211_sched_scan_request *nd_config = rtw_wow->nd_config;
6570 struct rtw89_mac_chinfo_be *ch_info, *tmp;
6571 struct ieee80211_channel *channel;
6572 struct list_head chan_list;
6573 enum rtw89_chan_type type;
6574 int list_len, ret;
6575 u32 idx;
6576
6577 INIT_LIST_HEAD(&chan_list);
6578
6579 for (idx = 0, list_len = 0;
6580 idx < nd_config->n_channels && list_len < RTW89_SCAN_LIST_LIMIT;
6581 idx++, list_len++) {
6582 channel = nd_config->channels[idx];
6583 ch_info = kzalloc(sizeof(*ch_info), GFP_KERNEL);
6584 if (!ch_info) {
6585 ret = -ENOMEM;
6586 goto out;
6587 }
6588
6589 ch_info->period = RTW89_CHANNEL_TIME;
6590 ch_info->ch_band = rtw89_nl80211_to_hw_band(channel->band);
6591 ch_info->central_ch = channel->hw_value;
6592 ch_info->pri_ch = channel->hw_value;
6593 ch_info->is_psc = cfg80211_channel_is_psc(channel);
6594
6595 if (channel->flags &
6596 (IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR))
6597 type = RTW89_CHAN_DFS;
6598 else
6599 type = RTW89_CHAN_ACTIVE;
6600
6601 rtw89_pno_scan_add_chan_be(rtwdev, type,
6602 nd_config->n_match_sets, ch_info);
6603 list_add_tail(&ch_info->list, &chan_list);
6604 }
6605
6606 ret = rtw89_fw_h2c_scan_list_offload_be(rtwdev, list_len, &chan_list);
6607
6608 out:
6609 list_for_each_entry_safe(ch_info, tmp, &chan_list, list) {
6610 list_del(&ch_info->list);
6611 kfree(ch_info);
6612 }
6613
6614 return ret;
6615 }
6616
rtw89_hw_scan_add_chan_list_be(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool connected)6617 int rtw89_hw_scan_add_chan_list_be(struct rtw89_dev *rtwdev,
6618 struct rtw89_vif_link *rtwvif_link, bool connected)
6619 {
6620 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
6621 struct cfg80211_scan_request *req = rtwvif->scan_req;
6622 struct rtw89_mac_chinfo_be *ch_info, *tmp;
6623 struct ieee80211_channel *channel;
6624 struct list_head chan_list;
6625 enum rtw89_chan_type type;
6626 int list_len, ret;
6627 bool random_seq;
6628 u32 idx;
6629
6630 random_seq = !!(req->flags & NL80211_SCAN_FLAG_RANDOM_SN);
6631 INIT_LIST_HEAD(&chan_list);
6632
6633 for (idx = rtwdev->scan_info.last_chan_idx, list_len = 0;
6634 idx < req->n_channels && list_len < RTW89_SCAN_LIST_LIMIT;
6635 idx++, list_len++) {
6636 channel = req->channels[idx];
6637 ch_info = kzalloc(sizeof(*ch_info), GFP_KERNEL);
6638 if (!ch_info) {
6639 ret = -ENOMEM;
6640 goto out;
6641 }
6642
6643 if (req->duration)
6644 ch_info->period = req->duration;
6645 else if (channel->band == NL80211_BAND_6GHZ)
6646 ch_info->period = RTW89_CHANNEL_TIME_6G + RTW89_DWELL_TIME_6G;
6647 else
6648 ch_info->period = RTW89_CHANNEL_TIME;
6649
6650 ch_info->ch_band = rtw89_nl80211_to_hw_band(channel->band);
6651 ch_info->central_ch = channel->hw_value;
6652 ch_info->pri_ch = channel->hw_value;
6653 ch_info->rand_seq_num = random_seq;
6654 ch_info->is_psc = cfg80211_channel_is_psc(channel);
6655
6656 if (channel->flags & (IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR))
6657 type = RTW89_CHAN_DFS;
6658 else
6659 type = RTW89_CHAN_ACTIVE;
6660 rtw89_hw_scan_add_chan_be(rtwdev, type, req->n_ssids, ch_info);
6661
6662 list_add_tail(&ch_info->list, &chan_list);
6663 }
6664
6665 rtwdev->scan_info.last_chan_idx = idx;
6666 ret = rtw89_fw_h2c_scan_list_offload_be(rtwdev, list_len, &chan_list);
6667
6668 out:
6669 list_for_each_entry_safe(ch_info, tmp, &chan_list, list) {
6670 list_del(&ch_info->list);
6671 kfree(ch_info);
6672 }
6673
6674 return ret;
6675 }
6676
rtw89_hw_scan_prehandle(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool connected)6677 static int rtw89_hw_scan_prehandle(struct rtw89_dev *rtwdev,
6678 struct rtw89_vif_link *rtwvif_link, bool connected)
6679 {
6680 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
6681 int ret;
6682
6683 ret = rtw89_hw_scan_update_probe_req(rtwdev, rtwvif_link);
6684 if (ret) {
6685 rtw89_err(rtwdev, "Update probe request failed\n");
6686 goto out;
6687 }
6688 ret = mac->add_chan_list(rtwdev, rtwvif_link, connected);
6689 out:
6690 return ret;
6691 }
6692
rtw89_hw_scan_start(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,struct ieee80211_scan_request * scan_req)6693 void rtw89_hw_scan_start(struct rtw89_dev *rtwdev,
6694 struct rtw89_vif_link *rtwvif_link,
6695 struct ieee80211_scan_request *scan_req)
6696 {
6697 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
6698 struct cfg80211_scan_request *req = &scan_req->req;
6699 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev,
6700 rtwvif_link->chanctx_idx);
6701 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif;
6702 u32 rx_fltr = rtwdev->hal.rx_fltr;
6703 u8 mac_addr[ETH_ALEN];
6704
6705 /* clone op and keep it during scan */
6706 rtwdev->scan_info.op_chan = *chan;
6707
6708 rtwdev->scan_info.scanning_vif = rtwvif_link;
6709 rtwdev->scan_info.last_chan_idx = 0;
6710 rtwdev->scan_info.abort = false;
6711 rtwvif->scan_ies = &scan_req->ies;
6712 rtwvif->scan_req = req;
6713 ieee80211_stop_queues(rtwdev->hw);
6714 rtw89_mac_port_cfg_rx_sync(rtwdev, rtwvif_link, false);
6715
6716 if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR)
6717 get_random_mask_addr(mac_addr, req->mac_addr,
6718 req->mac_addr_mask);
6719 else
6720 ether_addr_copy(mac_addr, rtwvif_link->mac_addr);
6721 rtw89_core_scan_start(rtwdev, rtwvif_link, mac_addr, true);
6722
6723 rx_fltr &= ~B_AX_A_BCN_CHK_EN;
6724 rx_fltr &= ~B_AX_A_BC;
6725 rx_fltr &= ~B_AX_A_A1_MATCH;
6726 rtw89_write32_mask(rtwdev,
6727 rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
6728 B_AX_RX_FLTR_CFG_MASK,
6729 rx_fltr);
6730
6731 rtw89_chanctx_pause(rtwdev, RTW89_CHANCTX_PAUSE_REASON_HW_SCAN);
6732 }
6733
6734 struct rtw89_hw_scan_complete_cb_data {
6735 struct rtw89_vif_link *rtwvif_link;
6736 bool aborted;
6737 };
6738
rtw89_hw_scan_complete_cb(struct rtw89_dev * rtwdev,void * data)6739 static int rtw89_hw_scan_complete_cb(struct rtw89_dev *rtwdev, void *data)
6740 {
6741 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
6742 struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info;
6743 struct rtw89_hw_scan_complete_cb_data *cb_data = data;
6744 struct rtw89_vif_link *rtwvif_link = cb_data->rtwvif_link;
6745 struct cfg80211_scan_info info = {
6746 .aborted = cb_data->aborted,
6747 };
6748 struct rtw89_vif *rtwvif;
6749
6750 if (!rtwvif_link)
6751 return -EINVAL;
6752
6753 rtwvif = rtwvif_link->rtwvif;
6754
6755 rtw89_write32_mask(rtwdev,
6756 rtw89_mac_reg_by_idx(rtwdev, mac->rx_fltr, RTW89_MAC_0),
6757 B_AX_RX_FLTR_CFG_MASK,
6758 rtwdev->hal.rx_fltr);
6759
6760 rtw89_core_scan_complete(rtwdev, rtwvif_link, true);
6761 ieee80211_scan_completed(rtwdev->hw, &info);
6762 ieee80211_wake_queues(rtwdev->hw);
6763 rtw89_mac_port_cfg_rx_sync(rtwdev, rtwvif_link, true);
6764 rtw89_mac_enable_beacon_for_ap_vifs(rtwdev, true);
6765
6766 rtw89_release_pkt_list(rtwdev);
6767 rtwvif->scan_req = NULL;
6768 rtwvif->scan_ies = NULL;
6769 scan_info->last_chan_idx = 0;
6770 scan_info->scanning_vif = NULL;
6771 scan_info->abort = false;
6772
6773 return 0;
6774 }
6775
rtw89_hw_scan_complete(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool aborted)6776 void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev,
6777 struct rtw89_vif_link *rtwvif_link,
6778 bool aborted)
6779 {
6780 struct rtw89_hw_scan_complete_cb_data cb_data = {
6781 .rtwvif_link = rtwvif_link,
6782 .aborted = aborted,
6783 };
6784 const struct rtw89_chanctx_cb_parm cb_parm = {
6785 .cb = rtw89_hw_scan_complete_cb,
6786 .data = &cb_data,
6787 .caller = __func__,
6788 };
6789
6790 /* The things here needs to be done after setting channel (for coex)
6791 * and before proceeding entity mode (for MCC). So, pass a callback
6792 * of them for the right sequence rather than doing them directly.
6793 */
6794 rtw89_chanctx_proceed(rtwdev, &cb_parm);
6795 }
6796
rtw89_hw_scan_abort(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link)6797 void rtw89_hw_scan_abort(struct rtw89_dev *rtwdev,
6798 struct rtw89_vif_link *rtwvif_link)
6799 {
6800 struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info;
6801 int ret;
6802
6803 scan_info->abort = true;
6804
6805 ret = rtw89_hw_scan_offload(rtwdev, rtwvif_link, false);
6806 if (ret)
6807 rtw89_warn(rtwdev, "rtw89_hw_scan_offload failed ret %d\n", ret);
6808
6809 /* Indicate ieee80211_scan_completed() before returning, which is safe
6810 * because scan abort command always waits for completion of
6811 * RTW89_SCAN_END_SCAN_NOTIFY, so that ieee80211_stop() can flush scan
6812 * work properly.
6813 */
6814 rtw89_hw_scan_complete(rtwdev, rtwvif_link, true);
6815 }
6816
rtw89_is_any_vif_connected_or_connecting(struct rtw89_dev * rtwdev)6817 static bool rtw89_is_any_vif_connected_or_connecting(struct rtw89_dev *rtwdev)
6818 {
6819 struct rtw89_vif_link *rtwvif_link;
6820 struct rtw89_vif *rtwvif;
6821 unsigned int link_id;
6822
6823 rtw89_for_each_rtwvif(rtwdev, rtwvif) {
6824 rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id) {
6825 /* This variable implies connected or during attempt to connect */
6826 if (!is_zero_ether_addr(rtwvif_link->bssid))
6827 return true;
6828 }
6829 }
6830
6831 return false;
6832 }
6833
rtw89_hw_scan_offload(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool enable)6834 int rtw89_hw_scan_offload(struct rtw89_dev *rtwdev,
6835 struct rtw89_vif_link *rtwvif_link,
6836 bool enable)
6837 {
6838 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
6839 struct rtw89_scan_option opt = {0};
6840 bool connected;
6841 int ret = 0;
6842
6843 if (!rtwvif_link)
6844 return -EINVAL;
6845
6846 connected = rtw89_is_any_vif_connected_or_connecting(rtwdev);
6847 opt.enable = enable;
6848 opt.target_ch_mode = connected;
6849 if (enable) {
6850 ret = rtw89_hw_scan_prehandle(rtwdev, rtwvif_link, connected);
6851 if (ret)
6852 goto out;
6853 }
6854
6855 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) {
6856 opt.operation = enable ? RTW89_SCAN_OP_START : RTW89_SCAN_OP_STOP;
6857 opt.scan_mode = RTW89_SCAN_MODE_SA;
6858 opt.band = RTW89_PHY_0;
6859 opt.num_macc_role = 0;
6860 opt.mlo_mode = rtwdev->mlo_dbcc_mode;
6861 opt.num_opch = connected ? 1 : 0;
6862 opt.opch_end = connected ? 0 : RTW89_CHAN_INVALID;
6863 }
6864
6865 ret = mac->scan_offload(rtwdev, &opt, rtwvif_link, false);
6866 out:
6867 return ret;
6868 }
6869
6870 #define H2C_FW_CPU_EXCEPTION_LEN 4
6871 #define H2C_FW_CPU_EXCEPTION_TYPE_DEF 0x5566
rtw89_fw_h2c_trigger_cpu_exception(struct rtw89_dev * rtwdev)6872 int rtw89_fw_h2c_trigger_cpu_exception(struct rtw89_dev *rtwdev)
6873 {
6874 struct sk_buff *skb;
6875 int ret;
6876
6877 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_FW_CPU_EXCEPTION_LEN);
6878 if (!skb) {
6879 rtw89_err(rtwdev,
6880 "failed to alloc skb for fw cpu exception\n");
6881 return -ENOMEM;
6882 }
6883
6884 skb_put(skb, H2C_FW_CPU_EXCEPTION_LEN);
6885 RTW89_SET_FWCMD_CPU_EXCEPTION_TYPE(skb->data,
6886 H2C_FW_CPU_EXCEPTION_TYPE_DEF);
6887
6888 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
6889 H2C_CAT_TEST,
6890 H2C_CL_FW_STATUS_TEST,
6891 H2C_FUNC_CPU_EXCEPTION, 0, 0,
6892 H2C_FW_CPU_EXCEPTION_LEN);
6893
6894 ret = rtw89_h2c_tx(rtwdev, skb, false);
6895 if (ret) {
6896 rtw89_err(rtwdev, "failed to send h2c\n");
6897 goto fail;
6898 }
6899
6900 return 0;
6901
6902 fail:
6903 dev_kfree_skb_any(skb);
6904 return ret;
6905 }
6906
6907 #define H2C_PKT_DROP_LEN 24
rtw89_fw_h2c_pkt_drop(struct rtw89_dev * rtwdev,const struct rtw89_pkt_drop_params * params)6908 int rtw89_fw_h2c_pkt_drop(struct rtw89_dev *rtwdev,
6909 const struct rtw89_pkt_drop_params *params)
6910 {
6911 struct sk_buff *skb;
6912 int ret;
6913
6914 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_PKT_DROP_LEN);
6915 if (!skb) {
6916 rtw89_err(rtwdev,
6917 "failed to alloc skb for packet drop\n");
6918 return -ENOMEM;
6919 }
6920
6921 switch (params->sel) {
6922 case RTW89_PKT_DROP_SEL_MACID_BE_ONCE:
6923 case RTW89_PKT_DROP_SEL_MACID_BK_ONCE:
6924 case RTW89_PKT_DROP_SEL_MACID_VI_ONCE:
6925 case RTW89_PKT_DROP_SEL_MACID_VO_ONCE:
6926 case RTW89_PKT_DROP_SEL_BAND_ONCE:
6927 break;
6928 default:
6929 rtw89_debug(rtwdev, RTW89_DBG_FW,
6930 "H2C of pkt drop might not fully support sel: %d yet\n",
6931 params->sel);
6932 break;
6933 }
6934
6935 skb_put(skb, H2C_PKT_DROP_LEN);
6936 RTW89_SET_FWCMD_PKT_DROP_SEL(skb->data, params->sel);
6937 RTW89_SET_FWCMD_PKT_DROP_MACID(skb->data, params->macid);
6938 RTW89_SET_FWCMD_PKT_DROP_BAND(skb->data, params->mac_band);
6939 RTW89_SET_FWCMD_PKT_DROP_PORT(skb->data, params->port);
6940 RTW89_SET_FWCMD_PKT_DROP_MBSSID(skb->data, params->mbssid);
6941 RTW89_SET_FWCMD_PKT_DROP_ROLE_A_INFO_TF_TRS(skb->data, params->tf_trs);
6942 RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_0(skb->data,
6943 params->macid_band_sel[0]);
6944 RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_1(skb->data,
6945 params->macid_band_sel[1]);
6946 RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_2(skb->data,
6947 params->macid_band_sel[2]);
6948 RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_3(skb->data,
6949 params->macid_band_sel[3]);
6950
6951 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
6952 H2C_CAT_MAC,
6953 H2C_CL_MAC_FW_OFLD,
6954 H2C_FUNC_PKT_DROP, 0, 0,
6955 H2C_PKT_DROP_LEN);
6956
6957 ret = rtw89_h2c_tx(rtwdev, skb, false);
6958 if (ret) {
6959 rtw89_err(rtwdev, "failed to send h2c\n");
6960 goto fail;
6961 }
6962
6963 return 0;
6964
6965 fail:
6966 dev_kfree_skb_any(skb);
6967 return ret;
6968 }
6969
6970 #define H2C_KEEP_ALIVE_LEN 4
rtw89_fw_h2c_keep_alive(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool enable)6971 int rtw89_fw_h2c_keep_alive(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
6972 bool enable)
6973 {
6974 struct sk_buff *skb;
6975 u8 pkt_id = 0;
6976 int ret;
6977
6978 if (enable) {
6979 ret = rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif_link,
6980 RTW89_PKT_OFLD_TYPE_NULL_DATA,
6981 &pkt_id);
6982 if (ret)
6983 return -EPERM;
6984 }
6985
6986 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_KEEP_ALIVE_LEN);
6987 if (!skb) {
6988 rtw89_err(rtwdev, "failed to alloc skb for keep alive\n");
6989 return -ENOMEM;
6990 }
6991
6992 skb_put(skb, H2C_KEEP_ALIVE_LEN);
6993
6994 RTW89_SET_KEEP_ALIVE_ENABLE(skb->data, enable);
6995 RTW89_SET_KEEP_ALIVE_PKT_NULL_ID(skb->data, pkt_id);
6996 RTW89_SET_KEEP_ALIVE_PERIOD(skb->data, 5);
6997 RTW89_SET_KEEP_ALIVE_MACID(skb->data, rtwvif_link->mac_id);
6998
6999 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7000 H2C_CAT_MAC,
7001 H2C_CL_MAC_WOW,
7002 H2C_FUNC_KEEP_ALIVE, 0, 1,
7003 H2C_KEEP_ALIVE_LEN);
7004
7005 ret = rtw89_h2c_tx(rtwdev, skb, false);
7006 if (ret) {
7007 rtw89_err(rtwdev, "failed to send h2c\n");
7008 goto fail;
7009 }
7010
7011 return 0;
7012
7013 fail:
7014 dev_kfree_skb_any(skb);
7015
7016 return ret;
7017 }
7018
rtw89_fw_h2c_arp_offload(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool enable)7019 int rtw89_fw_h2c_arp_offload(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
7020 bool enable)
7021 {
7022 struct rtw89_h2c_arp_offload *h2c;
7023 u32 len = sizeof(*h2c);
7024 struct sk_buff *skb;
7025 u8 pkt_id = 0;
7026 int ret;
7027
7028 if (enable) {
7029 ret = rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif_link,
7030 RTW89_PKT_OFLD_TYPE_ARP_RSP,
7031 &pkt_id);
7032 if (ret)
7033 return ret;
7034 }
7035
7036 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
7037 if (!skb) {
7038 rtw89_err(rtwdev, "failed to alloc skb for arp offload\n");
7039 return -ENOMEM;
7040 }
7041
7042 skb_put(skb, len);
7043 h2c = (struct rtw89_h2c_arp_offload *)skb->data;
7044
7045 h2c->w0 = le32_encode_bits(enable, RTW89_H2C_ARP_OFFLOAD_W0_ENABLE) |
7046 le32_encode_bits(0, RTW89_H2C_ARP_OFFLOAD_W0_ACTION) |
7047 le32_encode_bits(rtwvif_link->mac_id, RTW89_H2C_ARP_OFFLOAD_W0_MACID) |
7048 le32_encode_bits(pkt_id, RTW89_H2C_ARP_OFFLOAD_W0_PKT_ID);
7049
7050 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7051 H2C_CAT_MAC,
7052 H2C_CL_MAC_WOW,
7053 H2C_FUNC_ARP_OFLD, 0, 1,
7054 len);
7055
7056 ret = rtw89_h2c_tx(rtwdev, skb, false);
7057 if (ret) {
7058 rtw89_err(rtwdev, "failed to send h2c\n");
7059 goto fail;
7060 }
7061
7062 return 0;
7063
7064 fail:
7065 dev_kfree_skb_any(skb);
7066
7067 return ret;
7068 }
7069
7070 #define H2C_DISCONNECT_DETECT_LEN 8
rtw89_fw_h2c_disconnect_detect(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool enable)7071 int rtw89_fw_h2c_disconnect_detect(struct rtw89_dev *rtwdev,
7072 struct rtw89_vif_link *rtwvif_link, bool enable)
7073 {
7074 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
7075 struct sk_buff *skb;
7076 u8 macid = rtwvif_link->mac_id;
7077 int ret;
7078
7079 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_DISCONNECT_DETECT_LEN);
7080 if (!skb) {
7081 rtw89_err(rtwdev, "failed to alloc skb for keep alive\n");
7082 return -ENOMEM;
7083 }
7084
7085 skb_put(skb, H2C_DISCONNECT_DETECT_LEN);
7086
7087 if (test_bit(RTW89_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags)) {
7088 RTW89_SET_DISCONNECT_DETECT_ENABLE(skb->data, enable);
7089 RTW89_SET_DISCONNECT_DETECT_DISCONNECT(skb->data, !enable);
7090 RTW89_SET_DISCONNECT_DETECT_MAC_ID(skb->data, macid);
7091 RTW89_SET_DISCONNECT_DETECT_CHECK_PERIOD(skb->data, 100);
7092 RTW89_SET_DISCONNECT_DETECT_TRY_PKT_COUNT(skb->data, 5);
7093 }
7094
7095 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7096 H2C_CAT_MAC,
7097 H2C_CL_MAC_WOW,
7098 H2C_FUNC_DISCONNECT_DETECT, 0, 1,
7099 H2C_DISCONNECT_DETECT_LEN);
7100
7101 ret = rtw89_h2c_tx(rtwdev, skb, false);
7102 if (ret) {
7103 rtw89_err(rtwdev, "failed to send h2c\n");
7104 goto fail;
7105 }
7106
7107 return 0;
7108
7109 fail:
7110 dev_kfree_skb_any(skb);
7111
7112 return ret;
7113 }
7114
rtw89_fw_h2c_cfg_pno(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool enable)7115 int rtw89_fw_h2c_cfg_pno(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
7116 bool enable)
7117 {
7118 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
7119 struct cfg80211_sched_scan_request *nd_config = rtw_wow->nd_config;
7120 struct rtw89_h2c_cfg_nlo *h2c;
7121 u32 len = sizeof(*h2c);
7122 struct sk_buff *skb;
7123 int ret, i;
7124
7125 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
7126 if (!skb) {
7127 rtw89_err(rtwdev, "failed to alloc skb for nlo\n");
7128 return -ENOMEM;
7129 }
7130
7131 skb_put(skb, len);
7132 h2c = (struct rtw89_h2c_cfg_nlo *)skb->data;
7133
7134 h2c->w0 = le32_encode_bits(enable, RTW89_H2C_NLO_W0_ENABLE) |
7135 le32_encode_bits(enable, RTW89_H2C_NLO_W0_IGNORE_CIPHER) |
7136 le32_encode_bits(rtwvif_link->mac_id, RTW89_H2C_NLO_W0_MACID);
7137
7138 if (enable) {
7139 h2c->nlo_cnt = nd_config->n_match_sets;
7140 for (i = 0 ; i < nd_config->n_match_sets; i++) {
7141 h2c->ssid_len[i] = nd_config->match_sets[i].ssid.ssid_len;
7142 memcpy(h2c->ssid[i], nd_config->match_sets[i].ssid.ssid,
7143 nd_config->match_sets[i].ssid.ssid_len);
7144 }
7145 }
7146
7147 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7148 H2C_CAT_MAC,
7149 H2C_CL_MAC_WOW,
7150 H2C_FUNC_NLO, 0, 1,
7151 len);
7152
7153 ret = rtw89_h2c_tx(rtwdev, skb, false);
7154 if (ret) {
7155 rtw89_err(rtwdev, "failed to send h2c\n");
7156 goto fail;
7157 }
7158
7159 return 0;
7160
7161 fail:
7162 dev_kfree_skb_any(skb);
7163 return ret;
7164 }
7165
rtw89_fw_h2c_wow_global(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool enable)7166 int rtw89_fw_h2c_wow_global(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
7167 bool enable)
7168 {
7169 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
7170 struct rtw89_h2c_wow_global *h2c;
7171 u8 macid = rtwvif_link->mac_id;
7172 u32 len = sizeof(*h2c);
7173 struct sk_buff *skb;
7174 int ret;
7175
7176 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
7177 if (!skb) {
7178 rtw89_err(rtwdev, "failed to alloc skb for wow global\n");
7179 return -ENOMEM;
7180 }
7181
7182 skb_put(skb, len);
7183 h2c = (struct rtw89_h2c_wow_global *)skb->data;
7184
7185 h2c->w0 = le32_encode_bits(enable, RTW89_H2C_WOW_GLOBAL_W0_ENABLE) |
7186 le32_encode_bits(macid, RTW89_H2C_WOW_GLOBAL_W0_MAC_ID) |
7187 le32_encode_bits(rtw_wow->ptk_alg,
7188 RTW89_H2C_WOW_GLOBAL_W0_PAIRWISE_SEC_ALGO) |
7189 le32_encode_bits(rtw_wow->gtk_alg,
7190 RTW89_H2C_WOW_GLOBAL_W0_GROUP_SEC_ALGO);
7191 h2c->key_info = rtw_wow->key_info;
7192
7193 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7194 H2C_CAT_MAC,
7195 H2C_CL_MAC_WOW,
7196 H2C_FUNC_WOW_GLOBAL, 0, 1,
7197 len);
7198
7199 ret = rtw89_h2c_tx(rtwdev, skb, false);
7200 if (ret) {
7201 rtw89_err(rtwdev, "failed to send h2c\n");
7202 goto fail;
7203 }
7204
7205 return 0;
7206
7207 fail:
7208 dev_kfree_skb_any(skb);
7209
7210 return ret;
7211 }
7212
7213 #define H2C_WAKEUP_CTRL_LEN 4
rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool enable)7214 int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev,
7215 struct rtw89_vif_link *rtwvif_link,
7216 bool enable)
7217 {
7218 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
7219 struct sk_buff *skb;
7220 u8 macid = rtwvif_link->mac_id;
7221 int ret;
7222
7223 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_WAKEUP_CTRL_LEN);
7224 if (!skb) {
7225 rtw89_err(rtwdev, "failed to alloc skb for wakeup ctrl\n");
7226 return -ENOMEM;
7227 }
7228
7229 skb_put(skb, H2C_WAKEUP_CTRL_LEN);
7230
7231 if (rtw_wow->pattern_cnt)
7232 RTW89_SET_WOW_WAKEUP_CTRL_PATTERN_MATCH_ENABLE(skb->data, enable);
7233 if (test_bit(RTW89_WOW_FLAG_EN_MAGIC_PKT, rtw_wow->flags))
7234 RTW89_SET_WOW_WAKEUP_CTRL_MAGIC_ENABLE(skb->data, enable);
7235 if (test_bit(RTW89_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags))
7236 RTW89_SET_WOW_WAKEUP_CTRL_DEAUTH_ENABLE(skb->data, enable);
7237
7238 RTW89_SET_WOW_WAKEUP_CTRL_MAC_ID(skb->data, macid);
7239
7240 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7241 H2C_CAT_MAC,
7242 H2C_CL_MAC_WOW,
7243 H2C_FUNC_WAKEUP_CTRL, 0, 1,
7244 H2C_WAKEUP_CTRL_LEN);
7245
7246 ret = rtw89_h2c_tx(rtwdev, skb, false);
7247 if (ret) {
7248 rtw89_err(rtwdev, "failed to send h2c\n");
7249 goto fail;
7250 }
7251
7252 return 0;
7253
7254 fail:
7255 dev_kfree_skb_any(skb);
7256
7257 return ret;
7258 }
7259
7260 #define H2C_WOW_CAM_UPD_LEN 24
rtw89_fw_wow_cam_update(struct rtw89_dev * rtwdev,struct rtw89_wow_cam_info * cam_info)7261 int rtw89_fw_wow_cam_update(struct rtw89_dev *rtwdev,
7262 struct rtw89_wow_cam_info *cam_info)
7263 {
7264 struct sk_buff *skb;
7265 int ret;
7266
7267 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_WOW_CAM_UPD_LEN);
7268 if (!skb) {
7269 rtw89_err(rtwdev, "failed to alloc skb for keep alive\n");
7270 return -ENOMEM;
7271 }
7272
7273 skb_put(skb, H2C_WOW_CAM_UPD_LEN);
7274
7275 RTW89_SET_WOW_CAM_UPD_R_W(skb->data, cam_info->r_w);
7276 RTW89_SET_WOW_CAM_UPD_IDX(skb->data, cam_info->idx);
7277 if (cam_info->valid) {
7278 RTW89_SET_WOW_CAM_UPD_WKFM1(skb->data, cam_info->mask[0]);
7279 RTW89_SET_WOW_CAM_UPD_WKFM2(skb->data, cam_info->mask[1]);
7280 RTW89_SET_WOW_CAM_UPD_WKFM3(skb->data, cam_info->mask[2]);
7281 RTW89_SET_WOW_CAM_UPD_WKFM4(skb->data, cam_info->mask[3]);
7282 RTW89_SET_WOW_CAM_UPD_CRC(skb->data, cam_info->crc);
7283 RTW89_SET_WOW_CAM_UPD_NEGATIVE_PATTERN_MATCH(skb->data,
7284 cam_info->negative_pattern_match);
7285 RTW89_SET_WOW_CAM_UPD_SKIP_MAC_HDR(skb->data,
7286 cam_info->skip_mac_hdr);
7287 RTW89_SET_WOW_CAM_UPD_UC(skb->data, cam_info->uc);
7288 RTW89_SET_WOW_CAM_UPD_MC(skb->data, cam_info->mc);
7289 RTW89_SET_WOW_CAM_UPD_BC(skb->data, cam_info->bc);
7290 }
7291 RTW89_SET_WOW_CAM_UPD_VALID(skb->data, cam_info->valid);
7292
7293 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7294 H2C_CAT_MAC,
7295 H2C_CL_MAC_WOW,
7296 H2C_FUNC_WOW_CAM_UPD, 0, 1,
7297 H2C_WOW_CAM_UPD_LEN);
7298
7299 ret = rtw89_h2c_tx(rtwdev, skb, false);
7300 if (ret) {
7301 rtw89_err(rtwdev, "failed to send h2c\n");
7302 goto fail;
7303 }
7304
7305 return 0;
7306 fail:
7307 dev_kfree_skb_any(skb);
7308
7309 return ret;
7310 }
7311
rtw89_fw_h2c_wow_gtk_ofld(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool enable)7312 int rtw89_fw_h2c_wow_gtk_ofld(struct rtw89_dev *rtwdev,
7313 struct rtw89_vif_link *rtwvif_link,
7314 bool enable)
7315 {
7316 struct rtw89_wow_param *rtw_wow = &rtwdev->wow;
7317 struct rtw89_wow_gtk_info *gtk_info = &rtw_wow->gtk_info;
7318 struct rtw89_h2c_wow_gtk_ofld *h2c;
7319 u8 macid = rtwvif_link->mac_id;
7320 u32 len = sizeof(*h2c);
7321 u8 pkt_id_sa_query = 0;
7322 struct sk_buff *skb;
7323 u8 pkt_id_eapol = 0;
7324 int ret;
7325
7326 if (!rtw_wow->gtk_alg)
7327 return 0;
7328
7329 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
7330 if (!skb) {
7331 rtw89_err(rtwdev, "failed to alloc skb for gtk ofld\n");
7332 return -ENOMEM;
7333 }
7334
7335 skb_put(skb, len);
7336 h2c = (struct rtw89_h2c_wow_gtk_ofld *)skb->data;
7337
7338 if (!enable)
7339 goto hdr;
7340
7341 ret = rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif_link,
7342 RTW89_PKT_OFLD_TYPE_EAPOL_KEY,
7343 &pkt_id_eapol);
7344 if (ret)
7345 goto fail;
7346
7347 if (gtk_info->igtk_keyid) {
7348 ret = rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif_link,
7349 RTW89_PKT_OFLD_TYPE_SA_QUERY,
7350 &pkt_id_sa_query);
7351 if (ret)
7352 goto fail;
7353 }
7354
7355 /* not support TKIP yet */
7356 h2c->w0 = le32_encode_bits(enable, RTW89_H2C_WOW_GTK_OFLD_W0_EN) |
7357 le32_encode_bits(0, RTW89_H2C_WOW_GTK_OFLD_W0_TKIP_EN) |
7358 le32_encode_bits(gtk_info->igtk_keyid ? 1 : 0,
7359 RTW89_H2C_WOW_GTK_OFLD_W0_IEEE80211W_EN) |
7360 le32_encode_bits(macid, RTW89_H2C_WOW_GTK_OFLD_W0_MAC_ID) |
7361 le32_encode_bits(pkt_id_eapol, RTW89_H2C_WOW_GTK_OFLD_W0_GTK_RSP_ID);
7362 h2c->w1 = le32_encode_bits(gtk_info->igtk_keyid ? pkt_id_sa_query : 0,
7363 RTW89_H2C_WOW_GTK_OFLD_W1_PMF_SA_QUERY_ID) |
7364 le32_encode_bits(rtw_wow->akm, RTW89_H2C_WOW_GTK_OFLD_W1_ALGO_AKM_SUIT);
7365 h2c->gtk_info = rtw_wow->gtk_info;
7366
7367 hdr:
7368 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7369 H2C_CAT_MAC,
7370 H2C_CL_MAC_WOW,
7371 H2C_FUNC_GTK_OFLD, 0, 1,
7372 len);
7373
7374 ret = rtw89_h2c_tx(rtwdev, skb, false);
7375 if (ret) {
7376 rtw89_err(rtwdev, "failed to send h2c\n");
7377 goto fail;
7378 }
7379 return 0;
7380 fail:
7381 dev_kfree_skb_any(skb);
7382
7383 return ret;
7384 }
7385
rtw89_fw_h2c_fwips(struct rtw89_dev * rtwdev,struct rtw89_vif_link * rtwvif_link,bool enable)7386 int rtw89_fw_h2c_fwips(struct rtw89_dev *rtwdev, struct rtw89_vif_link *rtwvif_link,
7387 bool enable)
7388 {
7389 struct rtw89_wait_info *wait = &rtwdev->mac.ps_wait;
7390 struct rtw89_h2c_fwips *h2c;
7391 u32 len = sizeof(*h2c);
7392 struct sk_buff *skb;
7393
7394 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
7395 if (!skb) {
7396 rtw89_err(rtwdev, "failed to alloc skb for fw ips\n");
7397 return -ENOMEM;
7398 }
7399 skb_put(skb, len);
7400 h2c = (struct rtw89_h2c_fwips *)skb->data;
7401
7402 h2c->w0 = le32_encode_bits(rtwvif_link->mac_id, RTW89_H2C_FW_IPS_W0_MACID) |
7403 le32_encode_bits(enable, RTW89_H2C_FW_IPS_W0_ENABLE);
7404
7405 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7406 H2C_CAT_MAC,
7407 H2C_CL_MAC_PS,
7408 H2C_FUNC_IPS_CFG, 0, 1,
7409 len);
7410
7411 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, RTW89_PS_WAIT_COND_IPS_CFG);
7412 }
7413
rtw89_fw_h2c_wow_request_aoac(struct rtw89_dev * rtwdev)7414 int rtw89_fw_h2c_wow_request_aoac(struct rtw89_dev *rtwdev)
7415 {
7416 struct rtw89_wait_info *wait = &rtwdev->wow.wait;
7417 struct rtw89_h2c_wow_aoac *h2c;
7418 u32 len = sizeof(*h2c);
7419 struct sk_buff *skb;
7420
7421 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
7422 if (!skb) {
7423 rtw89_err(rtwdev, "failed to alloc skb for aoac\n");
7424 return -ENOMEM;
7425 }
7426
7427 skb_put(skb, len);
7428
7429 /* This H2C only nofity firmware to generate AOAC report C2H,
7430 * no need any parameter.
7431 */
7432 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7433 H2C_CAT_MAC,
7434 H2C_CL_MAC_WOW,
7435 H2C_FUNC_AOAC_REPORT_REQ, 1, 0,
7436 len);
7437
7438 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, RTW89_WOW_WAIT_COND_AOAC);
7439 }
7440
7441 /* Return < 0, if failures happen during waiting for the condition.
7442 * Return 0, when waiting for the condition succeeds.
7443 * Return > 0, if the wait is considered unreachable due to driver/FW design,
7444 * where 1 means during SER.
7445 */
rtw89_h2c_tx_and_wait(struct rtw89_dev * rtwdev,struct sk_buff * skb,struct rtw89_wait_info * wait,unsigned int cond)7446 static int rtw89_h2c_tx_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb,
7447 struct rtw89_wait_info *wait, unsigned int cond)
7448 {
7449 int ret;
7450
7451 ret = rtw89_h2c_tx(rtwdev, skb, false);
7452 if (ret) {
7453 rtw89_err(rtwdev, "failed to send h2c\n");
7454 dev_kfree_skb_any(skb);
7455 return -EBUSY;
7456 }
7457
7458 if (test_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags))
7459 return 1;
7460
7461 return rtw89_wait_for_cond(wait, cond);
7462 }
7463
7464 #define H2C_ADD_MCC_LEN 16
rtw89_fw_h2c_add_mcc(struct rtw89_dev * rtwdev,const struct rtw89_fw_mcc_add_req * p)7465 int rtw89_fw_h2c_add_mcc(struct rtw89_dev *rtwdev,
7466 const struct rtw89_fw_mcc_add_req *p)
7467 {
7468 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7469 struct sk_buff *skb;
7470 unsigned int cond;
7471
7472 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_ADD_MCC_LEN);
7473 if (!skb) {
7474 rtw89_err(rtwdev,
7475 "failed to alloc skb for add mcc\n");
7476 return -ENOMEM;
7477 }
7478
7479 skb_put(skb, H2C_ADD_MCC_LEN);
7480 RTW89_SET_FWCMD_ADD_MCC_MACID(skb->data, p->macid);
7481 RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG0(skb->data, p->central_ch_seg0);
7482 RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG1(skb->data, p->central_ch_seg1);
7483 RTW89_SET_FWCMD_ADD_MCC_PRIMARY_CH(skb->data, p->primary_ch);
7484 RTW89_SET_FWCMD_ADD_MCC_BANDWIDTH(skb->data, p->bandwidth);
7485 RTW89_SET_FWCMD_ADD_MCC_GROUP(skb->data, p->group);
7486 RTW89_SET_FWCMD_ADD_MCC_C2H_RPT(skb->data, p->c2h_rpt);
7487 RTW89_SET_FWCMD_ADD_MCC_DIS_TX_NULL(skb->data, p->dis_tx_null);
7488 RTW89_SET_FWCMD_ADD_MCC_DIS_SW_RETRY(skb->data, p->dis_sw_retry);
7489 RTW89_SET_FWCMD_ADD_MCC_IN_CURR_CH(skb->data, p->in_curr_ch);
7490 RTW89_SET_FWCMD_ADD_MCC_SW_RETRY_COUNT(skb->data, p->sw_retry_count);
7491 RTW89_SET_FWCMD_ADD_MCC_TX_NULL_EARLY(skb->data, p->tx_null_early);
7492 RTW89_SET_FWCMD_ADD_MCC_BTC_IN_2G(skb->data, p->btc_in_2g);
7493 RTW89_SET_FWCMD_ADD_MCC_PTA_EN(skb->data, p->pta_en);
7494 RTW89_SET_FWCMD_ADD_MCC_RFK_BY_PASS(skb->data, p->rfk_by_pass);
7495 RTW89_SET_FWCMD_ADD_MCC_CH_BAND_TYPE(skb->data, p->ch_band_type);
7496 RTW89_SET_FWCMD_ADD_MCC_DURATION(skb->data, p->duration);
7497 RTW89_SET_FWCMD_ADD_MCC_COURTESY_EN(skb->data, p->courtesy_en);
7498 RTW89_SET_FWCMD_ADD_MCC_COURTESY_NUM(skb->data, p->courtesy_num);
7499 RTW89_SET_FWCMD_ADD_MCC_COURTESY_TARGET(skb->data, p->courtesy_target);
7500
7501 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7502 H2C_CAT_MAC,
7503 H2C_CL_MCC,
7504 H2C_FUNC_ADD_MCC, 0, 0,
7505 H2C_ADD_MCC_LEN);
7506
7507 cond = RTW89_MCC_WAIT_COND(p->group, H2C_FUNC_ADD_MCC);
7508 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7509 }
7510
7511 #define H2C_START_MCC_LEN 12
rtw89_fw_h2c_start_mcc(struct rtw89_dev * rtwdev,const struct rtw89_fw_mcc_start_req * p)7512 int rtw89_fw_h2c_start_mcc(struct rtw89_dev *rtwdev,
7513 const struct rtw89_fw_mcc_start_req *p)
7514 {
7515 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7516 struct sk_buff *skb;
7517 unsigned int cond;
7518
7519 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_START_MCC_LEN);
7520 if (!skb) {
7521 rtw89_err(rtwdev,
7522 "failed to alloc skb for start mcc\n");
7523 return -ENOMEM;
7524 }
7525
7526 skb_put(skb, H2C_START_MCC_LEN);
7527 RTW89_SET_FWCMD_START_MCC_GROUP(skb->data, p->group);
7528 RTW89_SET_FWCMD_START_MCC_BTC_IN_GROUP(skb->data, p->btc_in_group);
7529 RTW89_SET_FWCMD_START_MCC_OLD_GROUP_ACTION(skb->data, p->old_group_action);
7530 RTW89_SET_FWCMD_START_MCC_OLD_GROUP(skb->data, p->old_group);
7531 RTW89_SET_FWCMD_START_MCC_NOTIFY_CNT(skb->data, p->notify_cnt);
7532 RTW89_SET_FWCMD_START_MCC_NOTIFY_RXDBG_EN(skb->data, p->notify_rxdbg_en);
7533 RTW89_SET_FWCMD_START_MCC_MACID(skb->data, p->macid);
7534 RTW89_SET_FWCMD_START_MCC_TSF_LOW(skb->data, p->tsf_low);
7535 RTW89_SET_FWCMD_START_MCC_TSF_HIGH(skb->data, p->tsf_high);
7536
7537 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7538 H2C_CAT_MAC,
7539 H2C_CL_MCC,
7540 H2C_FUNC_START_MCC, 0, 0,
7541 H2C_START_MCC_LEN);
7542
7543 cond = RTW89_MCC_WAIT_COND(p->group, H2C_FUNC_START_MCC);
7544 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7545 }
7546
7547 #define H2C_STOP_MCC_LEN 4
rtw89_fw_h2c_stop_mcc(struct rtw89_dev * rtwdev,u8 group,u8 macid,bool prev_groups)7548 int rtw89_fw_h2c_stop_mcc(struct rtw89_dev *rtwdev, u8 group, u8 macid,
7549 bool prev_groups)
7550 {
7551 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7552 struct sk_buff *skb;
7553 unsigned int cond;
7554
7555 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_STOP_MCC_LEN);
7556 if (!skb) {
7557 rtw89_err(rtwdev,
7558 "failed to alloc skb for stop mcc\n");
7559 return -ENOMEM;
7560 }
7561
7562 skb_put(skb, H2C_STOP_MCC_LEN);
7563 RTW89_SET_FWCMD_STOP_MCC_MACID(skb->data, macid);
7564 RTW89_SET_FWCMD_STOP_MCC_GROUP(skb->data, group);
7565 RTW89_SET_FWCMD_STOP_MCC_PREV_GROUPS(skb->data, prev_groups);
7566
7567 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7568 H2C_CAT_MAC,
7569 H2C_CL_MCC,
7570 H2C_FUNC_STOP_MCC, 0, 0,
7571 H2C_STOP_MCC_LEN);
7572
7573 cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_STOP_MCC);
7574 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7575 }
7576
7577 #define H2C_DEL_MCC_GROUP_LEN 4
rtw89_fw_h2c_del_mcc_group(struct rtw89_dev * rtwdev,u8 group,bool prev_groups)7578 int rtw89_fw_h2c_del_mcc_group(struct rtw89_dev *rtwdev, u8 group,
7579 bool prev_groups)
7580 {
7581 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7582 struct sk_buff *skb;
7583 unsigned int cond;
7584
7585 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_DEL_MCC_GROUP_LEN);
7586 if (!skb) {
7587 rtw89_err(rtwdev,
7588 "failed to alloc skb for del mcc group\n");
7589 return -ENOMEM;
7590 }
7591
7592 skb_put(skb, H2C_DEL_MCC_GROUP_LEN);
7593 RTW89_SET_FWCMD_DEL_MCC_GROUP_GROUP(skb->data, group);
7594 RTW89_SET_FWCMD_DEL_MCC_GROUP_PREV_GROUPS(skb->data, prev_groups);
7595
7596 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7597 H2C_CAT_MAC,
7598 H2C_CL_MCC,
7599 H2C_FUNC_DEL_MCC_GROUP, 0, 0,
7600 H2C_DEL_MCC_GROUP_LEN);
7601
7602 cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_DEL_MCC_GROUP);
7603 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7604 }
7605
7606 #define H2C_RESET_MCC_GROUP_LEN 4
rtw89_fw_h2c_reset_mcc_group(struct rtw89_dev * rtwdev,u8 group)7607 int rtw89_fw_h2c_reset_mcc_group(struct rtw89_dev *rtwdev, u8 group)
7608 {
7609 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7610 struct sk_buff *skb;
7611 unsigned int cond;
7612
7613 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_RESET_MCC_GROUP_LEN);
7614 if (!skb) {
7615 rtw89_err(rtwdev,
7616 "failed to alloc skb for reset mcc group\n");
7617 return -ENOMEM;
7618 }
7619
7620 skb_put(skb, H2C_RESET_MCC_GROUP_LEN);
7621 RTW89_SET_FWCMD_RESET_MCC_GROUP_GROUP(skb->data, group);
7622
7623 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7624 H2C_CAT_MAC,
7625 H2C_CL_MCC,
7626 H2C_FUNC_RESET_MCC_GROUP, 0, 0,
7627 H2C_RESET_MCC_GROUP_LEN);
7628
7629 cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_RESET_MCC_GROUP);
7630 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7631 }
7632
7633 #define H2C_MCC_REQ_TSF_LEN 4
rtw89_fw_h2c_mcc_req_tsf(struct rtw89_dev * rtwdev,const struct rtw89_fw_mcc_tsf_req * req,struct rtw89_mac_mcc_tsf_rpt * rpt)7634 int rtw89_fw_h2c_mcc_req_tsf(struct rtw89_dev *rtwdev,
7635 const struct rtw89_fw_mcc_tsf_req *req,
7636 struct rtw89_mac_mcc_tsf_rpt *rpt)
7637 {
7638 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7639 struct rtw89_mac_mcc_tsf_rpt *tmp;
7640 struct sk_buff *skb;
7641 unsigned int cond;
7642 int ret;
7643
7644 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_MCC_REQ_TSF_LEN);
7645 if (!skb) {
7646 rtw89_err(rtwdev,
7647 "failed to alloc skb for mcc req tsf\n");
7648 return -ENOMEM;
7649 }
7650
7651 skb_put(skb, H2C_MCC_REQ_TSF_LEN);
7652 RTW89_SET_FWCMD_MCC_REQ_TSF_GROUP(skb->data, req->group);
7653 RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_X(skb->data, req->macid_x);
7654 RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_Y(skb->data, req->macid_y);
7655
7656 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7657 H2C_CAT_MAC,
7658 H2C_CL_MCC,
7659 H2C_FUNC_MCC_REQ_TSF, 0, 0,
7660 H2C_MCC_REQ_TSF_LEN);
7661
7662 cond = RTW89_MCC_WAIT_COND(req->group, H2C_FUNC_MCC_REQ_TSF);
7663 ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7664 if (ret)
7665 return ret;
7666
7667 tmp = (struct rtw89_mac_mcc_tsf_rpt *)wait->data.buf;
7668 *rpt = *tmp;
7669
7670 return 0;
7671 }
7672
7673 #define H2C_MCC_MACID_BITMAP_DSC_LEN 4
rtw89_fw_h2c_mcc_macid_bitmap(struct rtw89_dev * rtwdev,u8 group,u8 macid,u8 * bitmap)7674 int rtw89_fw_h2c_mcc_macid_bitmap(struct rtw89_dev *rtwdev, u8 group, u8 macid,
7675 u8 *bitmap)
7676 {
7677 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7678 struct sk_buff *skb;
7679 unsigned int cond;
7680 u8 map_len;
7681 u8 h2c_len;
7682
7683 BUILD_BUG_ON(RTW89_MAX_MAC_ID_NUM % 8);
7684 map_len = RTW89_MAX_MAC_ID_NUM / 8;
7685 h2c_len = H2C_MCC_MACID_BITMAP_DSC_LEN + map_len;
7686 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, h2c_len);
7687 if (!skb) {
7688 rtw89_err(rtwdev,
7689 "failed to alloc skb for mcc macid bitmap\n");
7690 return -ENOMEM;
7691 }
7692
7693 skb_put(skb, h2c_len);
7694 RTW89_SET_FWCMD_MCC_MACID_BITMAP_GROUP(skb->data, group);
7695 RTW89_SET_FWCMD_MCC_MACID_BITMAP_MACID(skb->data, macid);
7696 RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP_LENGTH(skb->data, map_len);
7697 RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP(skb->data, bitmap, map_len);
7698
7699 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7700 H2C_CAT_MAC,
7701 H2C_CL_MCC,
7702 H2C_FUNC_MCC_MACID_BITMAP, 0, 0,
7703 h2c_len);
7704
7705 cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_MCC_MACID_BITMAP);
7706 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7707 }
7708
7709 #define H2C_MCC_SYNC_LEN 4
rtw89_fw_h2c_mcc_sync(struct rtw89_dev * rtwdev,u8 group,u8 source,u8 target,u8 offset)7710 int rtw89_fw_h2c_mcc_sync(struct rtw89_dev *rtwdev, u8 group, u8 source,
7711 u8 target, u8 offset)
7712 {
7713 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7714 struct sk_buff *skb;
7715 unsigned int cond;
7716
7717 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_MCC_SYNC_LEN);
7718 if (!skb) {
7719 rtw89_err(rtwdev,
7720 "failed to alloc skb for mcc sync\n");
7721 return -ENOMEM;
7722 }
7723
7724 skb_put(skb, H2C_MCC_SYNC_LEN);
7725 RTW89_SET_FWCMD_MCC_SYNC_GROUP(skb->data, group);
7726 RTW89_SET_FWCMD_MCC_SYNC_MACID_SOURCE(skb->data, source);
7727 RTW89_SET_FWCMD_MCC_SYNC_MACID_TARGET(skb->data, target);
7728 RTW89_SET_FWCMD_MCC_SYNC_SYNC_OFFSET(skb->data, offset);
7729
7730 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7731 H2C_CAT_MAC,
7732 H2C_CL_MCC,
7733 H2C_FUNC_MCC_SYNC, 0, 0,
7734 H2C_MCC_SYNC_LEN);
7735
7736 cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_MCC_SYNC);
7737 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7738 }
7739
7740 #define H2C_MCC_SET_DURATION_LEN 20
rtw89_fw_h2c_mcc_set_duration(struct rtw89_dev * rtwdev,const struct rtw89_fw_mcc_duration * p)7741 int rtw89_fw_h2c_mcc_set_duration(struct rtw89_dev *rtwdev,
7742 const struct rtw89_fw_mcc_duration *p)
7743 {
7744 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7745 struct sk_buff *skb;
7746 unsigned int cond;
7747
7748 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_MCC_SET_DURATION_LEN);
7749 if (!skb) {
7750 rtw89_err(rtwdev,
7751 "failed to alloc skb for mcc set duration\n");
7752 return -ENOMEM;
7753 }
7754
7755 skb_put(skb, H2C_MCC_SET_DURATION_LEN);
7756 RTW89_SET_FWCMD_MCC_SET_DURATION_GROUP(skb->data, p->group);
7757 RTW89_SET_FWCMD_MCC_SET_DURATION_BTC_IN_GROUP(skb->data, p->btc_in_group);
7758 RTW89_SET_FWCMD_MCC_SET_DURATION_START_MACID(skb->data, p->start_macid);
7759 RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_X(skb->data, p->macid_x);
7760 RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_Y(skb->data, p->macid_y);
7761 RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_LOW(skb->data,
7762 p->start_tsf_low);
7763 RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_HIGH(skb->data,
7764 p->start_tsf_high);
7765 RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_X(skb->data, p->duration_x);
7766 RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_Y(skb->data, p->duration_y);
7767
7768 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7769 H2C_CAT_MAC,
7770 H2C_CL_MCC,
7771 H2C_FUNC_MCC_SET_DURATION, 0, 0,
7772 H2C_MCC_SET_DURATION_LEN);
7773
7774 cond = RTW89_MCC_WAIT_COND(p->group, H2C_FUNC_MCC_SET_DURATION);
7775 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7776 }
7777
7778 static
rtw89_fw_h2c_mrc_add_slot(struct rtw89_dev * rtwdev,const struct rtw89_fw_mrc_add_slot_arg * slot_arg,struct rtw89_h2c_mrc_add_slot * slot_h2c)7779 u32 rtw89_fw_h2c_mrc_add_slot(struct rtw89_dev *rtwdev,
7780 const struct rtw89_fw_mrc_add_slot_arg *slot_arg,
7781 struct rtw89_h2c_mrc_add_slot *slot_h2c)
7782 {
7783 bool fill_h2c = !!slot_h2c;
7784 unsigned int i;
7785
7786 if (!fill_h2c)
7787 goto calc_len;
7788
7789 slot_h2c->w0 = le32_encode_bits(slot_arg->duration,
7790 RTW89_H2C_MRC_ADD_SLOT_W0_DURATION) |
7791 le32_encode_bits(slot_arg->courtesy_en,
7792 RTW89_H2C_MRC_ADD_SLOT_W0_COURTESY_EN) |
7793 le32_encode_bits(slot_arg->role_num,
7794 RTW89_H2C_MRC_ADD_SLOT_W0_ROLE_NUM);
7795 slot_h2c->w1 = le32_encode_bits(slot_arg->courtesy_period,
7796 RTW89_H2C_MRC_ADD_SLOT_W1_COURTESY_PERIOD) |
7797 le32_encode_bits(slot_arg->courtesy_target,
7798 RTW89_H2C_MRC_ADD_SLOT_W1_COURTESY_TARGET);
7799
7800 for (i = 0; i < slot_arg->role_num; i++) {
7801 slot_h2c->roles[i].w0 =
7802 le32_encode_bits(slot_arg->roles[i].macid,
7803 RTW89_H2C_MRC_ADD_ROLE_W0_MACID) |
7804 le32_encode_bits(slot_arg->roles[i].role_type,
7805 RTW89_H2C_MRC_ADD_ROLE_W0_ROLE_TYPE) |
7806 le32_encode_bits(slot_arg->roles[i].is_master,
7807 RTW89_H2C_MRC_ADD_ROLE_W0_IS_MASTER) |
7808 le32_encode_bits(slot_arg->roles[i].en_tx_null,
7809 RTW89_H2C_MRC_ADD_ROLE_W0_TX_NULL_EN) |
7810 le32_encode_bits(false,
7811 RTW89_H2C_MRC_ADD_ROLE_W0_IS_ALT_ROLE) |
7812 le32_encode_bits(false,
7813 RTW89_H2C_MRC_ADD_ROLE_W0_ROLE_ALT_EN);
7814 slot_h2c->roles[i].w1 =
7815 le32_encode_bits(slot_arg->roles[i].central_ch,
7816 RTW89_H2C_MRC_ADD_ROLE_W1_CENTRAL_CH_SEG) |
7817 le32_encode_bits(slot_arg->roles[i].primary_ch,
7818 RTW89_H2C_MRC_ADD_ROLE_W1_PRI_CH) |
7819 le32_encode_bits(slot_arg->roles[i].bw,
7820 RTW89_H2C_MRC_ADD_ROLE_W1_BW) |
7821 le32_encode_bits(slot_arg->roles[i].band,
7822 RTW89_H2C_MRC_ADD_ROLE_W1_CH_BAND_TYPE) |
7823 le32_encode_bits(slot_arg->roles[i].null_early,
7824 RTW89_H2C_MRC_ADD_ROLE_W1_NULL_EARLY) |
7825 le32_encode_bits(false,
7826 RTW89_H2C_MRC_ADD_ROLE_W1_RFK_BY_PASS) |
7827 le32_encode_bits(true,
7828 RTW89_H2C_MRC_ADD_ROLE_W1_CAN_BTC);
7829 slot_h2c->roles[i].macid_main_bitmap =
7830 cpu_to_le32(slot_arg->roles[i].macid_main_bitmap);
7831 slot_h2c->roles[i].macid_paired_bitmap =
7832 cpu_to_le32(slot_arg->roles[i].macid_paired_bitmap);
7833 }
7834
7835 calc_len:
7836 return struct_size(slot_h2c, roles, slot_arg->role_num);
7837 }
7838
rtw89_fw_h2c_mrc_add(struct rtw89_dev * rtwdev,const struct rtw89_fw_mrc_add_arg * arg)7839 int rtw89_fw_h2c_mrc_add(struct rtw89_dev *rtwdev,
7840 const struct rtw89_fw_mrc_add_arg *arg)
7841 {
7842 struct rtw89_h2c_mrc_add *h2c_head;
7843 struct sk_buff *skb;
7844 unsigned int i;
7845 void *tmp;
7846 u32 len;
7847 int ret;
7848
7849 len = sizeof(*h2c_head);
7850 for (i = 0; i < arg->slot_num; i++)
7851 len += rtw89_fw_h2c_mrc_add_slot(rtwdev, &arg->slots[i], NULL);
7852
7853 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
7854 if (!skb) {
7855 rtw89_err(rtwdev, "failed to alloc skb for mrc add\n");
7856 return -ENOMEM;
7857 }
7858
7859 skb_put(skb, len);
7860 tmp = skb->data;
7861
7862 h2c_head = tmp;
7863 h2c_head->w0 = le32_encode_bits(arg->sch_idx,
7864 RTW89_H2C_MRC_ADD_W0_SCH_IDX) |
7865 le32_encode_bits(arg->sch_type,
7866 RTW89_H2C_MRC_ADD_W0_SCH_TYPE) |
7867 le32_encode_bits(arg->slot_num,
7868 RTW89_H2C_MRC_ADD_W0_SLOT_NUM) |
7869 le32_encode_bits(arg->btc_in_sch,
7870 RTW89_H2C_MRC_ADD_W0_BTC_IN_SCH);
7871
7872 tmp += sizeof(*h2c_head);
7873 for (i = 0; i < arg->slot_num; i++)
7874 tmp += rtw89_fw_h2c_mrc_add_slot(rtwdev, &arg->slots[i], tmp);
7875
7876 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7877 H2C_CAT_MAC,
7878 H2C_CL_MRC,
7879 H2C_FUNC_ADD_MRC, 0, 0,
7880 len);
7881
7882 ret = rtw89_h2c_tx(rtwdev, skb, false);
7883 if (ret) {
7884 rtw89_err(rtwdev, "failed to send h2c\n");
7885 dev_kfree_skb_any(skb);
7886 return -EBUSY;
7887 }
7888
7889 return 0;
7890 }
7891
rtw89_fw_h2c_mrc_start(struct rtw89_dev * rtwdev,const struct rtw89_fw_mrc_start_arg * arg)7892 int rtw89_fw_h2c_mrc_start(struct rtw89_dev *rtwdev,
7893 const struct rtw89_fw_mrc_start_arg *arg)
7894 {
7895 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7896 struct rtw89_h2c_mrc_start *h2c;
7897 u32 len = sizeof(*h2c);
7898 struct sk_buff *skb;
7899 unsigned int cond;
7900
7901 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
7902 if (!skb) {
7903 rtw89_err(rtwdev, "failed to alloc skb for mrc start\n");
7904 return -ENOMEM;
7905 }
7906
7907 skb_put(skb, len);
7908 h2c = (struct rtw89_h2c_mrc_start *)skb->data;
7909
7910 h2c->w0 = le32_encode_bits(arg->sch_idx,
7911 RTW89_H2C_MRC_START_W0_SCH_IDX) |
7912 le32_encode_bits(arg->old_sch_idx,
7913 RTW89_H2C_MRC_START_W0_OLD_SCH_IDX) |
7914 le32_encode_bits(arg->action,
7915 RTW89_H2C_MRC_START_W0_ACTION);
7916
7917 h2c->start_tsf_high = cpu_to_le32(arg->start_tsf >> 32);
7918 h2c->start_tsf_low = cpu_to_le32(arg->start_tsf);
7919
7920 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7921 H2C_CAT_MAC,
7922 H2C_CL_MRC,
7923 H2C_FUNC_START_MRC, 0, 0,
7924 len);
7925
7926 cond = RTW89_MRC_WAIT_COND(arg->sch_idx, H2C_FUNC_START_MRC);
7927 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7928 }
7929
rtw89_fw_h2c_mrc_del(struct rtw89_dev * rtwdev,u8 sch_idx,u8 slot_idx)7930 int rtw89_fw_h2c_mrc_del(struct rtw89_dev *rtwdev, u8 sch_idx, u8 slot_idx)
7931 {
7932 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7933 struct rtw89_h2c_mrc_del *h2c;
7934 u32 len = sizeof(*h2c);
7935 struct sk_buff *skb;
7936 unsigned int cond;
7937
7938 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
7939 if (!skb) {
7940 rtw89_err(rtwdev, "failed to alloc skb for mrc del\n");
7941 return -ENOMEM;
7942 }
7943
7944 skb_put(skb, len);
7945 h2c = (struct rtw89_h2c_mrc_del *)skb->data;
7946
7947 h2c->w0 = le32_encode_bits(sch_idx, RTW89_H2C_MRC_DEL_W0_SCH_IDX) |
7948 le32_encode_bits(slot_idx, RTW89_H2C_MRC_DEL_W0_STOP_SLOT_IDX);
7949
7950 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7951 H2C_CAT_MAC,
7952 H2C_CL_MRC,
7953 H2C_FUNC_DEL_MRC, 0, 0,
7954 len);
7955
7956 cond = RTW89_MRC_WAIT_COND(sch_idx, H2C_FUNC_DEL_MRC);
7957 return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond);
7958 }
7959
rtw89_fw_h2c_mrc_req_tsf(struct rtw89_dev * rtwdev,const struct rtw89_fw_mrc_req_tsf_arg * arg,struct rtw89_mac_mrc_tsf_rpt * rpt)7960 int rtw89_fw_h2c_mrc_req_tsf(struct rtw89_dev *rtwdev,
7961 const struct rtw89_fw_mrc_req_tsf_arg *arg,
7962 struct rtw89_mac_mrc_tsf_rpt *rpt)
7963 {
7964 struct rtw89_wait_info *wait = &rtwdev->mcc.wait;
7965 struct rtw89_h2c_mrc_req_tsf *h2c;
7966 struct rtw89_mac_mrc_tsf_rpt *tmp;
7967 struct sk_buff *skb;
7968 unsigned int i;
7969 u32 len;
7970 int ret;
7971
7972 len = struct_size(h2c, infos, arg->num);
7973 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
7974 if (!skb) {
7975 rtw89_err(rtwdev, "failed to alloc skb for mrc req tsf\n");
7976 return -ENOMEM;
7977 }
7978
7979 skb_put(skb, len);
7980 h2c = (struct rtw89_h2c_mrc_req_tsf *)skb->data;
7981
7982 h2c->req_tsf_num = arg->num;
7983 for (i = 0; i < arg->num; i++)
7984 h2c->infos[i] =
7985 u8_encode_bits(arg->infos[i].band,
7986 RTW89_H2C_MRC_REQ_TSF_INFO_BAND) |
7987 u8_encode_bits(arg->infos[i].port,
7988 RTW89_H2C_MRC_REQ_TSF_INFO_PORT);
7989
7990 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
7991 H2C_CAT_MAC,
7992 H2C_CL_MRC,
7993 H2C_FUNC_MRC_REQ_TSF, 0, 0,
7994 len);
7995
7996 ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, RTW89_MRC_WAIT_COND_REQ_TSF);
7997 if (ret)
7998 return ret;
7999
8000 tmp = (struct rtw89_mac_mrc_tsf_rpt *)wait->data.buf;
8001 *rpt = *tmp;
8002
8003 return 0;
8004 }
8005
rtw89_fw_h2c_mrc_upd_bitmap(struct rtw89_dev * rtwdev,const struct rtw89_fw_mrc_upd_bitmap_arg * arg)8006 int rtw89_fw_h2c_mrc_upd_bitmap(struct rtw89_dev *rtwdev,
8007 const struct rtw89_fw_mrc_upd_bitmap_arg *arg)
8008 {
8009 struct rtw89_h2c_mrc_upd_bitmap *h2c;
8010 u32 len = sizeof(*h2c);
8011 struct sk_buff *skb;
8012 int ret;
8013
8014 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
8015 if (!skb) {
8016 rtw89_err(rtwdev, "failed to alloc skb for mrc upd bitmap\n");
8017 return -ENOMEM;
8018 }
8019
8020 skb_put(skb, len);
8021 h2c = (struct rtw89_h2c_mrc_upd_bitmap *)skb->data;
8022
8023 h2c->w0 = le32_encode_bits(arg->sch_idx,
8024 RTW89_H2C_MRC_UPD_BITMAP_W0_SCH_IDX) |
8025 le32_encode_bits(arg->action,
8026 RTW89_H2C_MRC_UPD_BITMAP_W0_ACTION) |
8027 le32_encode_bits(arg->macid,
8028 RTW89_H2C_MRC_UPD_BITMAP_W0_MACID);
8029 h2c->w1 = le32_encode_bits(arg->client_macid,
8030 RTW89_H2C_MRC_UPD_BITMAP_W1_CLIENT_MACID);
8031
8032 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
8033 H2C_CAT_MAC,
8034 H2C_CL_MRC,
8035 H2C_FUNC_MRC_UPD_BITMAP, 0, 0,
8036 len);
8037
8038 ret = rtw89_h2c_tx(rtwdev, skb, false);
8039 if (ret) {
8040 rtw89_err(rtwdev, "failed to send h2c\n");
8041 dev_kfree_skb_any(skb);
8042 return -EBUSY;
8043 }
8044
8045 return 0;
8046 }
8047
rtw89_fw_h2c_mrc_sync(struct rtw89_dev * rtwdev,const struct rtw89_fw_mrc_sync_arg * arg)8048 int rtw89_fw_h2c_mrc_sync(struct rtw89_dev *rtwdev,
8049 const struct rtw89_fw_mrc_sync_arg *arg)
8050 {
8051 struct rtw89_h2c_mrc_sync *h2c;
8052 u32 len = sizeof(*h2c);
8053 struct sk_buff *skb;
8054 int ret;
8055
8056 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
8057 if (!skb) {
8058 rtw89_err(rtwdev, "failed to alloc skb for mrc sync\n");
8059 return -ENOMEM;
8060 }
8061
8062 skb_put(skb, len);
8063 h2c = (struct rtw89_h2c_mrc_sync *)skb->data;
8064
8065 h2c->w0 = le32_encode_bits(true, RTW89_H2C_MRC_SYNC_W0_SYNC_EN) |
8066 le32_encode_bits(arg->src.port,
8067 RTW89_H2C_MRC_SYNC_W0_SRC_PORT) |
8068 le32_encode_bits(arg->src.band,
8069 RTW89_H2C_MRC_SYNC_W0_SRC_BAND) |
8070 le32_encode_bits(arg->dest.port,
8071 RTW89_H2C_MRC_SYNC_W0_DEST_PORT) |
8072 le32_encode_bits(arg->dest.band,
8073 RTW89_H2C_MRC_SYNC_W0_DEST_BAND);
8074 h2c->w1 = le32_encode_bits(arg->offset, RTW89_H2C_MRC_SYNC_W1_OFFSET);
8075
8076 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
8077 H2C_CAT_MAC,
8078 H2C_CL_MRC,
8079 H2C_FUNC_MRC_SYNC, 0, 0,
8080 len);
8081
8082 ret = rtw89_h2c_tx(rtwdev, skb, false);
8083 if (ret) {
8084 rtw89_err(rtwdev, "failed to send h2c\n");
8085 dev_kfree_skb_any(skb);
8086 return -EBUSY;
8087 }
8088
8089 return 0;
8090 }
8091
rtw89_fw_h2c_mrc_upd_duration(struct rtw89_dev * rtwdev,const struct rtw89_fw_mrc_upd_duration_arg * arg)8092 int rtw89_fw_h2c_mrc_upd_duration(struct rtw89_dev *rtwdev,
8093 const struct rtw89_fw_mrc_upd_duration_arg *arg)
8094 {
8095 struct rtw89_h2c_mrc_upd_duration *h2c;
8096 struct sk_buff *skb;
8097 unsigned int i;
8098 u32 len;
8099 int ret;
8100
8101 len = struct_size(h2c, slots, arg->slot_num);
8102 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
8103 if (!skb) {
8104 rtw89_err(rtwdev, "failed to alloc skb for mrc upd duration\n");
8105 return -ENOMEM;
8106 }
8107
8108 skb_put(skb, len);
8109 h2c = (struct rtw89_h2c_mrc_upd_duration *)skb->data;
8110
8111 h2c->w0 = le32_encode_bits(arg->sch_idx,
8112 RTW89_H2C_MRC_UPD_DURATION_W0_SCH_IDX) |
8113 le32_encode_bits(arg->slot_num,
8114 RTW89_H2C_MRC_UPD_DURATION_W0_SLOT_NUM) |
8115 le32_encode_bits(false,
8116 RTW89_H2C_MRC_UPD_DURATION_W0_BTC_IN_SCH);
8117
8118 h2c->start_tsf_high = cpu_to_le32(arg->start_tsf >> 32);
8119 h2c->start_tsf_low = cpu_to_le32(arg->start_tsf);
8120
8121 for (i = 0; i < arg->slot_num; i++) {
8122 h2c->slots[i] =
8123 le32_encode_bits(arg->slots[i].slot_idx,
8124 RTW89_H2C_MRC_UPD_DURATION_SLOT_SLOT_IDX) |
8125 le32_encode_bits(arg->slots[i].duration,
8126 RTW89_H2C_MRC_UPD_DURATION_SLOT_DURATION);
8127 }
8128
8129 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
8130 H2C_CAT_MAC,
8131 H2C_CL_MRC,
8132 H2C_FUNC_MRC_UPD_DURATION, 0, 0,
8133 len);
8134
8135 ret = rtw89_h2c_tx(rtwdev, skb, false);
8136 if (ret) {
8137 rtw89_err(rtwdev, "failed to send h2c\n");
8138 dev_kfree_skb_any(skb);
8139 return -EBUSY;
8140 }
8141
8142 return 0;
8143 }
8144
__fw_txpwr_entry_zero_ext(const void * ext_ptr,u8 ext_len)8145 static bool __fw_txpwr_entry_zero_ext(const void *ext_ptr, u8 ext_len)
8146 {
8147 static const u8 zeros[U8_MAX] = {};
8148
8149 return memcmp(ext_ptr, zeros, ext_len) == 0;
8150 }
8151
8152 #define __fw_txpwr_entry_acceptable(e, cursor, ent_sz) \
8153 ({ \
8154 u8 __var_sz = sizeof(*(e)); \
8155 bool __accept; \
8156 if (__var_sz >= (ent_sz)) \
8157 __accept = true; \
8158 else \
8159 __accept = __fw_txpwr_entry_zero_ext((cursor) + __var_sz,\
8160 (ent_sz) - __var_sz);\
8161 __accept; \
8162 })
8163
8164 static bool
fw_txpwr_byrate_entry_valid(const struct rtw89_fw_txpwr_byrate_entry * e,const void * cursor,const struct rtw89_txpwr_conf * conf)8165 fw_txpwr_byrate_entry_valid(const struct rtw89_fw_txpwr_byrate_entry *e,
8166 const void *cursor,
8167 const struct rtw89_txpwr_conf *conf)
8168 {
8169 if (!__fw_txpwr_entry_acceptable(e, cursor, conf->ent_sz))
8170 return false;
8171
8172 if (e->band >= RTW89_BAND_NUM || e->bw >= RTW89_BYR_BW_NUM)
8173 return false;
8174
8175 switch (e->rs) {
8176 case RTW89_RS_CCK:
8177 if (e->shf + e->len > RTW89_RATE_CCK_NUM)
8178 return false;
8179 break;
8180 case RTW89_RS_OFDM:
8181 if (e->shf + e->len > RTW89_RATE_OFDM_NUM)
8182 return false;
8183 break;
8184 case RTW89_RS_MCS:
8185 if (e->shf + e->len > __RTW89_RATE_MCS_NUM ||
8186 e->nss >= RTW89_NSS_NUM ||
8187 e->ofdma >= RTW89_OFDMA_NUM)
8188 return false;
8189 break;
8190 case RTW89_RS_HEDCM:
8191 if (e->shf + e->len > RTW89_RATE_HEDCM_NUM ||
8192 e->nss >= RTW89_NSS_HEDCM_NUM ||
8193 e->ofdma >= RTW89_OFDMA_NUM)
8194 return false;
8195 break;
8196 case RTW89_RS_OFFSET:
8197 if (e->shf + e->len > __RTW89_RATE_OFFSET_NUM)
8198 return false;
8199 break;
8200 default:
8201 return false;
8202 }
8203
8204 return true;
8205 }
8206
8207 static
rtw89_fw_load_txpwr_byrate(struct rtw89_dev * rtwdev,const struct rtw89_txpwr_table * tbl)8208 void rtw89_fw_load_txpwr_byrate(struct rtw89_dev *rtwdev,
8209 const struct rtw89_txpwr_table *tbl)
8210 {
8211 const struct rtw89_txpwr_conf *conf = tbl->data;
8212 struct rtw89_fw_txpwr_byrate_entry entry = {};
8213 struct rtw89_txpwr_byrate *byr_head;
8214 struct rtw89_rate_desc desc = {};
8215 const void *cursor;
8216 u32 data;
8217 s8 *byr;
8218 int i;
8219
8220 rtw89_for_each_in_txpwr_conf(entry, cursor, conf) {
8221 if (!fw_txpwr_byrate_entry_valid(&entry, cursor, conf))
8222 continue;
8223
8224 byr_head = &rtwdev->byr[entry.band][entry.bw];
8225 data = le32_to_cpu(entry.data);
8226 desc.ofdma = entry.ofdma;
8227 desc.nss = entry.nss;
8228 desc.rs = entry.rs;
8229
8230 for (i = 0; i < entry.len; i++, data >>= 8) {
8231 desc.idx = entry.shf + i;
8232 byr = rtw89_phy_raw_byr_seek(rtwdev, byr_head, &desc);
8233 *byr = data & 0xff;
8234 }
8235 }
8236 }
8237
8238 static bool
fw_txpwr_lmt_2ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_2ghz_entry * e,const void * cursor,const struct rtw89_txpwr_conf * conf)8239 fw_txpwr_lmt_2ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_2ghz_entry *e,
8240 const void *cursor,
8241 const struct rtw89_txpwr_conf *conf)
8242 {
8243 if (!__fw_txpwr_entry_acceptable(e, cursor, conf->ent_sz))
8244 return false;
8245
8246 if (e->bw >= RTW89_2G_BW_NUM)
8247 return false;
8248 if (e->nt >= RTW89_NTX_NUM)
8249 return false;
8250 if (e->rs >= RTW89_RS_LMT_NUM)
8251 return false;
8252 if (e->bf >= RTW89_BF_NUM)
8253 return false;
8254 if (e->regd >= RTW89_REGD_NUM)
8255 return false;
8256 if (e->ch_idx >= RTW89_2G_CH_NUM)
8257 return false;
8258
8259 return true;
8260 }
8261
8262 static
rtw89_fw_load_txpwr_lmt_2ghz(struct rtw89_txpwr_lmt_2ghz_data * data)8263 void rtw89_fw_load_txpwr_lmt_2ghz(struct rtw89_txpwr_lmt_2ghz_data *data)
8264 {
8265 const struct rtw89_txpwr_conf *conf = &data->conf;
8266 struct rtw89_fw_txpwr_lmt_2ghz_entry entry = {};
8267 const void *cursor;
8268
8269 rtw89_for_each_in_txpwr_conf(entry, cursor, conf) {
8270 if (!fw_txpwr_lmt_2ghz_entry_valid(&entry, cursor, conf))
8271 continue;
8272
8273 data->v[entry.bw][entry.nt][entry.rs][entry.bf][entry.regd]
8274 [entry.ch_idx] = entry.v;
8275 }
8276 }
8277
8278 static bool
fw_txpwr_lmt_5ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_5ghz_entry * e,const void * cursor,const struct rtw89_txpwr_conf * conf)8279 fw_txpwr_lmt_5ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_5ghz_entry *e,
8280 const void *cursor,
8281 const struct rtw89_txpwr_conf *conf)
8282 {
8283 if (!__fw_txpwr_entry_acceptable(e, cursor, conf->ent_sz))
8284 return false;
8285
8286 if (e->bw >= RTW89_5G_BW_NUM)
8287 return false;
8288 if (e->nt >= RTW89_NTX_NUM)
8289 return false;
8290 if (e->rs >= RTW89_RS_LMT_NUM)
8291 return false;
8292 if (e->bf >= RTW89_BF_NUM)
8293 return false;
8294 if (e->regd >= RTW89_REGD_NUM)
8295 return false;
8296 if (e->ch_idx >= RTW89_5G_CH_NUM)
8297 return false;
8298
8299 return true;
8300 }
8301
8302 static
rtw89_fw_load_txpwr_lmt_5ghz(struct rtw89_txpwr_lmt_5ghz_data * data)8303 void rtw89_fw_load_txpwr_lmt_5ghz(struct rtw89_txpwr_lmt_5ghz_data *data)
8304 {
8305 const struct rtw89_txpwr_conf *conf = &data->conf;
8306 struct rtw89_fw_txpwr_lmt_5ghz_entry entry = {};
8307 const void *cursor;
8308
8309 rtw89_for_each_in_txpwr_conf(entry, cursor, conf) {
8310 if (!fw_txpwr_lmt_5ghz_entry_valid(&entry, cursor, conf))
8311 continue;
8312
8313 data->v[entry.bw][entry.nt][entry.rs][entry.bf][entry.regd]
8314 [entry.ch_idx] = entry.v;
8315 }
8316 }
8317
8318 static bool
fw_txpwr_lmt_6ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_6ghz_entry * e,const void * cursor,const struct rtw89_txpwr_conf * conf)8319 fw_txpwr_lmt_6ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_6ghz_entry *e,
8320 const void *cursor,
8321 const struct rtw89_txpwr_conf *conf)
8322 {
8323 if (!__fw_txpwr_entry_acceptable(e, cursor, conf->ent_sz))
8324 return false;
8325
8326 if (e->bw >= RTW89_6G_BW_NUM)
8327 return false;
8328 if (e->nt >= RTW89_NTX_NUM)
8329 return false;
8330 if (e->rs >= RTW89_RS_LMT_NUM)
8331 return false;
8332 if (e->bf >= RTW89_BF_NUM)
8333 return false;
8334 if (e->regd >= RTW89_REGD_NUM)
8335 return false;
8336 if (e->reg_6ghz_power >= NUM_OF_RTW89_REG_6GHZ_POWER)
8337 return false;
8338 if (e->ch_idx >= RTW89_6G_CH_NUM)
8339 return false;
8340
8341 return true;
8342 }
8343
8344 static
rtw89_fw_load_txpwr_lmt_6ghz(struct rtw89_txpwr_lmt_6ghz_data * data)8345 void rtw89_fw_load_txpwr_lmt_6ghz(struct rtw89_txpwr_lmt_6ghz_data *data)
8346 {
8347 const struct rtw89_txpwr_conf *conf = &data->conf;
8348 struct rtw89_fw_txpwr_lmt_6ghz_entry entry = {};
8349 const void *cursor;
8350
8351 rtw89_for_each_in_txpwr_conf(entry, cursor, conf) {
8352 if (!fw_txpwr_lmt_6ghz_entry_valid(&entry, cursor, conf))
8353 continue;
8354
8355 data->v[entry.bw][entry.nt][entry.rs][entry.bf][entry.regd]
8356 [entry.reg_6ghz_power][entry.ch_idx] = entry.v;
8357 }
8358 }
8359
8360 static bool
fw_txpwr_lmt_ru_2ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_ru_2ghz_entry * e,const void * cursor,const struct rtw89_txpwr_conf * conf)8361 fw_txpwr_lmt_ru_2ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_ru_2ghz_entry *e,
8362 const void *cursor,
8363 const struct rtw89_txpwr_conf *conf)
8364 {
8365 if (!__fw_txpwr_entry_acceptable(e, cursor, conf->ent_sz))
8366 return false;
8367
8368 if (e->ru >= RTW89_RU_NUM)
8369 return false;
8370 if (e->nt >= RTW89_NTX_NUM)
8371 return false;
8372 if (e->regd >= RTW89_REGD_NUM)
8373 return false;
8374 if (e->ch_idx >= RTW89_2G_CH_NUM)
8375 return false;
8376
8377 return true;
8378 }
8379
8380 static
rtw89_fw_load_txpwr_lmt_ru_2ghz(struct rtw89_txpwr_lmt_ru_2ghz_data * data)8381 void rtw89_fw_load_txpwr_lmt_ru_2ghz(struct rtw89_txpwr_lmt_ru_2ghz_data *data)
8382 {
8383 const struct rtw89_txpwr_conf *conf = &data->conf;
8384 struct rtw89_fw_txpwr_lmt_ru_2ghz_entry entry = {};
8385 const void *cursor;
8386
8387 rtw89_for_each_in_txpwr_conf(entry, cursor, conf) {
8388 if (!fw_txpwr_lmt_ru_2ghz_entry_valid(&entry, cursor, conf))
8389 continue;
8390
8391 data->v[entry.ru][entry.nt][entry.regd][entry.ch_idx] = entry.v;
8392 }
8393 }
8394
8395 static bool
fw_txpwr_lmt_ru_5ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_ru_5ghz_entry * e,const void * cursor,const struct rtw89_txpwr_conf * conf)8396 fw_txpwr_lmt_ru_5ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_ru_5ghz_entry *e,
8397 const void *cursor,
8398 const struct rtw89_txpwr_conf *conf)
8399 {
8400 if (!__fw_txpwr_entry_acceptable(e, cursor, conf->ent_sz))
8401 return false;
8402
8403 if (e->ru >= RTW89_RU_NUM)
8404 return false;
8405 if (e->nt >= RTW89_NTX_NUM)
8406 return false;
8407 if (e->regd >= RTW89_REGD_NUM)
8408 return false;
8409 if (e->ch_idx >= RTW89_5G_CH_NUM)
8410 return false;
8411
8412 return true;
8413 }
8414
8415 static
rtw89_fw_load_txpwr_lmt_ru_5ghz(struct rtw89_txpwr_lmt_ru_5ghz_data * data)8416 void rtw89_fw_load_txpwr_lmt_ru_5ghz(struct rtw89_txpwr_lmt_ru_5ghz_data *data)
8417 {
8418 const struct rtw89_txpwr_conf *conf = &data->conf;
8419 struct rtw89_fw_txpwr_lmt_ru_5ghz_entry entry = {};
8420 const void *cursor;
8421
8422 rtw89_for_each_in_txpwr_conf(entry, cursor, conf) {
8423 if (!fw_txpwr_lmt_ru_5ghz_entry_valid(&entry, cursor, conf))
8424 continue;
8425
8426 data->v[entry.ru][entry.nt][entry.regd][entry.ch_idx] = entry.v;
8427 }
8428 }
8429
8430 static bool
fw_txpwr_lmt_ru_6ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_ru_6ghz_entry * e,const void * cursor,const struct rtw89_txpwr_conf * conf)8431 fw_txpwr_lmt_ru_6ghz_entry_valid(const struct rtw89_fw_txpwr_lmt_ru_6ghz_entry *e,
8432 const void *cursor,
8433 const struct rtw89_txpwr_conf *conf)
8434 {
8435 if (!__fw_txpwr_entry_acceptable(e, cursor, conf->ent_sz))
8436 return false;
8437
8438 if (e->ru >= RTW89_RU_NUM)
8439 return false;
8440 if (e->nt >= RTW89_NTX_NUM)
8441 return false;
8442 if (e->regd >= RTW89_REGD_NUM)
8443 return false;
8444 if (e->reg_6ghz_power >= NUM_OF_RTW89_REG_6GHZ_POWER)
8445 return false;
8446 if (e->ch_idx >= RTW89_6G_CH_NUM)
8447 return false;
8448
8449 return true;
8450 }
8451
8452 static
rtw89_fw_load_txpwr_lmt_ru_6ghz(struct rtw89_txpwr_lmt_ru_6ghz_data * data)8453 void rtw89_fw_load_txpwr_lmt_ru_6ghz(struct rtw89_txpwr_lmt_ru_6ghz_data *data)
8454 {
8455 const struct rtw89_txpwr_conf *conf = &data->conf;
8456 struct rtw89_fw_txpwr_lmt_ru_6ghz_entry entry = {};
8457 const void *cursor;
8458
8459 rtw89_for_each_in_txpwr_conf(entry, cursor, conf) {
8460 if (!fw_txpwr_lmt_ru_6ghz_entry_valid(&entry, cursor, conf))
8461 continue;
8462
8463 data->v[entry.ru][entry.nt][entry.regd][entry.reg_6ghz_power]
8464 [entry.ch_idx] = entry.v;
8465 }
8466 }
8467
8468 static bool
fw_tx_shape_lmt_entry_valid(const struct rtw89_fw_tx_shape_lmt_entry * e,const void * cursor,const struct rtw89_txpwr_conf * conf)8469 fw_tx_shape_lmt_entry_valid(const struct rtw89_fw_tx_shape_lmt_entry *e,
8470 const void *cursor,
8471 const struct rtw89_txpwr_conf *conf)
8472 {
8473 if (!__fw_txpwr_entry_acceptable(e, cursor, conf->ent_sz))
8474 return false;
8475
8476 if (e->band >= RTW89_BAND_NUM)
8477 return false;
8478 if (e->tx_shape_rs >= RTW89_RS_TX_SHAPE_NUM)
8479 return false;
8480 if (e->regd >= RTW89_REGD_NUM)
8481 return false;
8482
8483 return true;
8484 }
8485
8486 static
rtw89_fw_load_tx_shape_lmt(struct rtw89_tx_shape_lmt_data * data)8487 void rtw89_fw_load_tx_shape_lmt(struct rtw89_tx_shape_lmt_data *data)
8488 {
8489 const struct rtw89_txpwr_conf *conf = &data->conf;
8490 struct rtw89_fw_tx_shape_lmt_entry entry = {};
8491 const void *cursor;
8492
8493 rtw89_for_each_in_txpwr_conf(entry, cursor, conf) {
8494 if (!fw_tx_shape_lmt_entry_valid(&entry, cursor, conf))
8495 continue;
8496
8497 data->v[entry.band][entry.tx_shape_rs][entry.regd] = entry.v;
8498 }
8499 }
8500
8501 static bool
fw_tx_shape_lmt_ru_entry_valid(const struct rtw89_fw_tx_shape_lmt_ru_entry * e,const void * cursor,const struct rtw89_txpwr_conf * conf)8502 fw_tx_shape_lmt_ru_entry_valid(const struct rtw89_fw_tx_shape_lmt_ru_entry *e,
8503 const void *cursor,
8504 const struct rtw89_txpwr_conf *conf)
8505 {
8506 if (!__fw_txpwr_entry_acceptable(e, cursor, conf->ent_sz))
8507 return false;
8508
8509 if (e->band >= RTW89_BAND_NUM)
8510 return false;
8511 if (e->regd >= RTW89_REGD_NUM)
8512 return false;
8513
8514 return true;
8515 }
8516
8517 static
rtw89_fw_load_tx_shape_lmt_ru(struct rtw89_tx_shape_lmt_ru_data * data)8518 void rtw89_fw_load_tx_shape_lmt_ru(struct rtw89_tx_shape_lmt_ru_data *data)
8519 {
8520 const struct rtw89_txpwr_conf *conf = &data->conf;
8521 struct rtw89_fw_tx_shape_lmt_ru_entry entry = {};
8522 const void *cursor;
8523
8524 rtw89_for_each_in_txpwr_conf(entry, cursor, conf) {
8525 if (!fw_tx_shape_lmt_ru_entry_valid(&entry, cursor, conf))
8526 continue;
8527
8528 data->v[entry.band][entry.regd] = entry.v;
8529 }
8530 }
8531
8532 const struct rtw89_rfe_parms *
rtw89_load_rfe_data_from_fw(struct rtw89_dev * rtwdev,const struct rtw89_rfe_parms * init)8533 rtw89_load_rfe_data_from_fw(struct rtw89_dev *rtwdev,
8534 const struct rtw89_rfe_parms *init)
8535 {
8536 struct rtw89_rfe_data *rfe_data = rtwdev->rfe_data;
8537 struct rtw89_rfe_parms *parms;
8538
8539 if (!rfe_data)
8540 return init;
8541
8542 parms = &rfe_data->rfe_parms;
8543 if (init)
8544 *parms = *init;
8545
8546 if (rtw89_txpwr_conf_valid(&rfe_data->byrate.conf)) {
8547 rfe_data->byrate.tbl.data = &rfe_data->byrate.conf;
8548 rfe_data->byrate.tbl.size = 0; /* don't care here */
8549 rfe_data->byrate.tbl.load = rtw89_fw_load_txpwr_byrate;
8550 parms->byr_tbl = &rfe_data->byrate.tbl;
8551 }
8552
8553 if (rtw89_txpwr_conf_valid(&rfe_data->lmt_2ghz.conf)) {
8554 rtw89_fw_load_txpwr_lmt_2ghz(&rfe_data->lmt_2ghz);
8555 parms->rule_2ghz.lmt = &rfe_data->lmt_2ghz.v;
8556 }
8557
8558 if (rtw89_txpwr_conf_valid(&rfe_data->lmt_5ghz.conf)) {
8559 rtw89_fw_load_txpwr_lmt_5ghz(&rfe_data->lmt_5ghz);
8560 parms->rule_5ghz.lmt = &rfe_data->lmt_5ghz.v;
8561 }
8562
8563 if (rtw89_txpwr_conf_valid(&rfe_data->lmt_6ghz.conf)) {
8564 rtw89_fw_load_txpwr_lmt_6ghz(&rfe_data->lmt_6ghz);
8565 parms->rule_6ghz.lmt = &rfe_data->lmt_6ghz.v;
8566 }
8567
8568 if (rtw89_txpwr_conf_valid(&rfe_data->lmt_ru_2ghz.conf)) {
8569 rtw89_fw_load_txpwr_lmt_ru_2ghz(&rfe_data->lmt_ru_2ghz);
8570 parms->rule_2ghz.lmt_ru = &rfe_data->lmt_ru_2ghz.v;
8571 }
8572
8573 if (rtw89_txpwr_conf_valid(&rfe_data->lmt_ru_5ghz.conf)) {
8574 rtw89_fw_load_txpwr_lmt_ru_5ghz(&rfe_data->lmt_ru_5ghz);
8575 parms->rule_5ghz.lmt_ru = &rfe_data->lmt_ru_5ghz.v;
8576 }
8577
8578 if (rtw89_txpwr_conf_valid(&rfe_data->lmt_ru_6ghz.conf)) {
8579 rtw89_fw_load_txpwr_lmt_ru_6ghz(&rfe_data->lmt_ru_6ghz);
8580 parms->rule_6ghz.lmt_ru = &rfe_data->lmt_ru_6ghz.v;
8581 }
8582
8583 if (rtw89_txpwr_conf_valid(&rfe_data->tx_shape_lmt.conf)) {
8584 rtw89_fw_load_tx_shape_lmt(&rfe_data->tx_shape_lmt);
8585 parms->tx_shape.lmt = &rfe_data->tx_shape_lmt.v;
8586 }
8587
8588 if (rtw89_txpwr_conf_valid(&rfe_data->tx_shape_lmt_ru.conf)) {
8589 rtw89_fw_load_tx_shape_lmt_ru(&rfe_data->tx_shape_lmt_ru);
8590 parms->tx_shape.lmt_ru = &rfe_data->tx_shape_lmt_ru.v;
8591 }
8592
8593 return parms;
8594 }
8595