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| /Documentation/i2c/ |
| D | i2c_bus.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
3 <!-- Updated to inclusive terminology by Wolfram Sang -->
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| /Documentation/userspace-api/media/v4l/ |
| D | constraints.svg | 1 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later -->
3 …-rule="evenodd" stroke-linejoin="round" stroke-width="28.222" preserveAspectRatio="xMidYMid" versi…
4 …-.4 0 0 -.4 -4 0)" d="m0 0 5-5-17.5 5 17.5 5-5-5z" fill="#f00" fill-rule="evenodd" stroke="#f00" s…
5 …-.4 0 0 -.4 -4 0)" d="m0 0 5-5-17.5 5 17.5 5-5-5z" fill="#000080" fill-rule="evenodd" stroke="#000…
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| D | pixfmt-srggb14p.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB14P:
4 .. _v4l2-pix-fmt-sbggr14p:
5 .. _v4l2-pix-fmt-sgbrg14p:
6 .. _v4l2-pix-fmt-sgrbg14p:
17 14-bit packed Bayer formats
29 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
30 with alternating green-red and green-blue rows. They are conventionally
45 .. flat-table::
46 :header-rows: 0
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| D | subdev-formats.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
23 - ``height``
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| D | metafmt-vsp1-hgt.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-meta-fmt-vsp1-hgt:
9 Renesas R-Car VSP1 2-D Histogram Data
15 This format describes histogram data generated by the Renesas R-Car VSP1
16 2-D Histogram (HGT) engine.
28 The Saturation position **n** (0 - 31) of the bucket in the matrix is
33 The Hue position **m** (0 - 5) of the bucket in the matrix depends on
43 Area 0 Area 1 Area 2 Area 3 Area 4 Area 5
50 5U 0L 0U 1L 1U 2L 2U 3L 3U 4L 4U 5L 5U 0L
51 <0..............................Hue Value............................255>
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| /Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
58 4 allows tracking up to 5 fingers.
69 (TouchPadOff=0) will also disable the buttons associated with the touchpad.
99 By echoing "0" to this file all debugging will be turned OFF.
113 By echoing "0" to this file parity checking will be turned OFF. Any
114 non-zero value will turn it ON. For hardware version 1 the default is ON.
128 Sets crc_enabled to 0/1. The name "crc_enabled" is the official name of
138 "0" or "1" to this file will set the state to "0" or "1".
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| D | alps.rst | 1 ----------------------
3 ----------------------
6 ------------
8 ALPS touchpads, called versions 1, 2, 3, 4, 5, 6, 7 and 8.
10 Since roughly mid-2010 several new ALPS touchpads have been released and
14 adequate. The design choices were to re-define the alps_model_data
29 ---------
32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
37 report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
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| /Documentation/translations/zh_CN/core-api/ |
| D | packing.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/core-api/packing.rst
22 --------
42 --------
46 - 将一个CPU可使用的数字打包到内存缓冲区中（具有硬件约束/特殊性）。
47 - 将内存缓冲区（具有硬件约束/特殊性）解压缩为一个CPU可使用的数字。
62 7 6 5 4
63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
64 3 2 1 0
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| /Documentation/devicetree/bindings/clock/ |
| D | idt,versaclock5.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: IDT VersaClock 5 and 6 programmable I2C clock generators
10 The IDT VersaClock 5 and VersaClock 6 are programmable I2C
16 - 5P49V5923:
17 0 -- OUT0_SEL_I2CB
18 1 -- OUT1
19 2 -- OUT2
21 - 5P49V5933:
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| /Documentation/RCU/Design/Memory-Ordering/ |
| D | TreeRCU-hotplug.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Creator: fig2dev Version 3.2 Patchlevel 5e -->
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| D | TreeRCU-dyntick.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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18 viewBox="-44 -44 8917.9652 7405.8166"
22 sodipodi:docname="TreeRCU-dyntick.svg">
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| D | TreeRCU-gp-init-1.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Creator: fig2dev Version 3.2 Patchlevel 5e -->
4 <!-- CreationDate: Wed Dec 9 17:35:03 2015 -->
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| D | TreeRCU-gp-fqs.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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| D | TreeRCU-qs.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Creator: fig2dev Version 3.2 Patchlevel 5e -->
4 <!-- CreationDate: Wed Dec 9 17:35:03 2015 -->
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| D | TreeRCU-gp-init-2.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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| D | TreeRCU-gp-cleanup.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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| D | TreeRCU-callback-invocation.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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| D | TreeRCU-gp-init-3.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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| /Documentation/devicetree/bindings/iio/dac/ |
| D | adi,ad5380.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lars-Peter Clausen <lars@metafoo.de>
11 - Jonathan Cameron <jic23@kernel.org>
19 - adi,ad5380-3
20 - adi,ad5380-5
21 - adi,ad5381-3
22 - adi,ad5381-5
23 - adi,ad5382-3
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| /Documentation/devicetree/bindings/dma/ |
| D | renesas,rcar-dmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rcar-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car and RZ/G DMA Controller
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
13 - $ref: dma-controller.yaml#
18 - items:
19 - enum:
20 - renesas,dmac-r8a7742 # RZ/G1H
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| /Documentation/devicetree/bindings/nvmem/ |
| D | mediatek,efuse.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Andrew-CT Chen <andrew-ct.chen@mediatek.com>
15 - Lala Lin <lala.lin@mediatek.com>
18 - $ref: nvmem.yaml#
19 - $ref: nvmem-deprecated-cells.yaml#
23 pattern: "^efuse@[0-9a-f]+$"
27 - items:
28 - enum:
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| /Documentation/admin-guide/perf/ |
| D | hisi-pmu.rst | 13 two HHAs (0 - 1) and four DDRCs (0 - 3), respectively.
16 -------------------------------
27 name will appear in event listing as hisi_sccl<sccl-id>_module<index-id>.
28 where "sccl-id" is the identifier of the SCCL and "index-id" is the index of
31 e.g. hisi_sccl3_l3c0/rd_hit_cpipe is READ_HIT_CPIPE event of L3C index #0 in
34 e.g. hisi_sccl1_hha0/rx_operations is RX_OPERATIONS event of HHA index #0 in
44 ------------------------------------------
46 ------------------------------------------
48 ------------------------------------------
50 ------------------------------------------
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| /Documentation/core-api/ |
| D | packing.rst | 6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
48 The byte offsets in the packed buffer are always implicitly 0, 1, ... 7.
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| /Documentation/gpu/amdgpu/ |
| D | apu-asic-info-table.csv | 3 … Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN/PICASSO, DCN 1.0, 9.1.0, VCN 1.0, 4.1.0, 10.0.0
6 SteamDeck, VANGOGH, DCN 3.0.1, 10.3.1, VCN 3.1.0, 5.2.1, 11.5.0
7 Ryzen 5000 series / Ryzen 7x30 series, GREEN SARDINE / Cezanne / Barcelo / Barcelo-R, DCN 2.1, 9.3,…
8 Ryzen 6000 series / Ryzen 7x35 series / Ryzen 7x36 series, YELLOW CARP / Rembrandt / Rembrandt-R, 3…
9 Ryzen 7000 series (AM5), Raphael, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5
10 Ryzen 9000 series (AM5), Granite Ridge, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5
11 Ryzen 7x45 series (FL1), Dragon Range, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5
15 Ryzen AI 300 series, Strix Point, 3.5.0, 11.5.0, 4.0.5, 6.1.0, 14.0.0
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| /Documentation/gpu/amdgpu/display/ |
| D | mpo-cursor.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
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