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| /Documentation/leds/ |
| D | leds-blinkm.rst | 5 The leds-blinkm driver supports the devices of the BlinkM family.
7 They are RGB-LED modules driven by a (AT)tiny microcontroller and
9 0x09 but this can be changed through a command. By this you could
10 daisy-chain up to 127 BlinkMs on an I2C bus.
16 The interface this driver provides is 3-fold:
18 a) LED multicolor class interface for use with triggers
23 blinkm-<i2c-bus-nr>-<i2c-device-nr>:rgb:indicator
25 $ ls -h /sys/class/leds/blinkm-1-9:rgb:indicator
32 Exactly three values between 0 and 255 must be written to multi_intensity to
37 The overall lightness be changed by writing a value between 0 and 255 to the
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| D | leds-lp5523.rst | 9 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com)
12 -----------
13 LP5523 can drive up to 9 channels. Leds can be controlled directly via
15 The name of each channel is configurable in the platform data - name and label.
18 a) Define the 'name' in the platform data
22 - /sys/class/leds/R1 (name: 'R1')
23 - /sys/class/leds/B1 (name: 'B1')
28 - /sys/class/leds/RGB:channelN (label: 'RGB', N: 0 ~ 8)
33 - /sys/class/leds/lp5523:channelN (N: 0 ~ 8)
38 1) Legacy interface - enginex_mode, enginex_load and enginex_leds
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| /Documentation/networking/ |
| D | pktgen.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
8 or as a module. A module is preferred; modprobe pktgen if needed. Once
9 running, pktgen creates a thread for each CPU with affinity to that CPU.
10 Monitoring and controlling is done via /proc. It is easiest to select a
13 On a dual CPU::
16 root 129 0.3 0.0 0 0 ? SW 2003 523:20 [kpktgend_0]
17 root 130 0.3 0.0 0 0 ? SW 2003 509:50 [kpktgend_1]
31 overload type of benchmarking, as this could hurt the normal use-case.
35 # ethtool -G ethX tx 1024
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| /Documentation/devicetree/bindings/media/ |
| D | video-interfaces.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 Video data pipelines usually consist of external devices, e.g. camera sensors,
20 bus controller nodes, e.g. I2C.
23 Configuration of a port depends on other devices participating in the data
29 #address-cells = <1>;
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| /Documentation/ABI/stable/ |
| D | sysfs-class-tpm | 4 Contact: linux-integrity@vger.kernel.org
5 Description: The device/ directory under a specific TPM instance exposes
12 Contact: linux-integrity@vger.kernel.org
13 Description: The "active" property prints a '1' if the TPM chip is accepting
16 visible to the OS, but will only accept a restricted set of
24 Contact: linux-integrity@vger.kernel.org
32 Contact: linux-integrity@vger.kernel.org
37 Manufacturer: 0x53544d20
41 Manufacturer is a hex dump of the 4 byte manufacturer info
42 space in a TPM. TCG version shows the TCG TPM spec level that
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| /Documentation/devicetree/bindings/mfd/ |
| D | gateworks-gsc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/gateworks-gsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Gateworks System Controller (GSC) is a device present across various
11 Gateworks product families that provides a set of system related features
14 - Watchdog Timer
15 - GPIO
16 - Pushbutton controller
17 - Hardware monitor with ADC's for temperature and voltage rails and
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| D | brcm,cru.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <rafal@milecki.pl>
13 Broadcom CRU ("Clock and Reset Unit" or "Central Resource Unit") is a hardware
14 block grouping smaller blocks. On Broadcom Northstar platform it contains e.g.
20 - enum:
21 - brcm,ns-cru
22 - const: simple-mfd
29 "#address-cells":
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| D | brcm,twd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom's Timer-Watchdog (aka TWD)
10 - Rafał Miłecki <rafal@milecki.pl>
13 Broadcom has a Timer-Watchdog block used in multiple SoCs (e.g., BCM4908,
15 registers layout). This block consists of: timers, watchdog and optionally a
21 - enum:
22 - brcm,bcm4908-twd
23 - brcm,bcm7038-twd
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| D | kontron,sl28cpld.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Walle <michael@walle.cc>
14 watchdog, fan monitoring, PWM controller, interrupt controller and a
26 "#address-cells":
29 "#size-cells":
30 const: 0
32 "#interrupt-cells":
38 interrupt-controller: true
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| /Documentation/devicetree/bindings/regulator/ |
| D | samsung,s2mpa01.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 This is a part of device tree bindings for S2M and S5M family of Power
23 "^LDO([1-9]|1[0-9]|2[0-6])$":
31 - regulator-name
34 "^BUCK([1-9]|10)$":
42 regulator-ramp-delay:
43 enum: [0, 6250, 12500, 25000, 50000]
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| /Documentation/hid/ |
| D | hidintro.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 This chapter is meant to give a broad overview of what HID report
8 descriptors are, and of how a casual (non-kernel) programmer can deal
18 hidreport-parsing
25 are using to interact with a computer, be it a mouse, a touchpad, a
26 tablet, a microphone.
29 For example, mice can have any number of buttons; they may have a
36 through the *HID report descriptor*, a fixed set of bytes describing
39 a HID Report Descriptor may specify that "in a report with ID 3 the
40 bits from 8 to 15 is the delta x coordinate of a mouse".
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| /Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr5.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR5 SDRAM compliant to JEDEC JESD209-5
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - pattern: "^lpddr5-[0-9a-f]{2},[0-9a-f]{4}$"
19 - const: jedec,lpddr5
21 serial-id:
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| /Documentation/filesystems/ |
| D | 9p.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 v9fs: Plan 9 Resource Sharing for Linux
10 v9fs is a Unix implementation of the Plan 9 9p remote filesystem protocol.
19 the 9p client is available in the form of a USENIX paper:
26 http://xcpu.org/papers/xcpu-talk.pdf
29 * CellFS: A New Programming Model for the Cell BE
30 http://xcpu.org/papers/cellfs-talk.pdf
31 * PROSE I/O: Using 9p to enable Application Partitions
33 * VirtFS: A Virtualization Aware File System pass-through
34 https://kernel.org/doc/ols/2010/ols2010-pages-109-120.pdf
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| /Documentation/userspace-api/media/v4l/ |
| D | pixfmt-sdr-pcu18be.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-SDR-FMT-PCU18BE:
9 Planar complex unsigned 18-bit big endian IQ sample
14 This format contains a sequence of complex number samples. Each complex
15 number consist of two parts called In-phase and Quadrature (IQ). Both I
16 and Q are represented as a 18 bit unsigned big endian number stored in
18 padded with 0. I value starts first and Q value starts at an offset
19 equalling half of the buffer size (i.e.) offset = buffersize/2. Out of
20 the 18 bits, bit 17:2 (16 bit) is data and bit 1:0 (2 bit) can be any
26 .. flat-table::
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| /Documentation/devicetree/bindings/ |
| D | dts-coding-style.rst | 1 .. SPDX-License-Identifier: GPL-2.0
16 ---------------------------
18 The Devicetree Specification allows a broad range of characters in node
24 * Lowercase characters: [a-z]
25 * Digits: [0-9]
26 * Dash: -
30 * Lowercase characters: [a-z]
31 * Digits: [0-9]
34 3. Unless a bus defines differently, unit addresses shall use lowercase
37 4. Hex values in properties, e.g. "reg", shall use lowercase hex. The address
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | riscv,imsics.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/riscv,imsics.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V Incoming MSI Controller (IMSIC)
10 - Anup Patel <anup@brainfault.org>
13 The RISC-V advanced interrupt architecture (AIA) defines a per-CPU incoming
14 MSI controller (IMSIC) for handling MSIs in a RISC-V platform. The RISC-V
15 AIA specification can be found at https://github.com/riscv/riscv-aia.
17 The IMSIC is a per-CPU (or per-HART) device with separate interrupt file
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| /Documentation/admin-guide/ |
| D | initrd.rst | 8 initrd provides the capability to load a RAM disk by the boot loader.
10 can be run from it. Afterwards, a new root file system can be mounted
11 from a different device. The previous root (from initrd) is then moved
12 to a directory and can be subsequently unmounted.
15 where the kernel comes up with a minimum set of compiled-in drivers, and
18 This document gives a brief overview of the use of initrd. A more detailed
23 ---------
28 2) the kernel converts initrd into a "normal" RAM disk and
36 shell scripts; it is run with uid 0 and can do basically everything
43 9) the initrd file system is removed
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| /Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | gpio.txt | 1 Every GPIO controller node must have #gpio-cells property defined,
2 this information will be used to translate gpio-specifiers.
5 Ports A, C and D are 16bit ports and Ports B and E are 32bit ports.
7 On CPM2 devices, all ports are 32bit ports and use a common register layout.
10 - compatible : "fsl,cpm1-pario-bank-a", "fsl,cpm1-pario-bank-b",
11 "fsl,cpm1-pario-bank-c", "fsl,cpm1-pario-bank-d",
12 "fsl,cpm1-pario-bank-e", "fsl,cpm2-pario-bank"
13 - #gpio-cells : Should be two. The first cell is the pin number and the
15 - gpio-controller : Marks the port as GPIO controller.
17 - fsl,cpm1-gpio-irq-mask : For banks having interrupt capability (like port C
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| /Documentation/fb/ |
| D | framebuffer.rst | 8 0. Introduction
9 ---------------
13 software to access the graphics hardware through a well-defined interface, so
14 the software doesn't need to know anything about the low-level (hardware
18 /dev directory, i.e. /dev/fb*.
22 --------------------------
25 other device in /dev. It's a character device using major 29; the minor
31 0 = /dev/fb0 First frame buffer
39 /dev/fb0current -> fb0
40 /dev/fb1current -> fb1
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| /Documentation/devicetree/bindings/power/ |
| D | mediatek,power-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - MandyJH Liu <mandyjh.liu@mediatek.com>
11 - Matthias Brugger <mbrugger@suse.com>
17 IP cores belonging to a power domain should contain a 'power-domains'
18 property that is a phandle for SCPSYS node representing the domain.
22 pattern: '^power-controller(@[0-9a-f]+)?$'
26 - mediatek,mt6795-power-controller
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| /Documentation/devicetree/bindings/crypto/ |
| D | fsl-sec2.txt | 1 Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
5 - compatible : Should contain entries for this and backward compatible
6 SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)
7 e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)
9 - reg : Offset and length of the register set for the device
10 - interrupts : the SEC's interrupt number
11 - fsl,num-channels : An integer representing the number of channels
13 - fsl,channel-fifo-len : An integer representing the number of
15 - fsl,exec-units-mask : The bitmask representing what execution units
16 (EUs) are available. It's a single 32-bit cell. EU information
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| /Documentation/devicetree/bindings/leds/ |
| D | common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
25 led-sources:
30 $ref: /schemas/types.yaml#/definitions/uint32-array
35 from the header include/dt-bindings/leds/common.h. If there is no
36 matching LED_FUNCTION available, add a new one.
42 the header include/dt-bindings/leds/common.h. If there is no matching
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| /Documentation/devicetree/bindings/soc/ti/ |
| D | ti,j721e-system-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/soc/ti/ti,j721e-system-controller.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 System controller node represents a register region containing a set
14 represent as any specific type of device. The typical use-case is
15 for some other node's driver, or platform-specific code, to acquire
16 a reference to the syscon node (e.g. by phandle, node path, or
17 search using a specific compatible value), interrogate the node (or
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| /Documentation/devicetree/bindings/power/supply/ |
| D | bq24735.yaml | 1 # SPDX-License-Identifier: GPL-2.0
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: TI BQ24735 Li-Ion Battery Charger
11 - Sebastian Reichel <sre@kernel.org>
14 - $ref: power-supply.yaml#
27 ti,ac-detect-gpios:
30 This GPIO is optionally used to read the AC adapter status. This is a Host GPIO
35 ti,charge-current:
39 This value must be between 128mA and 8.128A with a 64mA step resolution.
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| /Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | fsl,ifc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
17 SRAM and other memories where address and data are shared on a bus.
21 pattern: "^memory-controller@[0-9a-f]+$"
26 "#address-cells":
32 "#size-cells":
49 little-endian:
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