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| /Documentation/ABI/testing/ |
| D | sysfs-bus-event_source-devices-dfl_fme | 5 Description: Read-only. Attribute group to describe the magic bits 7 (See ABI/testing/sysfs-bus-event_source-devices-format). 13 event = "config:0-11" - event ID 14 evtype = "config:12-15" - event type 15 portid = "config:16-23" - event source 19 fab_mmio_read = "event=0x06,evtype=0x02,portid=0xff" 21 It shows this fab_mmio_read is a fabric type (0x02) event with 22 0x06 local event id for overall monitoring (portid=0xff). 28 Description: Read-only. This file always returns cpu which the PMU is bound 35 Description: Read-only. Attribute group to describe performance monitoring [all …]
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| /Documentation/devicetree/bindings/input/ |
| D | brcm,bcm-keypad.txt | 3 Broadcom Keypad controller is used to interface a SoC with a matrix-type 6 The keypad controller can sense a key-press and key-release and report the 9 This binding is based on the matrix-keymap binding with the following 12 keypad,num-rows and keypad,num-columns are required. 15 - compatible: should be "brcm,bcm-keypad" 17 - reg: physical base address of the controller and length of memory mapped 20 - interrupts: The interrupt number to the cpu. 23 - keypad,num-rows: Number of row lines connected to the keypad 26 - keypad,num-columns: Number of column lines connected to the 29 - col-debounce-filter-period: The debounce period for the Column filter. [all …]
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| D | google,cros-ec-keyb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $id: http://devicetree.org/schemas/input/google,cros-ec-keyb.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Simon Glass <sjg@chromium.org> 12 - Benson Leung <bleung@chromium.org> 24 - description: ChromeOS EC with only buttons/switches 25 const: google,cros-ec-keyb-switches 26 - description: ChromeOS EC with keyboard and possibly buttons/switches 27 const: google,cros-ec-keyb [all …]
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| D | adi,adp5588.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nuno Sá <nuno.sa@analog.com> 14 https://www.analog.com/media/en/technical-documentation/data-sheets/ADP5588.pdf 17 - $ref: matrix-keymap.yaml# 18 - $ref: input.yaml# 23 - adi,adp5587 24 - adi,adp5588 29 vcc-supply: [all …]
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| /Documentation/devicetree/bindings/sound/ |
| D | cs35l35.txt | 5 - compatible : "cirrus,cs35l35" 7 - reg : the I2C address of the device for I2C 9 - VA-supply, VP-supply : power supplies for the device, 13 - interrupts : IRQ line info CS35L35. 14 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt 17 - cirrus,boost-ind-nanohenry: Inductor value for boost converter. The value is 21 - reset-gpios : gpio used to reset the amplifier 23 - cirrus,stereo-config : Boolean to determine if there are 2 AMPs for a 26 - cirrus,audio-channel : Set Location of Audio Signal on Serial Port 27 0 = Data Packet received on Left I2S Channel [all …]
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| D | cs35l36.txt | 5 - compatible : "cirrus,cs35l36" 7 - reg : the I2C address of the device for I2C 9 - VA-supply, VP-supply : power supplies for the device, 13 - cirrus,boost-ctl-millivolt : Boost Voltage Value. Configures the boost 18 - cirrus,boost-peak-milliamp : Boost-converter peak current limit in mA. 24 - cirrus,boost-ind-nanohenry : Inductor estimation LBST reference value. 32 - cirrus,multi-amp-mode : Boolean to determine if there are more than 33 one amplifier in the system. If more than one it is best to Hi-Z the ASP 36 - cirrus,boost-ctl-select : Boost converter control source selection. 39 0x00 - Control Port Value [all …]
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| /Documentation/devicetree/bindings/net/ |
| D | marvell-bt-8xxx.txt | 2 ------ 9 - compatible : should be one of the following: 10 * "marvell,sd8897-bt" (for SDIO) 11 * "marvell,sd8997-bt" (for SDIO) 16 - marvell,cal-data: Calibration data downloaded to the device during 20 - marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip. 22 - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host 25 - interrupt-names: Used only for USB based devices (See below) 26 - interrupts : specifies the interrupt pin number to the cpu. For SDIO, the 29 named "wakeup" from the interrupt-names and interrupt arrays. [all …]
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| /Documentation/admin-guide/media/ |
| D | si476x.rst | 1 .. SPDX-License-Identifier: GPL-2.0 12 ------------------- 14 - According to the SiLabs' datasheet it is possible to update the 15 firmware of the radio chip in the run-time, thus bringing it to the 23 ------------------------------- 31 * /sys/kernel/debug/<device-name>/acf 41 0x00 blend_int Flag, set when stereo separation has 43 0x01 hblend_int Flag, set when HiBlend cutoff 45 0x02 hicut_int Flag, set when HiCut cutoff 47 0x03 chbw_int Flag, set when channel filter [all …]
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | qcom,pm8018-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/qcom,pm8018-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 19 - qcom,pm8018-adc 20 - qcom,pm8038-adc 21 - qcom,pm8058-adc 22 - qcom,pm8921-adc 27 ADC base address in the PMIC, typically 0x197. [all …]
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| /Documentation/i2c/ |
| D | slave-testunit-backend.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 by Wolfram Sang <wsa@sang-engineering.com> in 2020 11 easy to obtain). Examples include multi-master testing, and SMBus Host Notify 19 Instantiating the device is regular. Example for bus 0, address 0x30:: 21 # echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device 30 compatible = "slave-testunit"; 31 reg = <(0x30 | I2C_OWN_SLAVE_ADDRESS)>; 36 byte. Its value is 0 if the testunit is idle, otherwise the command number of 39 When writing, the device consists of 4 8-bit registers and, except for some 43 .. csv-table:: [all …]
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | marvell,mv88e6060.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Lunn <andrew@lunn.ch> 15 MDIO address of the switch to be 0x10 or 0x00, and on the MDIO bus 17 independent devices on address 0x00-0x04 or 0x10-0x14, so in difference 31 reset-gpios: 37 - $ref: dsa.yaml#/$defs/ethernet-ports 40 - compatible 41 - reg [all …]
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| /Documentation/networking/ |
| D | mac80211-injection.rst | 1 .. SPDX-License-Identifier: GPL-2.0 16 ./Documentation/networking/radiotap-headers.rst. 75 0x00, 0x00, // <-- radiotap version 76 0x0b, 0x00, // <- radiotap header length 77 0x04, 0x0c, 0x00, 0x00, // <-- bitmap 78 0x6c, // <-- rate 79 0x0c, //<-- tx power 80 0x01 //<-- antenna 85 0x08, 0x01, 0x00, 0x00, 86 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, [all …]
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| D | radiotap-headers.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 ------------------------------------ 10 Radiotap headers are variable-length and extensible, you can get most of the 19 ----------------------- 24 the header for argument index 0 (IEEE80211_RADIOTAP_TSFT) is present in the 29 < 8-byte ieee80211_radiotap_header > 44 -------------------------- 50 - the arguments are all stored little-endian! 52 - the argument payload for a given argument index has a fixed size. So 53 IEEE80211_RADIOTAP_TSFT being present always indicates an 8-byte argument is [all …]
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| /Documentation/devicetree/bindings/hwmon/ |
| D | npcm750-pwm-fan.txt | 3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM) 6 The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM) 9 Required properties for pwm-fan node 10 - #address-cells : should be 1. 11 - #size-cells : should be 0. 12 - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX. 13 : "nuvoton,npcm845-pwm-fan" for Arbel NPCM8XX. 14 - reg : specifies physical base address and size of the registers. 15 - reg-names : must contain: 18 - clocks : phandle of reference clocks. [all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | qcom,pmic-typec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/qcom,pmic-typec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm PMIC based USB Type-C block 10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org> 13 Qualcomm PMIC Type-C block 18 - enum: 19 - qcom,pmi632-typec 20 - qcom,pm8150b-typec [all …]
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| /Documentation/devicetree/bindings/soundwire/ |
| D | qcom,soundwire.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 11 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> 19 - qcom,soundwire-v1.3.0 20 - qcom,soundwire-v1.5.0 21 - qcom,soundwire-v1.5.1 22 - qcom,soundwire-v1.6.0 23 - qcom,soundwire-v1.7.0 [all …]
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| /Documentation/usb/ |
| D | gadget_hid.rst | 21 HID function descriptors you want to use - E.G. something 29 .subclass = 0, /* No subclass */ 34 0x05, 0x01, /* USAGE_PAGE (Generic Desktop) */ 35 0x09, 0x06, /* USAGE (Keyboard) */ 36 0xa1, 0x01, /* COLLECTION (Application) */ 37 0x05, 0x07, /* USAGE_PAGE (Keyboard) */ 38 0x19, 0xe0, /* USAGE_MINIMUM (Keyboard LeftControl) */ 39 0x29, 0xe7, /* USAGE_MAXIMUM (Keyboard Right GUI) */ 40 0x15, 0x00, /* LOGICAL_MINIMUM (0) */ 41 0x25, 0x01, /* LOGICAL_MAXIMUM (1) */ [all …]
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| D | gadget_uvc.rst | 6 -------- 8 connection. It is intended to run on a Linux system that has USB device-side 24 ----------------------------- 29 --------------------------------------- 35 see Documentation/ABI/testing/configfs-usb-gadget-uvc 47 .. code-block:: bash 52 FUNCTION="$GADGET/functions/uvc.0" 54 mkdir -p $FUNCTION 72 uvc.0 + 99 .. code-block:: bash [all …]
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| /Documentation/devicetree/bindings/mfd/ |
| D | st,stmpe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Linus Walleij <linus.walleij@linaro.org> 18 - $ref: /schemas/spi/spi-peripheral-props.yaml# 23 - st,stmpe601 24 - st,stmpe801 25 - st,stmpe811 26 - st,stmpe1600 27 - st,stmpe1601 [all …]
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| /Documentation/bpf/ |
| D | classic_vs_extended.rst | 12 - Number of registers increase from 2 to 10: 15 new layout extends this to be 10 internal registers and a read-only frame 16 pointer. Since 64-bit CPUs are passing arguments to functions via registers 17 the number of args from eBPF program to in-kernel function is restricted 18 to 5 and one register is used to accept return value from an in-kernel 20 sparcv9/mips64 have 7 - 8 registers for arguments; x86_64 has 6 callee saved 25 64-bit architectures. 27 On 32-bit architectures JIT may map programs that use only 32-bit arithmetic 30 R0 - R5 are scratch registers and eBPF program needs spill/fill them if 33 call predefined in-kernel functions, though. [all …]
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| /Documentation/devicetree/bindings/pci/ |
| D | mvebu-pci.txt | 5 - compatible: one of the following values: 6 marvell,armada-370-pcie 7 marvell,armada-xp-pcie 8 marvell,dove-pcie 9 marvell,kirkwood-pcie 10 - #address-cells, set to <3> 11 - #size-cells, set to <2> 12 - #interrupt-cells, set to <1> 13 - bus-range: PCI bus numbers covered 14 - device_type, set to "pci" [all …]
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| D | nvidia,tegra20-pcie.txt | 4 - compatible: Must be: 5 - "nvidia,tegra20-pcie": for Tegra20 6 - "nvidia,tegra30-pcie": for Tegra30 7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132 8 - "nvidia,tegra210-pcie": for Tegra210 9 - "nvidia,tegra186-pcie": for Tegra186 10 - power-domains: To ungate power partition by BPMP powergate driver. Must 13 - device_type: Must be "pci" 14 - reg: A list of physical base address and length for each set of controller 15 registers. Must contain an entry for each entry in the reg-names property. [all …]
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | cypress,cy8ctma340.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Javier Martinez Canillas <javier@dowhile0.org> 15 - Linus Walleij <linus.walleij@linaro.org> 18 - $ref: touchscreen.yaml# 26 - const: cypress,cy8ctma340 27 - const: cypress,cy8ctst341 28 - const: cypress,cyttsp-spi 31 - const: cypress,cyttsp-i2c [all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | ti,lmk04832.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liam Beguin <liambeguin@gmail.com> 21 - ti,lmk04832 26 '#address-cells': 29 '#size-cells': 30 const: 0 32 '#clock-cells': 35 spi-max-frequency: [all …]
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| /Documentation/arch/arm/samsung/ |
| D | bootloader-interface.rst | 14 In the document "boot loader" means any of following: U-boot, proprietary 19 1. Non-Secure mode 26 0x08 exynos_cpu_resume_ns, mcpm_entry_point System suspend 27 0x0c 0x00000bad (Magic cookie) System suspend 28 0x1c exynos4_secondary_startup Secondary CPU boot 29 0x1c + 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot 30 0x20 0xfcba0d10 (Magic cookie) AFTR 31 0x24 exynos_cpu_resume_ns AFTR 32 0x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR 33 0x28 0x0 or last value during resume (Exynos542x) System suspend [all …]
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