Searched +full:0 +full:x0000000 (Results 1 – 4 of 4) sorted by relevance
25 first address cell and it may accept values 0..N-176 it can be in range [0-3]. For compatible105 Minimum value is 1 (0 treated as 1).110 Minimum value is 1 (0 treated as 1).117 Minimum value is 1 (0 treated as 1).122 Minimum value is 1 (0 treated as 1).127 Minimum value is 1 (0 treated as 1).134 Minimum value is 1 (0 treated as 1).145 clocks = <&clkaemif 0>;148 reg = <0x21000A00 0x00000100>;[all …]
9 - cle : Address line number connected to CLE. Default is 023 cle = <0>;28 reg = <0xf4000000 0x400>;30 partition@0 {32 reg = <0x0000000 0x100000>;38 reg = <0x0100000 0x200000>;43 reg = <0x0300000 0x100000>;48 reg = <0x0400000 0x7d00000>;
31 "^flash@[0-1],[0-9a-f]+$":54 reg = <0x0 0x47034000 0x0 0x100>,55 <0x5 0x00000000 0x1 0x0000000>;56 ranges = <0x0 0x0 0x5 0x00000000 0x4000000>, /* CS0 - 64MB */57 <0x1 0x0 0x5 0x04000000 0x4000000>; /* CS1 - 64MB */58 clocks = <&k3_clks 102 0>;62 mux-controls = <&hbmc_mux 0>;64 flash@0,0 {66 reg = <0x0 0x0 0x4000000>;
51 "@[0-9a-f]+$":77 partition@0 {79 reg = <0x0000000 0x100000>;84 reg = <0x0100000 0x200000>;96 partition@0 {98 reg = <0x00000000 0x1 0x00000000>;110 partition@0 {112 reg = <0x0 0x00000000 0x2 0x00000000>;118 reg = <0x2 0x00000000 0x1 0x00000000>;128 partition@0 {[all …]