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/Documentation/devicetree/bindings/usb/
Ddwc3-cavium.txt14 reg = <0x00011800 0x69000000 0x00000000 0x00000100>;
16 #address-cells = <0x00000002>;
17 #size-cells = <0x00000002>;
18 refclk-frequency = <0x05f5e100>;
21 power = <0x00000002 0x00000002 0x00000001>;
24 reg = <0x00016900 0x00000000 0x00000010 0x00000000>;
25 interrupt-parent = <0x00000010>;
26 interrupts = <0x00000009 0x00000004>;
/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra124-mc.yaml47 "^emc-timings-[0-9]+$":
56 "^timing-[0-9]+$":
118 reg = <0x70019000 0x1000>;
122 interrupts = <0 77 4>;
135 0x40040001 /* MC_EMEM_ARB_CFG */
136 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
137 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
138 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
139 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
140 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
[all …]
Dnvidia,tegra30-mc.yaml64 "^emc-timings-[0-9]+$":
73 "^timing-[0-9]+$":
134 reg = <0x7000f000 0x400>;
138 interrupts = <0 77 4>;
151 0x0000000a /* MC_EMEM_ARB_CFG */
152 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */
153 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */
154 0x00000004 /* MC_EMEM_ARB_TIMING_RP */
155 0x00000010 /* MC_EMEM_ARB_TIMING_RC */
156 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */
[all …]
Dnvidia,tegra20-emc.yaml38 const: 0
41 const: 0
145 "^emc-table@[0-9]+$":
165 const: 0
172 "^emc-table@[0-9]+$":
199 reg = <0x7000f400 0x400>;
200 interrupts = <0 78 4>;
207 #interconnect-cells = <0>;
209 #size-cells = <0>;
213 emc-tables@0 {
[all …]
Dnvidia,tegra30-emc.yaml35 const: 0
53 "^emc-timings-[0-9]+$":
62 "^timing-[0-9]+$":
75 minimum: 0
91 Mode Register 0.
98 minimum: 0
239 reg = <0x7000f400 0x400>;
240 interrupts = <0 78 4>;
247 #interconnect-cells = <0>;
255 nvidia,emc-auto-cal-interval = <0x001fffff>;
[all …]
Dnvidia,tegra124-emc.yaml33 const: 0
51 "^emc-timings-[0-9]+$":
62 "^timing-[0-9]+$":
93 minimum: 0
156 minimum: 0
356 reg = <0x70019000 0x1000>;
369 reg = <0x7001b000 0x1000>;
377 #interconnect-cells = <0>;
379 emc-timings-0 {
382 timing-0 {
[all …]
/Documentation/firmware-guide/acpi/
Ddebug.rst40 ACPI_UTILITIES 0x00000001
41 ACPI_HARDWARE 0x00000002
42 ACPI_EVENTS 0x00000004
43 ACPI_TABLES 0x00000008
44 ACPI_NAMESPACE 0x00000010
45 ACPI_PARSER 0x00000020
46 ACPI_DISPATCHER 0x00000040
47 ACPI_EXECUTER 0x00000080
48 ACPI_RESOURCES 0x00000100
49 ACPI_CA_DEBUGGER 0x00000200
[all …]
Dchromeos-acpi-device.rst63 * - 0x00000002
66 * - 0x00000004
70 * - 0x00000020
73 * - 0x00000200
77 All other bits are reserved and should be set to 0.
153 - Set to 256 (0x100). This indicates this field is no longer used.
157 - Set to 256 (0x100). This indicates this field is no longer used.
163 - 0 - Read-only (recovery) firmware
166 Set to 0 if EC firmware is always read-only.
172 - 0 - Recovery
[all …]
/Documentation/devicetree/bindings/input/
Dlpc32xx-key.txt25 reg = <0x40050000 0x1000>;
33 linux,keymap = <0x00000002>;
/Documentation/userspace-api/media/v4l/
Dmetafmt-d4xx.rst40 :stub-columns: 0
46 - 0x80000000
61 - Power of the laser LED 0-360, used for depth measurement
63 - 0: manual; 1: automatic exposure
65 - Exposure priority value: 0 - constant frame rate
68 and lie between 0 and maximum width or height respectively)
76 - Preset selector value, default: 0, unless changed by the user
78 - 0: off, 1: on, same as __u32 Laser mode for v1
82 - Led power value 0-360 (F416 SKU)
85 - 0x80000001
[all …]
Dvidioc-enuminput.rst46 :header-rows: 0
47 :stub-columns: 0
66 corresponds to audio input 0, the MSB to input 31. Any number of
109 :header-rows: 0
110 :stub-columns: 0
131 :header-rows: 0
132 :stub-columns: 0
136 - 0x00000001
139 - 0x00000002
142 - 0x00000004
[all …]
Dext-ctrls-codec-stateless.rst44 :header-rows: 0
45 :stub-columns: 0
114 :header-rows: 0
115 :stub-columns: 0
119 - 0x00000001
122 - 0x00000002
125 - 0x00000004
128 - 0x00000008
131 - 0x00000010
134 - 0x00000020
[all …]
Dvidioc-enumoutput.rst47 :header-rows: 0
48 :stub-columns: 0
67 The LSB corresponds to audio output 0, the MSB to output 31. Any
104 :header-rows: 0
105 :stub-columns: 0
126 :header-rows: 0
127 :stub-columns: 0
131 - 0x00000002
135 - 0x00000004
139 - 0x00000008
[all …]
Dvidioc-subdev-enum-mbus-code.rst39 Each enumeration starts with the ``index`` of 0, and
44 and set ``index`` to 0.
67 :header-rows: 0
68 :stub-columns: 0
109 :header-rows: 0
110 :stub-columns: 0
114 - 0x00000001
121 - 0x00000002
128 - 0x00000004
135 - 0x00000004
[all …]
Dvidioc-reqbufs.rst79 :header-rows: 0
80 :stub-columns: 0
98 - Set by the driver. If 0, then the driver doesn't support
105 then this can be called with ``count`` set to 0, ``memory`` set to
129 :header-rows: 0
130 :stub-columns: 0
134 - 0x00000001
137 - 0x00000002
140 - 0x00000004
143 - 0x00000008
[all …]
/Documentation/devicetree/bindings/soc/dove/
Dpmu.txt24 - #power-domain-cells: must be 0.
35 reg = <0xd0000 0x8000>, <0xd8000 0x8000>;
43 #power-domain-cells = <0>;
44 marvell,pmu_pwr_mask = <0x00000008>;
45 marvell,pmu_iso_mask = <0x00000001>;
50 #power-domain-cells = <0>;
51 marvell,pmu_pwr_mask = <0x00000004>;
52 marvell,pmu_iso_mask = <0x00000002>;
/Documentation/usb/
Dlinux-cdc-acm.inf34 usbser.sys,,,0x20
42 AddService=usbser, 0x00000002, DriverService.nt
61 USBSER.sys,,,0x20
69 AddService=usbser, 0x00000002, DriverService.NTamd64
/Documentation/devicetree/bindings/thermal/
Dqoriq-thermal.yaml20 Register (IPBRR0) at offset 0x0BF8.
24 0x01900102 T1040
82 reg = <0xf0000 0x1000>;
83 interrupts = <18 2 0 0>;
84 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
85 fsl,tmu-calibration = <0x00000000 0x00000025>,
86 <0x00000001 0x00000028>,
87 <0x00000002 0x0000002d>,
88 <0x00000003 0x00000031>,
89 <0x00000004 0x00000036>,
[all …]
/Documentation/devicetree/bindings/pci/
Dxlnx,nwl-pcie.yaml50 - const: 0
51 - const: 0
52 - const: 0
87 const: 0
125 reg = <0x0 0xfd0e0000 0x0 0x1000>,
126 <0x0 0xfd480000 0x0 0x1000>,
127 <0x80 0x00000000 0x0 0x10000000>;
129 ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
130 <0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>;
141 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
[all …]
/Documentation/firmware-guide/acpi/apei/
Deinj.rst13 ACPI: EINJ 0x000000007370A000 000150 (v01 INTEL 00000001 INTL 00000001)
50 0x00000001 Processor Correctable
51 0x00000002 Processor Uncorrectable non-fatal
52 0x00000004 Processor Uncorrectable fatal
53 0x00000008 Memory Correctable
54 0x00000010 Memory Uncorrectable non-fatal
55 0x00000020 Memory Uncorrectable fatal
56 0x00000040 PCI Express Correctable
57 0x00000080 PCI Express Uncorrectable non-fatal
58 0x00000100 PCI Express Uncorrectable fatal
[all …]
/Documentation/userspace-api/media/cec/
Dcec-ioc-adap-g-caps.rst43 :header-rows: 0
44 :stub-columns: 0
71 :header-rows: 0
72 :stub-columns: 0
78 - 0x00000001
87 - 0x00000002
95 - 0x00000004
105 - 0x00000008
111 - 0x00000010
116 - 0x00000020
[all …]
/Documentation/translations/zh_TW/arch/arm/
DBooting100 ‘2’(0x00000002)。ATAG_NONE 標籤的 size 域必須設置爲零。
128 dtb 物理地址處查找 dtb 魔數值(0xd00dfeed),以確定 dtb 是否已經代替
133 中。但是不可將其放置於“0”物理地址處,因爲內核認爲:r2 中爲 0,意味着
155 r0 = 0
/Documentation/translations/zh_CN/arch/arm/
DBooting100 ‘2’(0x00000002)。ATAG_NONE 标签的 size 域必须设置为零。
128 dtb 物理地址处查找 dtb 魔数值(0xd00dfeed),以确定 dtb 是否已经代替
133 中。但是不可将其放置于“0”物理地址处,因为内核认为:r2 中为 0,意味着
155 r0 = 0
/Documentation/devicetree/bindings/dma/
Dstericsson,dma40.yaml22 0: SPI controller 0
23 1: SD/MMC controller 0 (unused)
35 13: UART port 0
37 15: I2C port 0
42 20: SLIMbus or HSI channel 0
51 29: SD/MMC controller 0
53 31: MSP port 0 or SLIMbus channel 0
83 61: Crypto Accelerator 0
84 62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX
85 63: Hash Accelerator 0 TX
[all …]
/Documentation/devicetree/bindings/powerpc/opal/
Dpower-mgt.txt44 0x00000001 /* Decrementer would stop */
45 0x00000002 /* Needs timebase restore */
46 0x00001000 /* Restore GPRs like nap */
47 0x00002000 /* Restore hypervisor resource from PACA pointer */
48 0x00004000 /* Program PORE to restore PACA pointer */
49 0x00010000 /* This is a nap state (POWER7,POWER8) */
50 0x00020000 /* This is a fast-sleep state (POWER8)*/
51 0x00040000 /* This is a winkle state (POWER8) */
52 0x00080000 /* This is a fast-sleep state which requires a */
55 0x00800000 /* This state uses SPR PMICR instruction */
[all …]

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