Searched +full:0 +full:x00000004 (Results 1 – 25 of 30) sorted by relevance
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| /Documentation/devicetree/bindings/powerpc/4xx/ |
| D | ppc440spe-adma.txt | 23 reg = <0x00000004 0x00100000 0x100>; 24 dcr-reg = <0x060 0x020>; 34 (typically 0x0 and 0x1 for DMA0 and DMA1) 46 cell-index = <0>; 47 reg = <0x00000004 0x00100100 0x100>; 48 dcr-reg = <0x060 0x020>; 50 interrupts = <0 1>; 52 #address-cells = <0>; 53 #size-cells = <0>; 55 0 &UIC0 0x14 4 [all …]
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra20-emc.yaml | 38 const: 0 41 const: 0 145 "^emc-table@[0-9]+$": 165 const: 0 172 "^emc-table@[0-9]+$": 199 reg = <0x7000f400 0x400>; 200 interrupts = <0 78 4>; 207 #interconnect-cells = <0>; 209 #size-cells = <0>; 213 emc-tables@0 { [all …]
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| D | nvidia,tegra30-mc.yaml | 64 "^emc-timings-[0-9]+$": 73 "^timing-[0-9]+$": 134 reg = <0x7000f000 0x400>; 138 interrupts = <0 77 4>; 151 0x0000000a /* MC_EMEM_ARB_CFG */ 152 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 153 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */ 154 0x00000004 /* MC_EMEM_ARB_TIMING_RP */ 155 0x00000010 /* MC_EMEM_ARB_TIMING_RC */ 156 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */ [all …]
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| D | nvidia,tegra124-emc.yaml | 33 const: 0 51 "^emc-timings-[0-9]+$": 62 "^timing-[0-9]+$": 93 minimum: 0 156 minimum: 0 356 reg = <0x70019000 0x1000>; 369 reg = <0x7001b000 0x1000>; 377 #interconnect-cells = <0>; 379 emc-timings-0 { 382 timing-0 { [all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | dwc3-cavium.txt | 14 reg = <0x00011800 0x69000000 0x00000000 0x00000100>; 16 #address-cells = <0x00000002>; 17 #size-cells = <0x00000002>; 18 refclk-frequency = <0x05f5e100>; 21 power = <0x00000002 0x00000002 0x00000001>; 24 reg = <0x00016900 0x00000000 0x00000010 0x00000000>; 25 interrupt-parent = <0x00000010>; 26 interrupts = <0x00000009 0x00000004>;
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| /Documentation/firmware-guide/acpi/ |
| D | debug.rst | 40 ACPI_UTILITIES 0x00000001 41 ACPI_HARDWARE 0x00000002 42 ACPI_EVENTS 0x00000004 43 ACPI_TABLES 0x00000008 44 ACPI_NAMESPACE 0x00000010 45 ACPI_PARSER 0x00000020 46 ACPI_DISPATCHER 0x00000040 47 ACPI_EXECUTER 0x00000080 48 ACPI_RESOURCES 0x00000100 49 ACPI_CA_DEBUGGER 0x00000200 [all …]
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| D | chromeos-acpi-device.rst | 63 * - 0x00000002 66 * - 0x00000004 70 * - 0x00000020 73 * - 0x00000200 77 All other bits are reserved and should be set to 0. 153 - Set to 256 (0x100). This indicates this field is no longer used. 157 - Set to 256 (0x100). This indicates this field is no longer used. 163 - 0 - Read-only (recovery) firmware 166 Set to 0 if EC firmware is always read-only. 172 - 0 - Recovery [all …]
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| /Documentation/userspace-api/media/v4l/ |
| D | metafmt-d4xx.rst | 40 :stub-columns: 0 46 - 0x80000000 61 - Power of the laser LED 0-360, used for depth measurement 63 - 0: manual; 1: automatic exposure 65 - Exposure priority value: 0 - constant frame rate 68 and lie between 0 and maximum width or height respectively) 76 - Preset selector value, default: 0, unless changed by the user 78 - 0: off, 1: on, same as __u32 Laser mode for v1 82 - Led power value 0-360 (F416 SKU) 85 - 0x80000001 [all …]
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| D | vidioc-subdev-enum-mbus-code.rst | 39 Each enumeration starts with the ``index`` of 0, and 44 and set ``index`` to 0. 67 :header-rows: 0 68 :stub-columns: 0 109 :header-rows: 0 110 :stub-columns: 0 114 - 0x00000001 121 - 0x00000002 128 - 0x00000004 135 - 0x00000004 [all …]
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| D | vidioc-enuminput.rst | 46 :header-rows: 0 47 :stub-columns: 0 66 corresponds to audio input 0, the MSB to input 31. Any number of 109 :header-rows: 0 110 :stub-columns: 0 131 :header-rows: 0 132 :stub-columns: 0 136 - 0x00000001 139 - 0x00000002 142 - 0x00000004 [all …]
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| D | vidioc-enumoutput.rst | 47 :header-rows: 0 48 :stub-columns: 0 67 The LSB corresponds to audio output 0, the MSB to output 31. Any 104 :header-rows: 0 105 :stub-columns: 0 126 :header-rows: 0 127 :stub-columns: 0 131 - 0x00000002 135 - 0x00000004 139 - 0x00000008 [all …]
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| D | ext-ctrls-codec-stateless.rst | 44 :header-rows: 0 45 :stub-columns: 0 114 :header-rows: 0 115 :stub-columns: 0 119 - 0x00000001 122 - 0x00000002 125 - 0x00000004 128 - 0x00000008 131 - 0x00000010 134 - 0x00000020 [all …]
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| D | vidioc-reqbufs.rst | 79 :header-rows: 0 80 :stub-columns: 0 98 - Set by the driver. If 0, then the driver doesn't support 105 then this can be called with ``count`` set to 0, ``memory`` set to 129 :header-rows: 0 130 :stub-columns: 0 134 - 0x00000001 137 - 0x00000002 140 - 0x00000004 143 - 0x00000008 [all …]
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| D | vidioc-querycap.rst | 48 :header-rows: 0 49 :stub-columns: 0 101 ``__u32 version = KERNEL_VERSION(4, 14, 0);`` 105 ``(version >> 16) & 0xFF, (version >> 8) & 0xFF, version & 0xFF);`` 142 :header-rows: 0 143 :stub-columns: 0 147 - 0x00000001 151 - 0x00001000 155 - 0x00000002 159 - 0x00002000 [all …]
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| D | vidioc-enumstd.rst | 53 :header-rows: 0 54 :stub-columns: 0 92 :header-rows: 0 93 :stub-columns: 0 108 :header-rows: 0 109 :stub-columns: 0 122 #define V4L2_STD_PAL_B ((v4l2_std_id)0x00000001) 123 #define V4L2_STD_PAL_B1 ((v4l2_std_id)0x00000002) 124 #define V4L2_STD_PAL_G ((v4l2_std_id)0x00000004) 125 #define V4L2_STD_PAL_H ((v4l2_std_id)0x00000008) [all …]
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| /Documentation/devicetree/bindings/soc/dove/ |
| D | pmu.txt | 24 - #power-domain-cells: must be 0. 35 reg = <0xd0000 0x8000>, <0xd8000 0x8000>; 43 #power-domain-cells = <0>; 44 marvell,pmu_pwr_mask = <0x00000008>; 45 marvell,pmu_iso_mask = <0x00000001>; 50 #power-domain-cells = <0>; 51 marvell,pmu_pwr_mask = <0x00000004>; 52 marvell,pmu_iso_mask = <0x00000002>;
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| /Documentation/devicetree/bindings/soc/imx/ |
| D | fsl,imx-iomuxc-gpr.yaml | 64 reg = <0x30340000 0x10000>; 69 mux-reg-masks = <0x34 0x00000004>; /* MIPI_MUX_SEL */
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| /Documentation/devicetree/bindings/thermal/ |
| D | qoriq-thermal.yaml | 20 Register (IPBRR0) at offset 0x0BF8. 24 0x01900102 T1040 82 reg = <0xf0000 0x1000>; 83 interrupts = <18 2 0 0>; 84 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>; 85 fsl,tmu-calibration = <0x00000000 0x00000025>, 86 <0x00000001 0x00000028>, 87 <0x00000002 0x0000002d>, 88 <0x00000003 0x00000031>, 89 <0x00000004 0x00000036>, [all …]
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| /Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-st.txt | 22 cpu@0 { 24 operating-points = <1500000 0 25 1200000 0 26 800000 0 27 500000 0>; 44 cpu@0 { 59 opp-supported-hw = <0x00000004 0xffffffff 0xffffffff>; 76 opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>;
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| /Documentation/userspace-api/media/cec/ |
| D | cec-ioc-adap-g-caps.rst | 43 :header-rows: 0 44 :stub-columns: 0 71 :header-rows: 0 72 :stub-columns: 0 78 - 0x00000001 87 - 0x00000002 95 - 0x00000004 105 - 0x00000008 111 - 0x00000010 116 - 0x00000020 [all …]
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| /Documentation/devicetree/bindings/dma/ |
| D | stericsson,dma40.yaml | 22 0: SPI controller 0 23 1: SD/MMC controller 0 (unused) 35 13: UART port 0 37 15: I2C port 0 42 20: SLIMbus or HSI channel 0 51 29: SD/MMC controller 0 53 31: MSP port 0 or SLIMbus channel 0 83 61: Crypto Accelerator 0 84 62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX 85 63: Hash Accelerator 0 TX [all …]
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| /Documentation/devicetree/bindings/perf/ |
| D | riscv,pmu.yaml | 78 value of variant must be 0xffffffff_ffffffff. 104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>; 105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>, 106 <0x00002 0x00002 0x00000004>, 107 <0x00003 0x0000A 0x00000ff8>, 108 <0x10000 0x10033 0x000ff000>; 110 /* For event ID 0x0002 */ 111 <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>, 112 /* For event ID 0-4 */ 113 <0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>, [all …]
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| /Documentation/firmware-guide/acpi/apei/ |
| D | einj.rst | 13 ACPI: EINJ 0x000000007370A000 000150 (v01 INTEL 00000001 INTL 00000001) 50 0x00000001 Processor Correctable 51 0x00000002 Processor Uncorrectable non-fatal 52 0x00000004 Processor Uncorrectable fatal 53 0x00000008 Memory Correctable 54 0x00000010 Memory Uncorrectable non-fatal 55 0x00000020 Memory Uncorrectable fatal 56 0x00000040 PCI Express Correctable 57 0x00000080 PCI Express Uncorrectable non-fatal 58 0x00000100 PCI Express Uncorrectable fatal [all …]
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| /Documentation/driver-api/ |
| D | mtdnand.rst | 141 .offset = 0, 197 should return 0, if the device is busy (R/B pin is low) and 1, if the 217 int err = 0; 325 GPIO(BOARD_NAND_NCE) |= 0xff; 326 if (chip >= 0) 344 case 0: 654 terminated by an {0, 0} entry. 667 <spare data page 0><ecc result 0>...<ecc result n> 671 <spare data page n><ecc result 0>...<ecc result n> 699 0x00 ECC byte 0 Error correction code byte 0 [all …]
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| /Documentation/admin-guide/ |
| D | xfs.rst | 255 delaylog/nodelaylog v4.0 256 ihashsize v4.0 257 irixsgid v4.0 258 osyncisdsync/osyncisosync v4.0 268 fs.xfs.stats_clear (Min: 0 Default: 0 Max: 1) 270 in /proc/fs/xfs/stat. It then immediately resets to "0". 291 fs.xfs.error_level (Min: 0 Default: 3 Max: 11) 296 XFS_ERRLEVEL_OFF: 0 300 fs.xfs.panic_mask (Min: 0 Default: 0 Max: 511) 304 XFS_NO_PTAG 0 [all …]
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