Searched +full:0 +full:x00000017 (Results 1 – 3 of 3) sorted by relevance
| /Documentation/devicetree/bindings/thermal/ |
| D | qoriq-thermal.yaml | 20 Register (IPBRR0) at offset 0x0BF8.
24 0x01900102 T1040
82 reg = <0xf0000 0x1000>;
83 interrupts = <18 2 0 0>;
84 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
85 fsl,tmu-calibration = <0x00000000 0x00000025>,
86 <0x00000001 0x00000028>,
87 <0x00000002 0x0000002d>,
88 <0x00000003 0x00000031>,
89 <0x00000004 0x00000036>,
[all …]
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra30-emc.yaml | 35 const: 0
53 "^emc-timings-[0-9]+$":
62 "^timing-[0-9]+$":
75 minimum: 0
91 Mode Register 0.
98 minimum: 0
239 reg = <0x7000f400 0x400>;
240 interrupts = <0 78 4>;
247 #interconnect-cells = <0>;
255 nvidia,emc-auto-cal-interval = <0x001fffff>;
[all …]
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| /Documentation/networking/ |
| D | filter.rst | 108 { 0x28, 0, 0, 0x0000000c },
109 { 0x15, 0, 8, 0x000086dd },
110 { 0x30, 0, 0, 0x00000014 },
111 { 0x15, 2, 0, 0x00000084 },
112 { 0x15, 1, 0, 0x00000006 },
113 { 0x15, 0, 17, 0x00000011 },
114 { 0x28, 0, 0, 0x00000036 },
115 { 0x15, 14, 0, 0x00000016 },
116 { 0x28, 0, 0, 0x00000038 },
117 { 0x15, 12, 13, 0x00000016 },
[all …]
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