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/Documentation/devicetree/bindings/leds/
Dregister-bit-led.yaml26 pattern: '^led@[0-9a-f]+,[0-9a-f]{1,2}$'
41 [ 0x1, 0x2, 0x4, 0x8, 0x10, 0x20, 0x40, 0x80, 0x100, 0x200, 0x400, 0x800,
42 0x1000, 0x2000, 0x4000, 0x8000, 0x10000, 0x20000, 0x40000, 0x80000,
43 0x100000, 0x200000, 0x400000, 0x800000, 0x1000000, 0x2000000, 0x4000000,
44 0x8000000, 0x10000000, 0x20000000, 0x40000000, 0x80000000 ]
64 reg = <0x10000000 0x1000>;
67 ranges = <0x0 0x10000000 0x1000>;
69 led@8,0 {
71 reg = <0x08 0x04>;
72 offset = <0x08>;
[all …]
/Documentation/arch/powerpc/
Dkvm-nested.rst175 range of 0 to 2047
209 Bit 0: getGuestWideState: Request state of the Guest instead
223 returned by ID=0x0001
260 Bit 0: getGuestWideState: Request state of the Guest instead
269 returned by ID=0x0001
292 the H_GUEST_SET_STATE() call with ID 0x0c00 and 0x0c01 (see table
296 GSB may also contain zero elements (ie 0 in the first 4 bytes of the
303 0xc00), then GPR3-12 are provided in the output GSB as this is the
321 Bit 0: generateExternalInterrupt: Generate an external interrupt
330 0x000: The VCPU stopped running for an unspecified reason. An
[all …]
/Documentation/devicetree/bindings/net/
Dmarvell,dfx-server.yaml50 bus@0 {
51 reg = <0 0>;
59 ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>;
60 reg = <MBUS_ID(0x08, 0x00) 0 0x100000>;
/Documentation/devicetree/bindings/arm/
Darm,juno-fpga-apb-regs.yaml31 "^led@[0-9a-f]+,[0-9a-f]$":
47 reg = <0x010000 0x1000>;
48 ranges = <0x0 0x10000 0x1000>;
52 led@8,0 {
54 reg = <0x08 0x04>;
55 offset = <0x08>;
56 mask = <0x01>;
57 label = "vexpress:0";
/Documentation/devicetree/bindings/pci/
Dmvebu-pci.txt23 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s
32 registers area. This range entry translates the '0x82000000 0 r' PCI
33 address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part
34 of the internal register window (as identified by MBUS_ID(0xf0,
35 0x01)).
39 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0
79 value is 0.
99 bus-range = <0x00 0xff>;
103 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
104 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
[all …]
/Documentation/hwmon/
Dabituguru-datasheet.rst34 0xE0 and 0xE4, so we don't have to scan any port-range, just check what the two
35 ports are holding for detection. We will refer to 0xE0 as CMD (command-port)
36 and 0xE4 as DATA because Abit refers to them with these names.
38 If DATA holds 0x00 or 0x08 and CMD holds 0x00 or 0xAC an uGuru could be
40 after a reboot uGuru will hold 0x00 here, but if the driver is removed and
41 later on attached again data-port will hold 0x08, more about this later.
44 turned up which will hold 0x00 instead of 0xAC at the CMD port, thus we also
46 hold 0x09 and will only hold 0x08 after reading CMD first, so CMD must be read
72 bank 0x24 for example the addressing within the bank selects a PWM output not
87 To put the uGuru in ready mode first write 0x00 to DATA and then wait for DATA
[all …]
/Documentation/devicetree/bindings/usb/
Dcypress,cypd4226.yaml24 const: 0
27 const: 0x08
56 - connector@0
68 #size-cells = <0>;
73 reg = <0x08>;
78 #size-cells = <0>;
79 connector@0 {
81 reg = <0>;
86 #size-cells = <0>;
87 port@0 {
[all …]
Dsmsc,usb3503.yaml111 #size-cells = <0>;
115 reg = <0x08>;
116 connect-gpios = <&gpx3 0 1>;
129 #size-cells = <0>;
133 reg = <0x08>;
134 connect-gpios = <&gpx3 0 1>;
Dmaxim,max33359.yaml45 #size-cells = <0>;
49 reg = <0x25>;
71 PDO_FIXED(9000, 2000, 0)>;
73 pd-revision = /bits/ 8 <0x03 0x01 0x01 0x08>;
/Documentation/devicetree/bindings/ata/
Dceva,ahci-1v84.yaml44 OOB timing value for COMINIT parameter for port 0.
56 OOB timing value for COMWAKE parameter for port 0.
68 Burst timing value for COM parameter for port 0.
80 Retry interval timing value for port 0.
175 reg = <0xfd0c0000 0x200>;
177 interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
179 ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
180 ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
181 ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
182 ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
[all …]
/Documentation/devicetree/bindings/thermal/
Ddove-thermal.txt17 reg = <0xd001c 0x0c>, <0xd005c 0x08>;
/Documentation/devicetree/bindings/hwmon/
Dnxp,mc34vr500.yaml30 #size-cells = <0>;
34 reg = <0x08>;
/Documentation/devicetree/bindings/watchdog/
Dsunplus,sp7021-wdt.yaml43 reg = <0x9c000630 0x08>, <0x9c000274 0x04>;
44 clocks = <&clkc 0x24>;
45 resets = <&rstc 0x14>;
Dcirrus,ep9301-wdt.yaml41 reg = <0x80940000 0x08>;
/Documentation/devicetree/bindings/clock/
Dsunplus,sp7021-clkc.yaml38 #clock-cells = <0>;
45 reg = <0x9c000004 0x28>,
46 <0x9c000200 0x44>,
47 <0x9c000268 0x08>;
/Documentation/devicetree/bindings/rtc/
Dbrcm,brcmstb-waketimer.yaml47 reg = <0xf041a080 0x14>;
48 interrupts-extended = <&aon_pm_l2_intc 0x04>,
49 <&upg_aux_aon_intr2_intc 0x08>;
/Documentation/devicetree/bindings/mfd/
Dti,nspire-misc.yaml44 reg = <0x900a0000 0x1000>;
48 offset = <0x08>;
49 value = <0x02>;
Dbrcm,bcm59056.txt29 reg = <0x08>;
Dmfd.txt30 the child's base address to 0, the physical address within parent's address
43 reg = <0x01000 0x1000>;
47 offset = <0x08>;
48 mask = <0x01>;
/Documentation/devicetree/bindings/iio/temperature/
Dti,tmp007.yaml25 0 0 0x40
26 0 1 0x41
27 0 SDA 0x42
28 0 SCL 0x43
29 1 0 0x44
30 1 1 0x45
31 1 SDA 0x46
32 1 SCL 0x47
48 #size-cells = <0>;
52 reg = <0x40>;
[all …]
/Documentation/ABI/testing/
Dsysfs-bus-event_source-devices-dfl_fme13 event = "config:0-11" - event ID
19 fab_mmio_read = "event=0x06,evtype=0x02,portid=0xff"
21 It shows this fab_mmio_read is a fabric type (0x02) event with
22 0x06 local event id for overall monitoring (portid=0xff).
43 Basic events (evtype=0x00)::
45 clock = "event=0x00,evtype=0x00,portid=0xff"
47 Cache events (evtype=0x01)::
49 cache_read_hit = "event=0x00,evtype=0x01,portid=0xff"
50 cache_read_miss = "event=0x01,evtype=0x01,portid=0xff"
51 cache_write_hit = "event=0x02,evtype=0x01,portid=0xff"
[all …]
Dsysfs-bus-usb-devices-usbsevseg6 A value of 0 is off and a non-zero value is on.
16 MSB 0x06; LSB 0x3F, and
20 MSB 0x08; LSB 0xFF.
28 hex: each character is between 0-15
29 ascii: each character is between '0'-'9' and 'A'-'F'.
/Documentation/devicetree/bindings/pinctrl/
Dmarvell,mvebu-pinctrl.txt30 reg = <0x12100 0x100>;
34 pinctrl-0 = <&pmx_uart1_sw>;
40 reg = <0xd0200 0x14>, <0xd0440 0x04>, <0xd802c 0x08>;
/Documentation/scsi/
Ddc395x.rst29 Default: 0, Acceptable values: 0 or 1
37 Default: 7, Acceptable values: 0 to 15
42 Default: 1, Acceptable value: 0 to 7
45 0 20 Mhz
63 0 0x01 1 Parity check
64 1 0x02 2 Synchronous Negotiation
65 2 0x04 4 Disconnection
66 3 0x08 8 Send Start command on startup. (Not used)
67 4 0x10 16 Tagged Command Queueing
68 5 0x20 32 Wide Negotiation
[all …]
/Documentation/devicetree/bindings/power/supply/
Dstericsson,ab8500-fg.yaml78 io-channels = <&gpadc 0x08>;

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