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/Documentation/devicetree/bindings/pci/
Dversatile.yaml38 - const: 0x1800
39 - const: 0
40 - const: 0
58 reg = <0x10001000 0x1000>,
59 <0x41000000 0x10000>,
60 <0x42000000 0x100000>;
61 bus-range = <0 0xff>;
67 <0x01000000 0 0x00000000 0x43000000 0 0x00010000>, /* downstream I/O */
68 <0x02000000 0 0x50000000 0x50000000 0 0x10000000>, /* non-prefetchable memory */
69 <0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
[all …]
Dintel,ixp4xx-pci.yaml54 - const: 0xf800
55 - const: 0
56 - const: 0
73 reg = <0xc0000000 0x1000>;
77 bus-range = <0x00 0xff>;
80 <0x02000000 0 0x48000000 0x48000000 0 0x04000000>,
81 <0x01000000 0 0x00000000 0x4c000000 0 0x00010000>;
83 <0x02000000 0 0x00000000 0x00000000 0 0x04000000>;
86 interrupt-map-mask = <0xf800 0 0 7>;
88 <0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */
[all …]
Dmediatek,mt7621-pcie.yaml41 | Device 0 | | Device 0 | | Device 0 |
42 | Func 0 | | Func 0 | | Func 0 |
55 - description: pcie port 0 RC control registers
63 '^pcie@[0-2],0$':
81 pattern: '^pcie-phy[0-2]$'
113 reg = <0x1e140000 0x100>,
114 <0x1e142000 0x100>,
115 <0x1e143000 0x100>,
116 <0x1e144000 0x100>;
121 pinctrl-0 = <&pcie_pins>;
[all …]
Drcar-gen4-pci-host.yaml98 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>,
99 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
100 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>,
101 <0 0xfe000000 0 0x400000>;
117 bus-range = <0x00 0xff>;
119 ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>,
120 <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>;
121 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
123 interrupt-map-mask = <0 0 0 7>;
124 interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
[all …]
Dmediatek-pcie.txt32 where N starting from 0 to one less than the number of root ports.
80 reg = <0 0x1a000000 0 0x1000>;
88 reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */
89 <0 0x1a142000 0 0x1000>, /* Port0 registers */
90 <0 0x1a143000 0 0x1000>, /* Port1 registers */
91 <0 0x1a144000 0 0x1000>; /* Port2 registers */
96 interrupt-map-mask = <0xf800 0 0 0>;
97 interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>,
98 <0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>,
99 <0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
[all …]
Drenesas,pci-rcar-gen2.yaml67 defaults to 1GiB at 0x40000000. Note there are hardware restrictions on
72 '^usb@[0-1],0$':
82 form <bdf 0 0 0 0>.
161 reg = <0xee090000 0xc00>,
162 <0xee080000 0x1100>;
168 bus-range = <0 0>;
172 ranges = <0x02000000 0 0xee080000 0xee080000 0 0x00010000>;
173 dma-ranges = <0x42000000 0 0x40000000 0x40000000 0 0x40000000>;
174 interrupt-map-mask = <0xf800 0 0 0x7>;
175 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
[all …]
Dralink,rt3883-pci.txt38 address. The value must be 0. As such, 'interrupt-map' nodes do not
53 address. The value must be 0.
105 reg = <0x10140000 0x20000>;
114 #address-cells = <0>;
128 bus-range = <0 255>;
130 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
131 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
134 interrupt-map-mask = <0xf800 0 0 7>;
137 0x8800 0 0 1 &pciintc 18
138 0x8800 0 0 2 &pciintc 18
[all …]
Dhisilicon,kirin-pcie.yaml78 reg = <0x0 0xf4000000 0x0 0x1000>,
79 <0x0 0xff3fe000 0x0 0x1000>,
80 <0x0 0xf3f20000 0x0 0x40000>,
81 <0x0 0xf5000000 0x0 0x2000>;
83 bus-range = <0x0 0xff>;
87 ranges = <0x02000000 0x0 0x00000000
88 0x0 0xf6000000
89 0x0 0x02000000>;
92 interrupts = <0 283 4>;
94 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
Dmvebu-pci.txt23 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s
32 registers area. This range entry translates the '0x82000000 0 r' PCI
33 address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part
34 of the internal register window (as identified by MBUS_ID(0xf0,
35 0x01)).
39 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0
79 value is 0.
99 bus-range = <0x00 0xff>;
103 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
104 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
[all …]
/Documentation/networking/
Dopenvswitch.rst88 in_port(1), eth(src=e0:91:f5:21:d0:b2, dst=00:02:e3:0f:80:a4),
89 eth_type(0x0800), ipv4(src=172.16.0.20, dst=172.18.0.52, proto=17, tos=0,
94 in_port(1), eth(...), eth_type(0x0800), ipv4(...), tcp(...)
106 A '0' bit specifies a don't care bit, which will match either a '1' or '0' bit
168 the 802.1Q TPID (0x8100) as the Ethertype then stopped parsing the
172 eth(...), eth_type(0x8100)
180 eth(...), vlan(vid=10, pcp=0), eth_type(0x0800), ip(proto=6, ...), tcp(...)
195 eth(...), eth_type(0x8100), vlan(vid=10, pcp=0), encap(eth_type(0x0800),
202 is still 0x8100, not changed to 0x0800.)
223 eth(...), eth_type(0x0800), ip(proto=6, ...), tcp(src=0, dst=0)
[all …]
Dcdc_mbim.rst26 :Valid Range: N/Y (0-1)
90 180:0
170 mapped to MBIM IP session 0.
178 VLAN ID Z for all values of Z greater than 0.
185 is greater than 0. These links can be added by using the normal VLAN
218 - TX frames using an IP protocol (0x0800 or 0x86dd) will be dropped
233 socat INTERFACE:wwan0.dss5,type=2 PTY:,echo=0,link=/dev/nmea
252 BPF_JUMP(BPF_JMP|BPF_JEQ|BPF_K, 1, 0, 6), /* true */
256 BPF_JUMP(BPF_JMP|BPF_JGE|BPF_K, 256, 0, 4), /* 256 is first DSS VLAN */
257 BPF_JUMP(BPF_JMP|BPF_JGE|BPF_K, 512, 3, 0), /* 511 is last DSS VLAN */
[all …]
Darcnet-hardware.rst269 values in the Linux ARCnet driver are only from 0x200 through 0x3F0. (If
272 a doc I got from Novell, MS Windows prefers values of 0x300 or more,
274 this may be because, if your card is at 0x2E0, probing for a serial port
275 at 0x2E8 will reset the card and probably mess things up royally.
277 - Avery's favourite: 0x300.
292 IRQ 0 Timer 0 (Not on bus)
340 Anything less than 0xA0000 is, well, a BAD idea since it isn't above
343 - Avery's favourite: 0xD0000
346 address from 0 to 255. Unlike Ethernet, you can set this address
349 on a network. DON'T use 0 or 255, since these are reserved (although
[all …]
/Documentation/arch/arm/samsung/
Dbootloader-interface.rst26 0x08 exynos_cpu_resume_ns, mcpm_entry_point System suspend
27 0x0c 0x00000bad (Magic cookie) System suspend
28 0x1c exynos4_secondary_startup Secondary CPU boot
29 0x1c + 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot
30 0x20 0xfcba0d10 (Magic cookie) AFTR
31 0x24 exynos_cpu_resume_ns AFTR
32 0x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR
33 0x28 0x0 or last value during resume (Exynos542x) System suspend
44 0x00 exynos4_secondary_startup Secondary CPU boot
45 0x04 exynos4_secondary_startup (Exynos542x) Secondary CPU boot
[all …]
/Documentation/hwmon/
Dasb100.rst10 Addresses scanned: I2C 0x2d
48 - 0x0001 => in0 (?)
49 - 0x0002 => in1 (?)
50 - 0x0004 => in2
51 - 0x0008 => in3
52 - 0x0010 => temp1 [1]_
53 - 0x0020 => temp2
54 - 0x0040 => fan1
55 - 0x0080 => fan2
56 - 0x0100 => in4
[all …]
/Documentation/devicetree/bindings/mailbox/
Dhisilicon,hi6220-mailbox.txt44 reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */
45 <0x0 0x06dff800 0x0 0x0800>; /* Mailbox */
73 mboxes = <&mailbox 1 0 11>, <&mailbox 0 1 10>;
/Documentation/devicetree/bindings/phy/
Dmediatek,tphy.yaml15 controllers on MediaTek SoCs, includes USB2.0, USB3.0, PCIe and SATA.
22 shared 0x0000 SPLLC
23 0x0100 FMREG
24 u2 port0 0x0800 U2PHY_COM
25 u3 port0 0x0900 U3PHYD
26 0x0a00 U3PHYD_BANK2
27 0x0b00 U3PHYA
28 0x0c00 U3PHYA_DA
29 u2 port1 0x1000 U2PHY_COM
30 u3 port1 0x1100 U3PHYD
[all …]
/Documentation/sound/designs/
Djack-injection.rst98 0x0001 HEADPHONE(0x0001)
122 …0x7803 HEADPHONE(0x0001) MICROPHONE(0x0002) BTN_3(0x0800) BTN_2(0x1000) BTN_1(0x2000) BTN_0(0x4000)
132 Jack: Headphone Jack Inject Enabled: 0
151 sound/card1/Headphone_Jack# echo 0 > sw_inject_enable
166 sound/card1/Headphone_Jack# echo 0 > jackin_inject
/Documentation/admin-guide/laptops/
Dsonypi.rst89 set to 0xffffffff, meaning that all possible events
94 SONYPI_JOGGER_MASK 0x0001
95 SONYPI_CAPTURE_MASK 0x0002
96 SONYPI_FNKEY_MASK 0x0004
97 SONYPI_BLUETOOTH_MASK 0x0008
98 SONYPI_PKEY_MASK 0x0010
99 SONYPI_BACK_MASK 0x0020
100 SONYPI_HELP_MASK 0x0040
101 SONYPI_LID_MASK 0x0080
102 SONYPI_ZOOM_MASK 0x0100
[all …]
/Documentation/ABI/testing/
Dsysfs-class-mtd14 The /sys/class/mtd/mtd{0,1,2,3,...} directories correspond
63 0x0400: MTD_WRITEABLE - device is writable
64 0x0800: MTD_BIT_WRITEABLE - single bits can be flipped
65 0x1000: MTD_NO_ERASE - no erase necessary
66 0x2000: MTD_POWERUP_LOCK - always locked after reset
134 In the case of devices lacking any ECC capability, it is 0.
146 an error, 0 is returned. Higher layers (e.g., UBI) use this
186 devices lacking any ECC capability, it is 0.
197 devices lacking any ECC capability, it is 0.
208 devices lacking any ECC capability, it is 0.
/Documentation/userspace-api/media/v4l/
Dvidioc-g-tuner.rst69 :header-rows: 0
70 :stub-columns: 0
171 Ranging from 0 to 65535. Higher values indicate a better signal.
190 :header-rows: 0
191 :stub-columns: 0
215 :header-rows: 0
216 :stub-columns: 0
220 - 0x0001
224 - 0x0002
235 - 0x0004
[all …]
Dvidioc-queryctrl.rst93 this driver. Also note that the ``minimum`` value is not necessarily 0.
104 :header-rows: 0
105 :stub-columns: 0
152 0-511 and the driver reports 0-65535, step should be 128.
182 :header-rows: 0
183 :stub-columns: 0
233 0-511 and the driver reports 0-65535, step should be 128.
252 ``p + ((z * dims[1] + y) * dims[0] + x) * elem_size``.
260 never be 0.
264 control is not an array, then this field is 0.
[all …]
/Documentation/networking/device_drivers/ethernet/aquantia/
Datlantic.rst100 PHYAD: 0
126 version: 5.2.0-050200rc5-generic-kern
151 InErrors: 0
168 InDroppedDma: 0
169 Queue[0] InPackets: 23567131
170 Queue[0] OutPackets: 20070028
171 Queue[0] InJumboPackets: 0
172 Queue[0] InLroPackets: 0
173 Queue[0] InErrors: 0
176 Queue[1] InJumboPackets: 0
[all …]
/Documentation/driver-api/media/drivers/ccs/
Dccs-regs.asc19 module_model_id 0x0000 16
20 module_revision_number_major 0x0002 8
21 frame_count 0x0005 8
22 pixel_order 0x0006 8
23 - e GRBG 0
27 MIPI_CCS_version 0x0007 8
28 - e v1_0 0x10
29 - e v1_1 0x11
31 - f minor 0 3
32 data_pedestal 0x0008 16
[all …]
/Documentation/filesystems/ext4/
Dsuper.rst12 number is either 0 or a power of 3, 5, or 7. If the flag is not set,
29 * - 0x0
33 * - 0x4
37 * - 0x8
41 * - 0xC
45 * - 0x10
49 * - 0x14
53 is typically 0 for all other block sizes.
54 * - 0x18
58 * - 0x1C
[all …]
/Documentation/arch/m68k/
Dkernel-options.rst13 0) Introduction
76 /dev/ram: -> 0x0100 (initial ramdisk)
77 /dev/hda: -> 0x0300 (first IDE disk)
78 /dev/hdb: -> 0x0340 (second IDE disk)
79 /dev/sda: -> 0x0800 (first SCSI disk)
80 /dev/sdb: -> 0x0810 (second SCSI disk)
81 /dev/sdc: -> 0x0820 (third SCSI disk)
82 /dev/sdd: -> 0x0830 (forth SCSI disk)
83 /dev/sde: -> 0x0840 (fifth SCSI disk)
84 /dev/fd : -> 0x0200 (floppy disk)
[all …]

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