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/Documentation/devicetree/bindings/bus/
Dmicrosoft,vmbus.yaml51 ranges = <0x0f 0xf0000000 0x0f 0xf0000000 0x10000000>;
/Documentation/input/devices/
Dcma3000_d0x.rst76 Input driver version is 1.0.0
77 Input device ID: bus 0x18 vendor 0x0 product 0x0 version 0x0
82 Event type 0 (Sync)
84 Event code 0 (X)
100 Value 0
101 Min 0
111 0: power down mode
132 X: (X & 0x70) * 100 ms (MDTMR)
133 (X & 0x0F) * 2.5 ms (FFTMR 400 Hz)
134 (X & 0x0F) * 10 ms (FFTMR 100 Hz)
[all …]
/Documentation/devicetree/bindings/sound/
Dcs42l73.txt12 - chgfreq : Charge Pump Frequency values 0x00-0x0F
19 reg = <0x4a>;
20 reset_gpio = <&gpio 10 0>;
21 chgfreq = <0x05>;
Deverest,es8326.yaml28 const: 0
35 Bit(1)/(0) decides the mic property to be OMTP/CTIA or auto.
36 minimum: 0x00
37 maximum: 0x0f
38 default: 0x0f
45 minimum: 0x00
46 maximum: 0x77
47 default: 0x22
54 minimum: 0x00
55 maximum: 0x77
[all …]
Dcs42l52.txt15 Allowable values of 0x00 through 0x0F. These are raw values written to the
30 0 = 0.5 x VA
41 reg = <0x4a>;
42 reset-gpio = <&gpio 10 0>;
43 cirrus,chgfreq-divisor = <0x05>;
Dcs42l56.txt18 Allowable values of 0x00 through 0x0F. These are raw values written to the
31 0 = 0.5 x VA
40 0 = Adapt to Volume Mode. Voltage level determined by the sum of the relevant volume settings.
47 0 = 1.8Hz
57 reg = <0x4b>;
58 cirrus,gpio-nreset = <&gpio 10 0>;
59 cirrus,chgfreq-divisor = <0x05>;
/Documentation/devicetree/bindings/ata/
Dceva,ahci-1v84.yaml44 OOB timing value for COMINIT parameter for port 0.
56 OOB timing value for COMWAKE parameter for port 0.
68 Burst timing value for COM parameter for port 0.
80 Retry interval timing value for port 0.
175 reg = <0xfd0c0000 0x200>;
177 interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
179 ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
180 ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
181 ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
182 ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
[all …]
/Documentation/devicetree/bindings/display/bridge/
Dtoshiba,tc358775.yaml30 description: i2c address of the bridge, 0x0f
50 port@0:
83 - port@0
115 reg = <0x078b8000 0x500>;
118 #size-cells = <0>;
122 reg = <0x0f>;
132 #size-cells = <0>;
134 port@0 {
135 reg = <0>;
153 reg = <0x1a98000 0x25c>;
[all …]
Dtoshiba,tc358767.yaml28 - 0x0f
29 - 0x68
31 i2c address of the bridge, 0x68 or 0x0f, depending on bootstrap pins
58 - 0
60 description: TC358767 GPIO pin number to which HPD is connected to (0 or 1)
66 port@0:
116 - 0 # No pre-emphasis
122 - port@0
144 #size-cells = <0>;
148 reg = <0x68>;
[all …]
/Documentation/devicetree/bindings/rtc/
Dmstar,ssd202d-rtc.yaml10 - Daniel Palmer <daniel@0x0f.com>
33 reg = <0x6800 0x200>;
Dmstar,msc313-rtc.yaml13 - Daniel Palmer <daniel@0x0f.com>
45 reg = <0x2400 0x40>;
/Documentation/devicetree/bindings/watchdog/
Dmstar,msc313e-wdt.yaml10 - Daniel Palmer <daniel@0x0f.com>
38 reg = <0x6000 0x1f>;
/Documentation/devicetree/bindings/timer/
Dmstar,msc313e-timer.yaml10 - Daniel Palmer <daniel@0x0f.com>
42 reg = <0x6040 0x40>;
44 interrupts-extended = <&intc_fiq GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
/Documentation/devicetree/bindings/iio/adc/
Dst,stmpe-adc.yaml40 st,norequest-mask = <0x0f>; /* dont use ADC CH3-0 */
Dqcom,pm8018-adc.yaml27 ADC base address in the PMIC, typically 0x197.
41 with two valid bits so legal values are 0x00, 0x01 or 0x02.
42 The second cell is the main analog mux setting (0x00..0x0f).
47 const: 0
67 "^(adc-channel@)[0-9a-f]$":
74 1:1 ratio converters that sample 625, 1250 and 0 milliV and create
104 0 = XO_IN/XOADC_GND
121 #size-cells = <0>;
125 reg = <0x197>;
128 #size-cells = <0>;
[all …]
/Documentation/devicetree/bindings/iio/magnetometer/
Dasahi-kasei,ak8974.yaml46 #size-cells = <0>;
50 reg = <0x0f>;
53 interrupts = <0 IRQ_TYPE_EDGE_RISING>,
/Documentation/devicetree/bindings/pci/
D83xx-512x-pci.txt12 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
14 /* IDSEL 0x0E -mini PCI */
15 0x7000 0x0 0x0 0x1 &ipic 18 0x8
16 0x7000 0x0 0x0 0x2 &ipic 18 0x8
17 0x7000 0x0 0x0 0x3 &ipic 18 0x8
18 0x7000 0x0 0x0 0x4 &ipic 18 0x8
20 /* IDSEL 0x0F - PCI slot */
21 0x7800 0x0 0x0 0x1 &ipic 17 0x8
22 0x7800 0x0 0x0 0x2 &ipic 18 0x8
23 0x7800 0x0 0x0 0x3 &ipic 17 0x8
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dtc358743.txt18 - clock-lanes: should be <0>
32 reg = <0x0f>;
43 clock-lanes = <0>;
/Documentation/devicetree/bindings/iio/light/
Dsharp,gp2ap002.yaml72 #size-cells = <0>;
76 reg = <0x44>;
82 sharp,proximity-far-hysteresis = /bits/ 8 <0x2f>;
83 sharp,proximity-close-hysteresis = /bits/ 8 <0x0f>;
/Documentation/devicetree/bindings/media/
Dqcom,msm8996-venus.yaml114 reg = <0x00c00000 0xff000>;
122 iommus = <&venus_smmu 0x00>,
123 <&venus_smmu 0x01>,
124 <&venus_smmu 0x0a>,
125 <&venus_smmu 0x07>,
126 <&venus_smmu 0x0e>,
127 <&venus_smmu 0x0f>,
128 <&venus_smmu 0x08>,
129 <&venus_smmu 0x09>,
130 <&venus_smmu 0x0b>,
[all …]
/Documentation/devicetree/bindings/usb/
Dti,tps6598x.yaml33 The patch address can be any value except 0x00, 0x20,
34 0x21, 0x22, and 0x23
101 #size-cells = <0>;
105 reg = <0x38>;
113 pinctrl-0 = <&typec_pins>;
132 #size-cells = <0>;
136 reg = <0x21>, <0x0f>;
145 pinctrl-0 = <&typec_pins>;
/Documentation/devicetree/bindings/leds/backlight/
Dlp855x-backlight.yaml61 "^rom-[0-9a-f]{2}h$":
85 #size-cells = <0>;
89 reg = <0x2c>;
91 dev-ctrl = /bits/ 8 <0x00>;
93 pwms = <&pwm 0 10000>;
98 rom-addr = /bits/ 8 <0x14>;
99 rom-val = /bits/ 8 <0xcf>;
104 rom-addr = /bits/ 8 <0x15>;
105 rom-val = /bits/ 8 <0xc7>;
110 rom-addr = /bits/ 8 <0x19>;
[all …]
/Documentation/networking/
Dplip.rst126 Parallel Transfer Mode 0 Cable
193 PLIP Mode 0 transfer protocol
197 standard in Mode 0. That standard specifies the following protocol::
199 send header nibble '0x8'
207 <wait for rx. '0x1?'> <send 0x10+(octet&0x0F)>
208 <wait for rx. '0x0?'> <send 0x00+((octet>>4)&0x0F)>
210 To start a transfer the transmitting machine outputs a nibble 0x08.
217 (OUT is bit 0-4, OUT.j is bit j from OUT. IN likewise)
221 OUT := high nibble, OUT.4 := 0
222 WAIT FOR IN.4 = 0
/Documentation/userspace-api/media/v4l/
Dvidioc-g-enc-index.rst62 :header-rows: 0
63 :stub-columns: 0
89 :header-rows: 0
90 :stub-columns: 0
121 :header-rows: 0
122 :stub-columns: 0
126 - 0x00
129 - 0x01
132 - 0x02
135 - 0x0F
[all …]
/Documentation/devicetree/bindings/clock/
Dti,lmk04832.yaml30 const: 0
53 CLKin_SEL0 0
57 enum: [0, 1, 2]
74 Normal SYNC 0
79 enum: [0, 1, 2, 3]
85 enum: [0, 1, 2]
96 "@[0-9a-d]+$":
105 minimum: 0
112 Powerdown 0x00
113 LVDS 0x01
[all …]

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