Searched +full:0 +full:x1 (Results 1 – 25 of 298) sorted by relevance
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| /Documentation/devicetree/bindings/dma/ |
| D | brcm,iproc-sba.txt | 21 mboxes = <&raid_mbox 0 0x1 0xffff>,
22 <&raid_mbox 1 0x1 0xffff>,
23 <&raid_mbox 2 0x1 0xffff>,
24 <&raid_mbox 3 0x1 0xffff>,
25 <&raid_mbox 4 0x1 0xffff>,
26 <&raid_mbox 5 0x1 0xffff>,
27 <&raid_mbox 6 0x1 0xffff>,
28 <&raid_mbox 7 0x1 0xffff>;
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| D | st_fdma.txt | 27 reg = <0x8e20000 0x8000>,
28 <0x8e30000 0x3000>,
29 <0x8e37000 0x1000>,
30 <0x8e38000 0x8000>;
51 -bit 2-0: Holdoff value, dreq will be masked for
52 0x0: 0-0.5us
53 0x1: 0.5-1us
54 0x2: 1-1.5us
56 0x0: disabled
57 0x1: enabled
[all …]
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| /Documentation/devicetree/bindings/sound/ |
| D | qcom,pm8916-wcd-analog-codec.yaml | 110 reg = <0x1 SPMI_USID>;
112 #size-cells = <0>;
116 reg = <0xf000>;
120 interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
121 <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
122 <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
123 <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
124 <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
125 <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
126 <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
[all …]
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| /Documentation/input/devices/ |
| D | alps.rst | 32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
45 The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
94 byte 0: 0 0 YSGN XSGN 1 M R L
95 byte 1: X7 X6 X5 X4 X3 X2 X1 X0
109 byte 0: 1 0 0 0 1 x9 x8 x7
110 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
111 byte 2: 0 ? ? l r ? fin ges
112 byte 3: 0 ? ? ? ? y9 y8 y7
113 byte 4: 0 y6 y5 y4 y3 y2 y1 y0
[all …]
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| /Documentation/devicetree/bindings/pci/ |
| D | cdns,cdns-pcie-host.yaml | 44 bus-range = <0x0 0xff>;
45 linux,pci-domain = <0>;
46 vendor-id = <0x17cd>;
47 device-id = <0x0200>;
49 reg = <0x0 0xfb000000 0x0 0x01000000>,
50 <0x0 0x41000000 0x0 0x00001000>;
53 ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
54 <0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
55 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
57 #interrupt-cells = <0x1>;
[all …]
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| D | pci-msi.txt | 13 * Bits [2:0] are the Function number.
67 reg = <0xa 0x1>;
74 reg = <0xf 0x1>;
82 msi-map = <0x0 &msi_a 0x0 0x10000>,
95 reg = <0xa 0x1>;
102 reg = <0xf 0x1>;
110 msi-map = <0x0 &msi_a 0x0 0x100>,
111 msi-map-mask = <0xff>
124 reg = <0xa 0x1>;
131 reg = <0xf 0x1>;
[all …]
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| D | pci-iommu.txt | 13 * Bits [2:0] are the Function number.
56 reg = <0xa 0x1>;
62 reg = <0xf 0x1>;
70 iommu-map = <0x0 &iommu 0x0 0x10000>;
83 reg = <0xa 0x1>;
89 reg = <0xf 0x1>;
97 iommu-map = <0x0 &iommu 0x0 0x10000>;
98 iommu-map-mask = <0xfff8>;
111 reg = <0xa 0x1>;
117 reg = <0xf 0x1>;
[all …]
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| D | host-generic-pci.yaml | 94 property. If no "bus-range" is specified, this will be bus 0 (the
160 bus-range = <0x0 0x1>;
163 reg = <0x0 0x40000000 0x0 0x1000000>;
166 ranges = <0x01000000 0x0 0x01000000 0x0 0x01000000 0x0 0x00010000>,
167 <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x3f000000>;
169 #interrupt-cells = <0x1>;
172 interrupt-map = < 0x0 0x0 0x0 0x1 &gic 0x0 0x4 0x1>,
173 < 0x800 0x0 0x0 0x1 &gic 0x0 0x5 0x1>,
174 <0x1000 0x0 0x0 0x1 &gic 0x0 0x6 0x1>,
175 <0x1800 0x0 0x0 0x1 &gic 0x0 0x7 0x1>;
[all …]
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| D | xgene-pci.txt | 35 reg = < 0x00 0x1f2b0000 0x0 0x00010000 /* Controller registers */
36 0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */
38 ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000 /* io */
39 0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */
40 dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
41 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
42 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
43 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
44 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
45 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
[all …]
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| D | xgene-pci-msi.txt | 8 - reg: physical base address (0x79000000) and length (0x900000) for controller
13 interrupt number 0x10 to 0x1f.
27 reg = <0x00 0x79000000 0x0 0x900000>;
28 interrupts = <0x0 0x10 0x4>
29 <0x0 0x11 0x4>
30 <0x0 0x12 0x4>
31 <0x0 0x13 0x4>
32 <0x0 0x14 0x4>
33 <0x0 0x15 0x4>
34 <0x0 0x16 0x4>
[all …]
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| /Documentation/gpu/ |
| D | afbc.rst | 31 * Component 0: R
36 fourcc:modifier pair. In general, component '0' is considered to
42 * Component 0: R(8)
49 * Component 0: R(8)
55 * Component 0: Y(8)
56 * Component 1: Cb(8, 2x1 subsampled)
57 * Component 2: Cr(8, 2x1 subsampled)
65 * Component 0: R(8)
94 * Plane 0:
96 * Component 0: Y(8)
[all …]
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| /Documentation/devicetree/bindings/mailbox/ |
| D | brcm,iproc-flexrm-mbox.txt | 45 reg = <0x67000000 0x200000>;
46 msi-parent = <&gic_its 0x7f00>;
52 reg = <0x672c0000 0x1000>;
53 mboxes = <&crypto_mbox 0 0x1 0xffff>,
54 <&crypto_mbox 1 0x1 0xffff>,
55 <&crypto_mbox 16 0x1 0xffff>,
56 <&crypto_mbox 17 0x1 0xffff>,
57 <&crypto_mbox 30 0x1 0xffff>,
58 <&crypto_mbox 31 0x1 0xffff>;
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| /Documentation/devicetree/bindings/dma/stm32/ |
| D | st,stm32-dma.yaml | 20 0x0: no address increment between transfers
21 0x1: increment address between transfers
23 0x0: no address increment between transfers
24 0x1: increment address between transfers
26 0x0: offset size is linked to the peripheral bus width
27 0x1: offset size is fixed to 4 (32-bit alignment)
29 0x0: low
30 0x1: medium
31 0x2: high
32 0x3: very high
[all …]
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| D | st,stm32-dma3.yaml | 61 -bit 0-1: The priority level
62 0x0: low priority, low weight
63 0x1: low priority, mid weight
64 0x2: low priority, high weight
65 0x3: high priority
67 0x0: no FIFO requirement/any channel can fit
68 0x2: FIFO of 8 bytes (2^2+1)
69 0x4: FIFO of 32 bytes (2^4+1)
70 0x6: FIFO of 128 bytes (2^6+1)
71 0x7: FIFO of 256 bytes (2^7+1)
[all …]
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-xgene-sb.txt | 25 0 = active high
30 - first cell is 0-N corresponding for EXT_INT_0 to EXT_INT_N.
40 reg = <0x0 0x17001000 0x0 0x400>;
43 interrupts = <0x0 0x28 0x1>,
44 <0x0 0x29 0x1>,
45 <0x0 0x2a 0x1>,
46 <0x0 0x2b 0x1>,
47 <0x0 0x2c 0x1>,
48 <0x0 0x2d 0x1>;
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| /Documentation/hwmon/ |
| D | oxp-sensors.rst | 50 - OneXPlayer X1 A
51 - OneXPlayer X1 i
52 - OneXPlayer X1 mini
63 - OneXPlayer X1 A
64 - OneXPlayer X1 i
65 - OneXPlayer X1 mini
76 Read Write. Enable manual fan control. Write "1" to set to manual, write "0"
80 Read Write. Read this attribute to see current duty cycle in the range [0-255].
81 When pwm1_enable is set to "1" (manual) write any value in the range [0-255]
86 button behaviour function. Write "1" to activate the switch and "0" to
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| /Documentation/devicetree/bindings/nvmem/ |
| D | mediatek,efuse.yaml | 23 pattern: "^efuse@[0-9a-f]+$"
58 reg = <0x11c10000 0x1000>;
63 reg = <0x184 0x1>;
64 bits = <0 5>;
67 reg = <0x184 0x2>;
71 reg = <0x185 0x1>;
75 reg = <0x186 0x1>;
76 bits = <0 5>;
79 reg = <0x186 0x2>;
83 reg = <0x187 0x1>;
[all …]
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| /Documentation/devicetree/bindings/arm/ |
| D | ste-nomadik.txt | 31 gpios = <&gpio3 19 0x1>;
32 interrupts = <19 0x1>;
36 gpios = <&gpio3 16 0x1>;
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| /Documentation/userspace-api/media/v4l/ |
| D | subdev-image-processing-full.svg | 9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
39 inkscape:pageopacity="0"
45 fit-margin-top="0"
46 fit-margin-left="0"
47 fit-margin-right="0"
48 fit-margin-bottom="0"
67 style="fill:none;fill-opacity:0;stroke:#ff765a;stroke-width:2"
75 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
91 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
97 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
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| D | subdev-image-processing-scaling-multi-source.svg | 9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
39 inkscape:pageopacity="0"
45 fit-margin-top="0"
46 fit-margin-left="0"
47 fit-margin-right="0"
48 fit-margin-bottom="0"
57 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
74 style="fill:none;fill-opacity:0;stroke:#a52a2a;stroke-width:2"
92 style="fill:none;fill-opacity:0;stroke:#0000ff;stroke-width:2"
152 style="fill:none;fill-opacity:0;stroke:#00ff00;stroke-width:2"
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| /Documentation/userspace-api/media/dvb/ |
| D | legacy_dvb_osd.rst | 71 :stub-columns: 0
91 | Returns 0 on success.
97 - | x0,y0,x1,y1,
98 | BitPerPixel[2/4/8]{color&0x0F},
99 | mix[0..15]{color&0xF0}
102 | Returns 0 on success,
113 | Returns 0 on success.
122 | Returns 0 on success.
130 - | Sets all pixel to color 0.
131 | Returns 0 on success.
[all …]
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| /Documentation/devicetree/bindings/mfd/ |
| D | st,stm32-timers.yaml | 68 const: 0
93 "index" indicates on which break input (0 or 1) the
95 enum: [0, 1]
97 "level" gives the active level (0=low or 1=high) of the
99 enum: [0, 1]
122 "^timer@[0-9]+$":
135 minimum: 0
155 #size-cells = <0>;
157 reg = <0x40000000 0x400>;
160 dmas = <&dmamux1 18 0x400 0x1>,
[all …]
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | google,goldfish-pic.txt | 15 #interrupt-cells = <0x1>;
16 #address-cells = <0>;
23 reg = <0x1f000000 0x1000>;
26 #interrupt-cells = <0x1>;
29 interrupts = <0x2>;
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| /Documentation/devicetree/bindings/fpga/ |
| D | lattice-machxo2-spi.txt | 17 #address-cells = <0x1>;
18 #size-cells = <0x1>;
24 fpga_mgr_spi: fpga-mgr@0 {
27 reg = <0>;
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| /Documentation/devicetree/bindings/rtc/ |
| D | st,m48t86.yaml | 35 reg = <0x10800000 0x1>, <0x11700000 0x1>;
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