Home
last modified time | relevance | path

Searched +full:0 +full:x101 (Results 1 – 17 of 17) sorted by relevance

/Documentation/devicetree/bindings/display/
Dmulti-inno,mi0283qt.txt11 the panel interface mode (IM[3:0] pins):
13 - absent: IM=x101 3-wire 9-bit data serial interface
17 - rotation: panel rotation in degrees counter clockwise (0,90,180,270)
20 mi0283qt@0{
22 reg = <0>;
25 dc-gpios = <&gpio 25 0>;
/Documentation/devicetree/bindings/arm/
Dnvidia,tegra194-ccplex.yaml41 #size-cells = <0>;
43 cpu0_0: cpu@0 {
46 reg = <0x0>;
53 reg = <0x001>;
60 reg = <0x100>;
67 reg = <0x101>;
Dcpus.yaml30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
31 the reg property contained in bits 7 down to 0
49 this property is required and must be set to 0.
52 required and matches the CPUID[11:0] register bits.
54 Bits [11:0] in the reg cell must be set to
55 bits [11:0] in CPU ID register.
57 All other bits in the reg cell must be set to 0.
60 required and matches the CPU MPIDR[23:0] register
63 Bits [23:0] in the reg cell must be set to
64 bits [23:0] in MPIDR.
[all …]
Darm,cci-400.yaml24 pattern: "^cci(@[0-9a-f]+)?$"
43 "^slave-if@[0-9a-f]+$":
65 "^pmu@[0-9a-f]+$":
119 arm,hbi = <0x249>;
129 * registers sits at address 0x000000002c090000.
131 * CCI slave interface @0x000000002c091000 is connected to dma
134 * CCI slave interface @0x000000002c094000 is connected to CPUs
137 * CCI slave interface @0x000000002c095000 is connected to CPUs
142 #size-cells = <0>;
145 CPU0: cpu@0 {
[all …]
/Documentation/devicetree/bindings/cpu/
Dcpu-capacity.txt70 #size-cells = <0>;
101 CPU_SLEEP_0: cpu-sleep-0 {
103 arm,psci-suspend-param = <0x0010000>;
110 CLUSTER_SLEEP_0: cluster-sleep-0 {
112 arm,psci-suspend-param = <0x1010000>;
120 A57_0: cpu@0 {
122 reg = <0x0 0x0>;
126 clocks = <&scpi_dvfs 0>;
133 reg = <0x0 0x1>;
137 clocks = <&scpi_dvfs 0>;
[all …]
Dcpu-topology.txt87 (ie socket/cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes
89 sequential N value, starting from 0).
187 #size-cells = <0>;
276 CPU0: cpu@0 {
279 reg = <0x0 0x0>;
281 cpu-release-addr = <0 0x20000000>;
287 reg = <0x0 0x1>;
289 cpu-release-addr = <0 0x20000000>;
295 reg = <0x0 0x100>;
297 cpu-release-addr = <0 0x20000000>;
[all …]
Didle-states.yaml102 between 0 and infinite time, until a wake-up event occurs.
127 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
167 0| 1 time(ms)
172 The graph curve with X-axis values = { x | 0 < x < 1ms } has a steep slope
444 #size-cells = <0>;
447 cpu@0 {
450 reg = <0x0 0x0>;
459 reg = <0x0 0x1>;
468 reg = <0x0 0x100>;
477 reg = <0x0 0x101>;
[all …]
/Documentation/devicetree/bindings/thermal/
Dthermal-idle.yaml62 #size-cells = <0>;
69 reg = <0x0 0x100>;
85 reg = <0x0 0x101>;
140 cooling-device = <&cpu_b0_therm 0 15 >,
141 <&cpu_b1_therm 0 15>;
/Documentation/devicetree/bindings/powerpc/fsl/
Dmsi-pic.txt45 reg = <0x41600 0x80>;
46 msi-available-ranges = <0 0x100>;
48 0xe0 0
49 0xe1 0
50 0xe2 0
51 0xe3 0
52 0xe4 0
53 0xe5 0
54 0xe6 0
55 0xe7 0>;
[all …]
/Documentation/devicetree/bindings/cpufreq/
Dqcom-cpufreq-nvmem.yaml79 '^cpu@[0-9a-f]+$':
102 '^opp-?[0-9]+$':
118 #size-cells = <0>;
123 reg = <0x100>;
137 reg = <0x101>;
151 reg = <0x102>;
165 reg = <0x103>;
Dcpufreq-mediatek.txt66 cpu0: cpu@0 {
69 reg = <0x0>;
79 reg = <0x1>;
85 reg = <0x2>;
91 reg = <0x3>;
186 cpu0: cpu@0 {
189 reg = <0x000>;
201 reg = <0x001>;
213 reg = <0x100>;
225 reg = <0x101>;
/Documentation/admin-guide/perf/
Dhisi-pcie-pmu.rst42 $# perf stat -e hisi_pcie0_core0/rx_mwr_latency,port=0xffff/
43 $# perf stat -e hisi_pcie0_core0/rx_mwr_cnt,port=0xffff/
52 b) By event type, such as "event=0xXXXX, event=0x1XXXX".
56 …$# perf stat -e "{hisi_pcie0_core0/rx_mwr_latency,port=0xffff/,hisi_pcie0_core0/rx_mwr_cnt,port=0x…
73 "bdf" filter will be in effect, because "bdf=0" meaning 0000:000:00.0.
83 bitmap should be set, port=0x1; if target Root Port is 0000:00:04.0 (x4
84 lanes), bit8 is set, port=0x100; if these two Root Ports are both
85 monitored, port=0x101.
89 $# perf stat -e hisi_pcie0_core0/rx_mwr_latency,port=0x1/ sleep 5
97 For example, "bdf=0x3900" means BDF of target Endpoint is 0000:39:00.0.
[all …]
/Documentation/fb/
Dvesafb.rst46 256 0x101 0x103 0x105 0x107
47 32k 0x110 0x113 0x116 0x119
48 64k 0x111 0x114 0x117 0x11A
49 16M 0x112 0x115 0x118 0x11B
54 0x200:
56 Linux_kernel_mode_number = VESA_mode_number + 0x200
63 256 0x301 0x303 0x305 0x307
64 32k 0x310 0x313 0x316 0x319
65 64k 0x311 0x314 0x317 0x31A
66 16M 0x312 0x315 0x318 0x31B
[all …]
Dmatroxfb.rst31 pass to the kernel this command line: "video=matroxfb:vesa:0x1BB".
35 unless you have primary display on non-Matrox VBE2.0 device (see
48 4 0x12 0x102
49 8 0x100 0x101 0x180 0x103 0x188
50 15 0x110 0x181 0x113 0x189
51 16 0x111 0x182 0x114 0x18A
52 24 0x1B2 0x184 0x1B5 0x18C
53 32 0x112 0x183 0x115 0x18B
63 4 0x104 0x106
64 8 0x105 0x190 0x107 0x198 0x11C
[all …]
/Documentation/sound/hd-audio/
Dmodels.rst59 Disable HP EAPD on NID 0x15
61 Enable SPDIF output on NID 0x1e
151 asus-x101
152 ASUS X101 fixups
308 Bass speaker fixup on pin 0x16
310 Bass speaker fixup on pin 0x1a
328 Fix invalid 0x15 / 0x16 pins
351 Enable audio CD pin NID 0x1c
353 Disable front HP pin NID 0x1b
520 Enable headphone mic NID 0x18 without detection
[all …]
/Documentation/devicetree/bindings/opp/
Dopp-v2-kryo-cpu.yaml43 '^opp-?[0-9]+$':
58 0: MSM8996, speedbin 0
65 0-3: unused
66 4: MSM8996SG, speedbin 0
72 0: IPQ8062
84 '^opp-microvolt-speed[0-9]+-pvs[0-9]+$': true
97 '^opp-?[0-9]+$':
113 #size-cells = <0>;
115 CPU0: cpu@0 {
118 reg = <0x0 0x0>;
[all …]
Dopp-v2.yaml29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
36 clocks = <&clk_controller 0>;
47 clocks = <&clk_controller 0>;
86 #size-cells = <0>;
88 cpu@0 {
91 reg = <0>;
93 clocks = <&clk_controller 0>;
170 #size-cells = <0>;
[all …]