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/Documentation/devicetree/bindings/net/
Dmdio-mux-gpio.yaml44 gpios = <&gpio1 3 0>, <&gpio1 4 0>;
47 #size-cells = <0>;
52 #size-cells = <0>;
56 marvell,reg-init = <3 0x10 0 0x5777>,
57 <3 0x11 0 0x00aa>,
58 <3 0x12 0 0x4105>,
59 <3 0x13 0 0x0a60>;
65 marvell,reg-init = <3 0x10 0 0x5777>,
66 <3 0x11 0 0x00aa>,
67 <3 0x12 0 0x4105>,
[all …]
Dstarfive,jh7110-dwmac.yaml149 reg = <0x16030000 0x10000>;
171 starfive,syscon = <&aon_syscon 0xc 0x12>;
176 #size-cells = <0>;
179 phy0: ethernet-phy@0 {
180 reg = <0>;
188 snps,blen = <256 128 64 32 0 0 0>;
/Documentation/devicetree/bindings/leds/
Dawinic,aw200xx.yaml16 - AW20036 (3x12) 36 LEDs
18 - AW20072 (6x12) 72 LEDs
19 - AW20108 (9x12) 108 LEDs
42 const: 0
48 "^led@[0-9a-f]+$":
80 "^led@[0-9a-f]+$":
84 minimum: 0
94 "^led@[0-9a-f]+$":
98 minimum: 0
108 "^led@[0-9a-f]+$":
[all …]
/Documentation/devicetree/bindings/goldfish/
Dpipe.txt15 reg = <ff018000 0x2000>;
16 interrupts = <0x12>;
/Documentation/devicetree/bindings/power/supply/
Dqcom,pm8916-lbc.yaml96 #size-cells = <0>;
100 reg = <0x1000>, <0x1200>, <0x1300>, <0x1600>;
103 interrupts = <0x0 0x10 0 IRQ_TYPE_EDGE_BOTH>,
104 <0x0 0x10 5 IRQ_TYPE_EDGE_BOTH>,
105 <0x0 0x10 6 IRQ_TYPE_EDGE_BOTH>,
106 <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>,
107 <0x0 0x12 0 IRQ_TYPE_EDGE_BOTH>,
108 <0x0 0x12 1 IRQ_TYPE_EDGE_BOTH>,
109 <0x0 0x13 0 IRQ_TYPE_EDGE_BOTH>,
110 <0x0 0x13 1 IRQ_TYPE_EDGE_BOTH>,
[all …]
Dqcom,pmi8998-charger.yaml62 #size-cells = <0>;
67 reg = <0x1000>;
69 interrupts = <0x2 0x12 0x2 IRQ_TYPE_EDGE_BOTH>,
70 <0x2 0x13 0x4 IRQ_TYPE_EDGE_BOTH>,
71 <0x2 0x13 0x6 IRQ_TYPE_EDGE_RISING>,
72 <0x2 0x16 0x1 IRQ_TYPE_EDGE_RISING>;
Dqcom,pm8941-charger.yaml151 #size-cells = <0>;
155 reg = <0x1000>;
156 interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>,
157 <0x0 0x10 5 IRQ_TYPE_EDGE_BOTH>,
158 <0x0 0x10 4 IRQ_TYPE_EDGE_BOTH>,
159 <0x0 0x12 1 IRQ_TYPE_EDGE_BOTH>,
160 <0x0 0x12 0 IRQ_TYPE_EDGE_BOTH>,
161 <0x0 0x13 2 IRQ_TYPE_EDGE_BOTH>,
162 <0x0 0x13 1 IRQ_TYPE_EDGE_BOTH>,
163 <0x0 0x14 1 IRQ_TYPE_EDGE_BOTH>;
/Documentation/devicetree/bindings/rtc/
Dsunplus,sp7021-rtc.yaml49 reg = <0x9c003a00 0x80>;
51 clocks = <&clkc 0x12>;
52 resets = <&rstc 0x02>;
/Documentation/devicetree/bindings/sound/
Dasahi-kasei,ak4642.yaml26 const: 0
28 const: 0
49 #size-cells = <0>;
52 #sound-dai-cells = <0>;
53 reg = <0x12>;
54 #clock-cells = <0>;
Drt5663.txt28 If the value is 0, it means the impedance sensing is not supported.
33 < 0 300 7 0xffd160 0xffd1c0 0xff8a10 0xff8ab0
34 301 65535 4 0xffe470 0xffe470 0xffb8e0 0xffb8e0>
56 reg = <0x12>;
/Documentation/w1/slaves/
Dw1_ds2406.rst7 * Maxim DS2406 (and other family 0x12) addressable switches
21 current state of each switch, with PIO A in bit 0 and PIO B in bit 1. The
22 driver ORs this state with 0x30, so shell scripts get an ASCII 0/1/2/3 to
23 work with. output is writable; bits 0 and 1 control PIO A and B,
/Documentation/devicetree/bindings/iio/magnetometer/
Dbosch,bmc150_magn.yaml52 #size-cells = <0>;
56 reg = <0x12>;
58 interrupts = <0 1>;
/Documentation/admin-guide/perf/
Dimx-ddr.rst11 is one register for each counter. Counter 0 is special in that it always counts
28 AXI filtering is only used by CSV modes 0x41 (axid-read) and 0x42 (axid-write)
32 type of AXI filter (filter, enhanced_filter and super_filter). Value 0 for
35 * With DDR_CAP_AXI_ID_FILTER quirk(filter: 1, enhanced_filter: 0, super_filter: 0).
40 - 0: corresponding bit is masked.
54 perf stat -a -e imx8_ddr0/axid-read,axi_mask=0xMMMM,axi_id=0xDDDD/ cmd
55 perf stat -a -e imx8_ddr0/axid-write,axi_mask=0xMMMM,axi_id=0xDDDD/ cmd
65 perf stat -a -e imx8_ddr0/axid-read,axi_id=0x12/ cmd, which will monitor ARID=0x12
67 * With DDR_CAP_AXI_ID_FILTER_ENHANCED quirk(filter: 1, enhanced_filter: 1, super_filter: 0).
72 * With DDR_CAP_AXI_ID_PORT_CHANNEL_FILTER quirk(filter: 0, enhanced_filter: 0, super_filter: 1).
[all …]
/Documentation/devicetree/bindings/iio/proximity/
Dawinic,aw96103.yaml53 #size-cells = <0>;
56 reg = <0x12>;
/Documentation/driver-api/thermal/
Dexynos_thermal_emulation.rst12 Exynos 4x12 (4212, 4412) and 5 series provide emulation mode for thermal
22 The sysfs node, 'emul_node', will contain value 0 for the initial state.
39 Disabling emulation mode only requires writing value 0 to sysfs node.
56 0 |______________|_____________|__________|__________|_________
60 emulation : 0 50 | 70 | 20 | 0
/Documentation/devicetree/bindings/regulator/
Drenesas,raa215300.yaml69 #clock-cells = <0>;
75 #size-cells = <0>;
79 reg = <0x12>, <0x6f>;
/Documentation/devicetree/bindings/pci/
Dxgene-pci-msi.txt8 - reg: physical base address (0x79000000) and length (0x900000) for controller
13 interrupt number 0x10 to 0x1f.
27 reg = <0x00 0x79000000 0x0 0x900000>;
28 interrupts = <0x0 0x10 0x4>
29 <0x0 0x11 0x4>
30 <0x0 0x12 0x4>
31 <0x0 0x13 0x4>
32 <0x0 0x14 0x4>
33 <0x0 0x15 0x4>
34 <0x0 0x16 0x4>
[all …]
/Documentation/hwmon/
Dzl6100.rst134 Datasheet: https://flexpowermodules.com/resources/fpm-techspec-bmr466-8x12
169 configuration data (0x11, 0x12, 0x15, 0x16, and 0xf4). The chips supported by
193 to set the interval to a value between 0 and 65,535 microseconds.
/Documentation/devicetree/bindings/iio/adc/
Dsamsung,exynos-adc.yaml63 register on Exynos3250/4x12/5250/5420/5800).
133 reg = <0x12d10000 0x100>;
134 interrupts = <0 106 0>;
148 pulldown-ohm = <0>;
158 reg = <0x126c0000 0x100>;
159 interrupts = <0 137 0>;
/Documentation/devicetree/bindings/opp/
Dallwinner,sun50i-h6-operating-points.yaml44 "^opp-[0-9]+$":
58 "^opp-microvolt-speed[0-9]$": true
113 opp-supported-hw = <0x1f>;
122 opp-supported-hw = <0x12>;
130 opp-supported-hw = <0x0a>;
/Documentation/sound/cards/
Demu10k1-jack.rst30 /usr/local/bin/jackd -R -dalsa -r48000 -p64 -n2 -D -Chw:0,2 -Phw:0,3 -S
60 capture_1 asio14 FXBUS2(0xe)
61 capture_2 asio15 FXBUS2(0xf)
62 capture_3 asio0 FXBUS2(0x0)
63 ~capture_4 Center EXTOUT(0x11) // mapped to by Center
64 ~capture_5 LFE EXTOUT(0x12) // mapped to by LFE
65 capture_6 asio3 FXBUS2(0x3)
66 capture_7 asio4 FXBUS2(0x4)
67 capture_8 asio5 FXBUS2(0x5)
68 capture_9 asio6 FXBUS2(0x6)
[all …]
/Documentation/virt/kvm/x86/
Dcpuid.rst16 function: KVM_CPUID_SIGNATURE (0x40000000)
20 eax = 0x40000001
21 ebx = 0x4b4d564b
22 ecx = 0x564b4d56
23 edx = 0x4d
28 Note also that old hosts set eax value to 0x0. This should
29 be interpreted as if the value was 0x40000001.
32 function: define KVM_CPUID_FEATURES (0x40000001)
44 KVM_FEATURE_CLOCKSOURCE 0 kvmclock available at msrs
45 0x11 and 0x12
[all …]
/Documentation/input/devices/
Dalps.rst32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
45 The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
94 byte 0: 0 0 YSGN XSGN 1 M R L
109 byte 0: 1 0 0 0 1 x9 x8 x7
110 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
111 byte 2: 0 ? ? l r ? fin ges
112 byte 3: 0 ? ? ? ? y9 y8 y7
113 byte 4: 0 y6 y5 y4 y3 y2 y1 y0
114 byte 5: 0 z6 z5 z4 z3 z2 z1 z0
[all …]
/Documentation/filesystems/ext4/
Dgroup_descr.rst53 * - 0x0
57 * - 0x4
61 * - 0x8
65 * - 0xC
69 * - 0xE
73 * - 0x10
77 * - 0x12
81 * - 0x14
85 * - 0x18
89 * - 0x1A
[all …]
/Documentation/driver-api/media/drivers/
Dtuners.rst12 - L= LG_API (VHF_LO=0x01, VHF_HI=0x02, UHF=0x08, radio=0x04)
13 - P= PHILIPS_API (VHF_LO=0xA0, VHF_HI=0x90, UHF=0x30, radio=0x04)
14 - T= TEMIC_API (VHF_LO=0x02, VHF_HI=0x04, UHF=0x01)
15 - A= ALPS_API (VHF_LO=0x14, VHF_HI=0x12, UHF=0x11)
16 - M= PHILIPS_MK3 (VHF_LO=0x01, VHF_HI=0x02, UHF=0x04, radio=0x19)
113 - TADC-M201D: PAL D/K+B/G+I (L,143/425) (sound control at I2C address 0xc8)
131 - TSBE1 has extra API 05,02,08 Control_byte=0xCB Source:[#f1]_

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