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Searched +full:0 +full:x18000000 (Results 1 – 14 of 14) sorted by relevance

/Documentation/devicetree/bindings/bus/
Dbrcm,bus-axi.txt26 reg = <0x18000000 0x1000>;
27 ranges = <0x00000000 0x18000000 0x00100000>;
31 interrupt-map-mask = <0x000fffff 0xffff>;
33 /* Ethernet Controller 0 */
34 <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
37 <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
39 /* PCIe Controller 0 */
40 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
41 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
42 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/Documentation/devicetree/bindings/sound/
Dmtk-btcvsd-snd.txt19 reg=<0 0x18000000 0 0x1000>,
20 <0 0x18080000 0 0x8000>;
23 mediatek,offset = <0xf00 0x800 0xfd0 0xfd4 0xfd8>;
/Documentation/devicetree/bindings/gpu/
Dnvidia,gk20a.txt46 reg = <0x0 0x57000000 0x0 0x01000000>,
47 <0x0 0x58000000 0x0 0x01000000>;
64 reg = <0x0 0x57000000 0x0 0x01000000>,
65 <0x0 0x58000000 0x0 0x01000000>;
82 reg = <0x0 0x17000000 0x0 0x1000000>,
83 <0x0 0x18000000 0x0 0x1000000>;
100 reg = <0x17000000 0x1000000>,
101 <0x18000000 0x1000000>;
/Documentation/devicetree/bindings/mtd/
Dflctl-nand.txt26 reg = <0xe6a30000 0x100>;
27 interrupts = <0x0d80>;
35 system@0 {
37 reg = <0x0 0x8000000>;
42 reg = <0x8000000 0x10000000>;
47 reg = <0x18000000 0x8000000>;
Dingenic,nand.yaml66 reg = <0x13410000 0x10000>;
69 ranges = <1 0 0x1b000000 0x1000000>,
70 <2 0 0x1a000000 0x1000000>,
71 <3 0 0x19000000 0x1000000>,
72 <4 0 0x18000000 0x1000000>,
73 <5 0 0x17000000 0x1000000>,
74 <6 0 0x16000000 0x1000000>;
80 reg = <1 0 0x1000000>;
83 #size-cells = <0>;
94 pinctrl-0 = <&pins_nemc>;
[all …]
/Documentation/devicetree/bindings/clock/
Dmediatek,mt6795-clock.yaml51 reg = <0 0x13000000 0 0x1000>;
57 reg = <0 0x16000000 0 0x1000>;
63 reg = <0 0x18000000 0 0x1000>;
/Documentation/devicetree/bindings/gpio/
Dbrcm,xgs-iproc-gpio.yaml31 minimum: 0
60 reg = <0x18000060 0x50>,
61 <0x18000000 0x50>;
/Documentation/devicetree/bindings/memory-controllers/
Dqca,ath79-ddr-controller.yaml51 reg = <0x18000000 0x100>;
60 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
Dingenic,nemc.yaml14 pattern: "^memory-controller@[0-9a-f]+$"
40 ".*@[0-9]+$":
61 reg = <0x13410000 0x10000>;
64 ranges = <1 0 0x1b000000 0x1000000>,
65 <2 0 0x1a000000 0x1000000>,
66 <3 0 0x19000000 0x1000000>,
67 <4 0 0x18000000 0x1000000>,
68 <5 0 0x17000000 0x1000000>,
69 <6 0 0x16000000 0x1000000>;
78 pinctrl-0 = <&pins_nemc_cs6>;
[all …]
/Documentation/devicetree/bindings/pci/
Dfsl,imx6q-pcie-ep.yaml134 reg = <0x33800000 0x100000>,
135 <0x18000000 0x8000000>,
136 <0x33900000 0x100000>,
137 <0x33b00000 0x100000>;
Dnvidia,tegra20-pcie.txt27 - cell 0 specifies the bus and device numbers of the root port:
30 - cell 1 denotes the upper 32 address bits and should be 0
45 - 0x81000000: I/O memory region
46 - 0x82000000: non-prefetchable memory region
47 - 0xc2000000: prefetchable memory region
73 - pinctrl-0: phandle for the default/active state of pin configurations.
104 - If lanes 0 to 3 are used:
150 - Root port 0 uses 4 lanes, root port 1 is unused.
158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
171 reg = <0x80003000 0x00000800 /* PADS registers */
[all …]
/Documentation/devicetree/bindings/display/imx/
Dfsl-imx-drm.txt38 - port@[0-3]: Port nodes with endpoint definitions as defined in
40 Ports 0 and 1 should correspond to CSI0 and CSI1,
47 #size-cells = <0>;
49 reg = <0x18000000 0x080000000>;
81 reg = <0x021c8000 0x1000>;
106 reg = <0x021cc000 0x1000>;
125 - port@[0-1]: Port nodes with endpoint definitions as defined in
127 Port 0 is the input port connected to the IPU display interface,
137 port@0 {
138 reg = <0>;
/Documentation/devicetree/bindings/misc/
Dfsl,qoriq-mc.yaml58 Registers BRR1 and BRR2 at offset 0x0BF8 and 0x0BFC in
81 0x0 - MC portals
82 0x1 - QBMAN portals
140 const: 0
161 reg = <0x0c000000 0x40>, /* MC portal base */
162 <0x08340000 0x40000>; /* MC control reg */
164 * Region type 0x0 - MC portals
165 * Region type 0x1 - QBMAN portals
167 ranges = <0x0 0x0 0x8 0x0c000000 0x4000000
168 0x1 0x0 0x8 0x18000000 0x8000000>;
[all …]
/Documentation/devicetree/bindings/net/wireless/
Dmediatek,mt76.yaml138 "^r[0-9]+":
159 "^b[0-9]+$":
247 wifi@0,0 {
249 reg = <0x0000 0 0 0 0>;
251 mediatek,mtd-eeprom = <&factory 0x8000>;
286 reg = <0x10300000 0x100000>;
300 reg = <0x10300000 0x100000>;
313 reg = <0x18000000 0x1000000>,
314 <0x10003000 0x1000>,
315 <0x11d10000 0x1000>;