Searched +full:0 +full:x19c (Results 1 – 6 of 6) sorted by relevance
| /Documentation/devicetree/bindings/phy/ |
| D | qcom,edp-phy.yaml | 45 const: 0
67 reg = <0x0aec2a00 0x1c0>,
68 <0x0aec2200 0xa0>,
69 <0x0aec2600 0xa0>,
70 <0x0aec2000 0x19c>;
72 clocks = <&dispcc 0>, <&dispcc 1>;
76 #phy-cells = <0>;
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| /Documentation/devicetree/bindings/display/rockchip/ |
| D | rockchip-vop.yaml | 107 reg = <0xff930000 0x19c>,
108 <0xff931000 0x1000>;
122 #size-cells = <0>;
123 vopb_out_edp: endpoint@0 {
124 reg = <0>;
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| /Documentation/devicetree/bindings/display/msm/ |
| D | qcom,sc7280-mdss.yaml | 49 "^display-controller@[0-9a-f]+$":
57 "^displayport-controller@[0-9a-f]+$":
65 "^dsi@[0-9a-f]+$":
75 "^edp@[0-9a-f]+$":
83 "^phy@[0-9a-f]+$":
111 reg = <0xae00000 0x1000>;
130 iommus = <&apps_smmu 0x900 0x402>;
135 reg = <0x0ae01000 0x8f000>,
136 <0x0aeb0000 0x2008>;
154 interrupts = <0>;
[all …]
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| /Documentation/mm/ |
| D | slub.rst | 107 If the file contains 1, the option is enabled, 0 means disabled. The debug
117 failslab file is writable, so writing 1 or 0 will enable or disable
154 .. slab_min_order=x (default 0)
174 ``debug_guardpage_minorder=N`` (N > 0), forces setting
175 ``slab_max_order`` to 0, what cause minimum possible order of
187 INFO: 0xc90f6d28-0xc90f6d2b. First byte 0x00 instead of 0xcc
188 INFO: Slab 0xc528c530 flags=0x400000c3 inuse=61 fp=0xc90f6d58
189 INFO: Object 0xc90f6d20 @offset=3360 fp=0xc90f6d58
190 INFO: Allocated in get_modalias+0x61/0xf5 age=53 cpu=1 pid=554
192 Bytes b4 (0xc90f6d10): 00 00 00 00 00 00 00 00 5a 5a 5a 5a 5a 5a 5a 5a ........ZZZZZZZZ
[all …]
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| /Documentation/filesystems/ext4/ |
| D | super.rst | 12 number is either 0 or a power of 3, 5, or 7. If the flag is not set,
29 * - 0x0
33 * - 0x4
37 * - 0x8
41 * - 0xC
45 * - 0x10
49 * - 0x14
53 is typically 0 for all other block sizes.
54 * - 0x18
58 * - 0x1C
[all …]
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| /Documentation/fb/ |
| D | matroxfb.rst | 31 pass to the kernel this command line: "video=matroxfb:vesa:0x1BB".
35 unless you have primary display on non-Matrox VBE2.0 device (see
48 4 0x12 0x102
49 8 0x100 0x101 0x180 0x103 0x188
50 15 0x110 0x181 0x113 0x189
51 16 0x111 0x182 0x114 0x18A
52 24 0x1B2 0x184 0x1B5 0x18C
53 32 0x112 0x183 0x115 0x18B
63 4 0x104 0x106
64 8 0x105 0x190 0x107 0x198 0x11C
[all …]
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