Searched +full:0 +full:x1b000000 (Results 1 – 7 of 7) sorted by relevance
| /Documentation/devicetree/bindings/bus/ |
| D | qcom,ebi2.yaml | 31 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
32 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
33 CS2 GPIO40 (A) / GPIO124 (B) 0x1b800000-0x1c000000 (8MB)
34 CS3 GPIO133 0x1d000000-0x25000000 (128 MB)
35 CS4 GPIO132 0x1c800000-0x1d000000 (8MB)
36 CS5 GPIO131 0x1c000000-0x1c800000 (8MB)
105 "^.*@[0-5],[0-9a-f]+$":
120 actually 1, so a value of 0 will still yield 1 recovery cycle.
121 minimum: 0
129 asserted. With a hold of 1 (value = 0), the CS stays active
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| /Documentation/devicetree/bindings/clock/ |
| D | mediatek,ethsys.yaml | 52 reg = <0x1b000000 0x1000>;
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| D | mediatek,mt8192-clock.yaml | 56 reg = <0x10720000 0x1000>;
63 reg = <0x11007000 0x1000>;
70 reg = <0x11cb1000 0x1000>;
77 reg = <0x11d03000 0x1000>;
84 reg = <0x11d23000 0x1000>;
91 reg = <0x11e01000 0x1000>;
98 reg = <0x11f02000 0x1000>;
105 reg = <0x11f10000 0x1000>;
112 reg = <0x13fbf000 0x1000>;
119 reg = <0x15020000 0x1000>;
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| D | mediatek,mt8195-clock.yaml | 68 reg = <0x10720000 0x1000>;
75 reg = <0x11d03000 0x1000>;
82 reg = <0x11e05000 0x1000>;
89 reg = <0x13fbf000 0x1000>;
96 reg = <0x14e00000 0x1000>;
103 reg = <0x14e02000 0x1000>;
110 reg = <0x14e03000 0x1000>;
117 reg = <0x15000000 0x1000>;
124 reg = <0x15110000 0x1000>;
131 reg = <0x15130000 0x1000>;
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| /Documentation/devicetree/bindings/dma/ |
| D | apm-xgene-dma.txt | 27 clocks = <&socplldiv2 0>;
28 reg = <0x0 0x1f27c000 0x0 0x1000>;
36 reg = <0x0 0x1f270000 0x0 0x10000>,
37 <0x0 0x1f200000 0x0 0x10000>,
38 <0x0 0x1b000000 0x0 0x400000>,
39 <0x0 0x1054a000 0x0 0x100>;
40 interrupts = <0x0 0x82 0x4>,
41 <0x0 0xb8 0x4>,
42 <0x0 0xb9 0x4>,
43 <0x0 0xba 0x4>,
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | ingenic,nemc.yaml | 14 pattern: "^memory-controller@[0-9a-f]+$"
40 ".*@[0-9]+$":
61 reg = <0x13410000 0x10000>;
64 ranges = <1 0 0x1b000000 0x1000000>,
65 <2 0 0x1a000000 0x1000000>,
66 <3 0 0x19000000 0x1000000>,
67 <4 0 0x18000000 0x1000000>,
68 <5 0 0x17000000 0x1000000>,
69 <6 0 0x16000000 0x1000000>;
78 pinctrl-0 = <&pins_nemc_cs6>;
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| /Documentation/devicetree/bindings/mtd/ |
| D | ingenic,nand.yaml | 66 reg = <0x13410000 0x10000>;
69 ranges = <1 0 0x1b000000 0x1000000>,
70 <2 0 0x1a000000 0x1000000>,
71 <3 0 0x19000000 0x1000000>,
72 <4 0 0x18000000 0x1000000>,
73 <5 0 0x17000000 0x1000000>,
74 <6 0 0x16000000 0x1000000>;
80 reg = <1 0 0x1000000>;
83 #size-cells = <0>;
94 pinctrl-0 = <&pins_nemc>;
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