Searched +full:0 +full:x24 (Results 1 – 25 of 66) sorted by relevance
123
| /Documentation/devicetree/bindings/media/i2c/ |
| D | melexis,mlx90640.txt | 4 with 32x24 resolution excluding 2 lines of coefficient data that is used by
17 reg = <0x33>;
|
| /Documentation/devicetree/bindings/mfd/ |
| D | brcm,cru.yaml | 61 reg = <0x1800c100 0x1d0>;
69 reg = <0x100 0x14>;
77 reg = <0x140 0x24>;
85 reg = <0x164 0x4>;
89 #phy-cells = <0>;
94 reg = <0x180 0x4>;
99 reg = <0x1c0 0x24>;
105 reg = <0x2c0 0x10>;
106 #thermal-sensor-cells = <0>;
|
| D | mscc,ocelot.yaml | 40 "^pinctrl@[0-9a-f]+$":
44 "^gpio@[0-9a-f]+$":
52 "^mdio@[0-9a-f]+$":
60 "^ethernet-switch@[0-9a-f]+$":
81 #clock-cells = <0>;
87 #size-cells = <0>;
89 soc@0 {
92 reg = <0>;
99 #size-cells = <0>;
100 reg = <0x7107009c 0x24>;
[all …]
|
| /Documentation/devicetree/bindings/leds/ |
| D | leds-bcm6328.yaml | 26 with 0 meaning hardware control enabled and 1 hardware control disabled. This
67 const: 0
79 description: LED pin number (only LEDs 0 to 23 are valid).
91 signals can get muxed into these LEDs. Only valid for LEDs 0 to 7,
92 where LED signals 0 to 3 may be muxed to LEDs 0 to 3, and signals 4 to
102 hardware signals can get muxed into these LEDs. Only valid for LEDs 0
103 to 7, where LED signals 0 to 3 may be muxed to LEDs 0 to 3, and
125 #size-cells = <0>;
126 reg = <0x10000800 0x24>;
172 #size-cells = <0>;
[all …]
|
| /Documentation/devicetree/bindings/power/reset/ |
| D | brcm,bcm21664-resetmgr.yaml | 29 reg = <0x35001f00 0x24>;
|
| /Documentation/devicetree/bindings/sound/ |
| D | brcm,bcm2835-i2s.txt | 18 reg = <0x7e203000 0x24>;
|
| /Documentation/devicetree/bindings/leds/backlight/ |
| D | tps65217-backlight.txt | 12 - default-brightness: valid values: 0-100
19 reg = <0x24>;
|
| /Documentation/devicetree/bindings/phy/ |
| D | brcm,ns2-drd-phy.txt | 12 - #phy-cells: Must be 0. No args required.
20 #phy-cells = <0>;
22 reg = <0x66000960 0x24>,
23 <0x67012800 0x4>,
24 <0x6501d148 0x4>,
25 <0x664d0700 0x4>;
28 id-gpios = <&gpio_g 30 0>;
29 vbus-gpios = <&gpio_g 31 0>;
|
| D | intel,lgm-usb-phy.yaml | 35 const: 0
51 reg = <0xe7e00000 0x10000>;
53 resets = <&rcu 0x70 0x24>,
54 <&rcu 0x70 0x26>,
55 <&rcu 0x70 0x28>;
57 #phy-cells = <0>;
|
| D | mediatek,hdmi-phy.yaml | 21 pattern: "^hdmi-phy@[0-9a-f]+$"
49 const: 0
52 const: 0
58 minimum: 0
60 default: 0xa
66 minimum: 0
68 default: 0x1c
86 reg = <0x10209100 0x24>;
90 mediatek,ibias = <0xa>;
91 mediatek,ibias_up = <0x1c>;
[all …]
|
| /Documentation/devicetree/bindings/watchdog/ |
| D | sunplus,sp7021-wdt.yaml | 43 reg = <0x9c000630 0x08>, <0x9c000274 0x04>;
44 clocks = <&clkc 0x24>;
45 resets = <&rstc 0x14>;
|
| D | nxp,lpc1850-wwdt.yaml | 48 reg = <0x40080000 0x24>;
|
| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-pca9570.yaml | 46 #size-cells = <0>;
50 reg = <0x24>;
|
| /Documentation/devicetree/bindings/clock/ |
| D | microchip,sparx5-dpll.yaml | 42 #clock-cells = <0>;
49 reg = <0x1110000c 0x24>;
|
| /Documentation/devicetree/bindings/regulator/ |
| D | adi,max77503-regulator.yaml | 29 - enum: [0x1e, 0x24, 0x37]
41 #size-cells = <0>;
45 reg = <0x1e>;
|
| /Documentation/devicetree/bindings/net/nfc/ |
| D | nxp,pn532.yaml | 45 #size-cells = <0>;
50 reg = <0x24>;
60 reg = <0x49042000 0x400>;
|
| /Documentation/devicetree/bindings/iio/adc/ |
| D | cosmic,10001-adc.yaml | 53 reg = <0x18101600 0x24>;
54 adc-reserved-channels = <0x2>;
|
| /Documentation/devicetree/bindings/thermal/ |
| D | amlogic,thermal.yaml | 43 const: 0
59 reg = <0xff634800 0x50>;
60 interrupts = <0x0 0x24 0x0>;
62 #thermal-sensor-cells = <0>;
|
| /Documentation/devicetree/bindings/media/xilinx/ |
| D | xlnx,csi2rxss.yaml | 53 0x1e - YUV4228B
54 0x1f - YUV42210B
55 0x20 - RGB444
56 0x21 - RGB555
57 0x22 - RGB565
58 0x23 - RGB666
59 0x24 - RGB888
60 0x28 - RAW6
61 0x29 - RAW7
62 0x2a - RAW8
[all …]
|
| /Documentation/devicetree/bindings/pinctrl/ |
| D | amlogic,meson-pinctrl-g12a-aobus.yaml | 24 "^bank@[0-9a-f]+$":
55 reg = <0x14 0x8>,
56 <0x1c 0x8>,
57 <0x24 0x14>;
61 gpio-ranges = <&ao_pinctrl 0 0 15>;
|
| D | brcm,ns-pinmux.yaml | 83 reg = <0x1800c1c0 0x24>;
|
| D | amlogic,meson8-pinctrl-aobus.yaml | 32 "^bank@[0-9a-f]+$":
64 reg = <0x14 0x4>,
65 <0x2c 0x4>,
66 <0x24 0x8>;
70 gpio-ranges = <&pinctrl_aobus 0 0 16>;
|
| /Documentation/devicetree/bindings/ata/ |
| D | brcm,sata-brcm.yaml | 72 reg = <0xf045a000 0xa9c>, <0xf0458040 0x24>;
74 interrupts = <0 30 0>;
76 #size-cells = <0>;
78 sata0: sata-port@0 {
79 reg = <0>;
80 phys = <&sata_phy 0>;
|
| /Documentation/devicetree/bindings/soc/bcm/ |
| D | brcm,bcm2835-pm.yaml | 77 reg = <0x7e100000 0x114>,
78 <0x7e00a000 0x24>;
|
| /Documentation/devicetree/bindings/soc/ti/ |
| D | wkup-m3-ipc.yaml | 125 reg = <0x1324 0x24>;
155 pinctrl-0 = <&ddr3_vtt_toggle_default>;
159 0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7)
166 reg = <0x1324 0x24>;
|
123