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/Documentation/devicetree/bindings/firmware/
Dcoreboot.txt21 0xc0389481 that resides in the topmost 8 bytes of the area.
30 reg = <0xfdfea000 0x264>,
31 <0xfdfea000 0x16000>;
/Documentation/devicetree/bindings/display/msm/
Dqcom,sm6375-mdss.yaml48 "^display-controller@[0-9a-f]+$":
56 "^dsi@[0-9a-f]+$":
66 "^phy@[0-9a-f]+$":
86 reg = <0x05e00000 0x1000>;
100 iommus = <&apps_smmu 0x820 0x2>;
107 reg = <0x05e01000 0x8e030>,
108 <0x05eb0000 0x2008>;
133 interrupts = <0>;
137 #size-cells = <0>;
139 port@0 {
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/Documentation/arch/x86/
Dboot.rst28 Protocol 2.02 (Kernel 2.4.0-test3-pre3) New command line protocol.
99 0A0000 +------------------------+
121 0x100000 ("high memory"), and the kernel real-mode block (boot sector,
123 0x10000 and end of low memory. Unfortunately, in protocols 2.00 and
124 2.01 the 0x90000+ memory range is still used internally by the kernel;
139 0x90000 segment, the boot loader should make sure not to use memory
140 above the 0x9A000 point; too many BIOSes will break above that point.
149 0A0000 +------------------------+
180 following header at offset 0x01f1. The real-mode code can total up to
195 01FE/2 ALL boot_flag 0xAA55 magic number
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