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/Documentation/hwmon/
Dhih6130.rst27 I2C address 0x27 by default, so an entry with I2C_BOARD_INFO("hih6130", 0x27)
Dpt5161l.rst12 Addresses scanned: I2C 0x20 - 0x27
Dw83781d.rst10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
18 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
26 Addresses scanned: I2C 0x2d
34 Addresses scanned: I2C 0x28 - 0x2f
52 Use 'init=0' to bypass initializing the chip.
56 (default 0)
62 a certain chip. Typical usage is `force_subclients=0,0x2d,0x4a,0x4b`
63 to force the subclients of chip 0x2d on bus 0 to i2c addresses
64 0x4a and 0x4b. This parameter is useful for certain Tyan boards.
80 | as99127f | 7 | 3 | 0 | 3 | 0x31 | 0x12c3 | yes | no |
[all …]
Dsmsc47b397.rst40 pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The
41 HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB)
42 and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and
43 0x480 and 0x481 for the index/data pair.
49 Temp1 0x25 (Currently, this reflects the CPU temp on all systems).
50 Temp2 0x26
51 Temp3 0x27
52 Temp4 0x80
67 Ex: If AL contains 0x2A, the temperature is 42 degrees C.
74 Tach1 0x28 0x29 (Currently, this reflects the CPU
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Dcoretemp.rst9 CPUID: family 0x6, models
11 - 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
12 - 0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm),
13 - 0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield),
14 - 0x26 (Tunnel Creek Atom), 0x27 (Medfield Atom),
15 - 0x36 (Cedar Trail Atom)
37 1 degree C. Valid temperatures are from 0 to TjMax degrees C, because
Dabituguru-datasheet.rst34 0xE0 and 0xE4, so we don't have to scan any port-range, just check what the two
35 ports are holding for detection. We will refer to 0xE0 as CMD (command-port)
36 and 0xE4 as DATA because Abit refers to them with these names.
38 If DATA holds 0x00 or 0x08 and CMD holds 0x00 or 0xAC an uGuru could be
40 after a reboot uGuru will hold 0x00 here, but if the driver is removed and
41 later on attached again data-port will hold 0x08, more about this later.
44 turned up which will hold 0x00 instead of 0xAC at the CMD port, thus we also
46 hold 0x09 and will only hold 0x08 after reading CMD first, so CMD must be read
72 bank 0x24 for example the addressing within the bank selects a PWM output not
87 To put the uGuru in ready mode first write 0x00 to DATA and then wait for DATA
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/Documentation/devicetree/bindings/power/supply/
Dti,lp8727.yaml20 const: 0x27
41 minimum: 0
45 0 = 5%, 1 = 10%, 2 = 16%, 3 = 20%, 4 = 25%, 5 = 33%, 6 = 50%
49 minimum: 0
53 0 = 90mA, 1 = 100mA, 2 = 400mA, 3 = 450mA, 4 = 500mA, 5 = 600mA,
67 #size-cells = <0>;
71 reg = <0x27>;
79 eoc-level = /bits/ 8 <0>;
/Documentation/devicetree/bindings/net/nfc/
Dsamsung,s3fwrn5.yaml74 #size-cells = <0>;
78 reg = <0x27>;
/Documentation/devicetree/bindings/mmc/
Dbrcm,sdhci-brcmstb.yaml90 reg = <0x84b0000 0x260>, <0x84b0300 0x200>;
96 interrupts = <0x0 0x26 0x4>;
105 reg = <0x84b1000 0x260>, <0x84b1300 0x200>;
113 bus-width = <0x8>;
114 interrupts = <0x0 0x27 0x4>;
/Documentation/devicetree/bindings/auxdisplay/
Dhit,hd44780.yaml90 data-gpios = <&hc595 0 GPIO_ACTIVE_HIGH>,
105 #size-cells = <0>;
109 reg = <0x27>;
124 rs-gpios = <&pcf8574 0 GPIO_ACTIVE_HIGH>;
/Documentation/devicetree/bindings/edac/
Dapm-xgene-edac.txt53 reg = <0x0 0x7e200000 0x0 0x1000>;
58 reg = <0x0 0x7e700000 0x0 0x1000>;
63 reg = <0x0 0x7e720000 0x0 0x1000>;
68 reg = <0x0 0x1054a000 0x0 0x20>;
73 reg = <0x0 0x7e000000 0x0 0x10>;
86 reg = <0x0 0x78800000 0x0 0x100>;
87 interrupts = <0x0 0x20 0x4>,
88 <0x0 0x21 0x4>,
89 <0x0 0x27 0x4>;
93 reg = <0x0 0x7e800000 0x0 0x1000>;
[all …]
/Documentation/devicetree/bindings/dma/ti/
Dk3-pktdma.yaml39 for source thread IDs (rx): 0 - 0x7fff
40 for destination thread IDs (tx): 0x8000 - 0xffff
82 maximum: 0x3f
93 maximum: 0x3f
104 maximum: 0x3f
115 maximum: 0x3f
150 reg = <0x0 0x485c0000 0x0 0x100>,
151 <0x0 0x4a800000 0x0 0x20000>,
152 <0x0 0x4aa00000 0x0 0x40000>,
153 <0x0 0x4b800000 0x0 0x400000>,
[all …]
/Documentation/admin-guide/media/
Dsi476x.rst41 0x00 blend_int Flag, set when stereo separation has
43 0x01 hblend_int Flag, set when HiBlend cutoff
45 0x02 hicut_int Flag, set when HiCut cutoff
47 0x03 chbw_int Flag, set when channel filter
49 0x04 softmute_int Flag indicating that softmute
52 0x05 smute 0 - Audio is not soft muted
54 0x06 smattn Soft mute attenuation level in dB
55 0x07 chbw Channel filter bandwidth in kHz
56 0x08 hicut HiCut cutoff frequency in units of
58 0x09 hiblend HiBlend cutoff frequency in units
[all …]
/Documentation/driver-api/surface_aggregator/clients/
Ddtx.rst171 - ``0x0000``
175 - ``0x1000``
179 - ``0x2000``
183 - ``0xF000``
208 - ``0x1001``
213 - ``0x1002``
218 - ``0x2001``
223 - ``0x2002``
228 - ``0x2003``
245 - ``0x0000``
[all …]
/Documentation/devicetree/bindings/pci/
Dnvidia,tegra194-pcie-ep.yaml86 - const: p2u-0
124 0: C0
133 0 : C0
214 bus@0 {
217 ranges = <0x0 0x0 0x0 0x8 0x0>;
221 reg = <0x00 0x141a0000 0x0 0x00020000>, /* appl registers (128K) */
222 <0x00 0x3a040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
223 <0x00 0x3a080000 0x0 0x00040000>, /* DBI reg space (256K) */
224 <0x1c 0x00000000 0x4 0x00000000>; /* Address Space (16G) */
238 pinctrl-0 = <&clkreq_c5_bi_dir_state>;
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/Documentation/translations/zh_CN/admin-guide/
Dbug-hunting.rst15 WARNING: CPU: 1 PID: 28102 at kernel/module.c:1108 module_put+0x57/0x70
23 [<c12ba080>] ? dump_stack+0x44/0x64
24 [<c103ed6a>] ? __warn+0xfa/0x120
25 [<c109e8a7>] ? module_put+0x57/0x70
26 [<c109e8a7>] ? module_put+0x57/0x70
27 [<c103ee33>] ? warn_slowpath_null+0x23/0x30
28 [<c109e8a7>] ? module_put+0x57/0x70
29 [<f80ca4d0>] ? gp8psk_fe_set_frontend+0x460/0x460 [dvb_usb_gp8psk]
30 [<c109f617>] ? symbol_put_addr+0x27/0x50
31 [<f80bc9ca>] ? dvb_usb_adapter_frontend_exit+0x3a/0x70 [dvb_usb]
[all …]
/Documentation/translations/zh_TW/admin-guide/
Dbug-hunting.rst18 WARNING: CPU: 1 PID: 28102 at kernel/module.c:1108 module_put+0x57/0x70
26 [<c12ba080>] ? dump_stack+0x44/0x64
27 [<c103ed6a>] ? __warn+0xfa/0x120
28 [<c109e8a7>] ? module_put+0x57/0x70
29 [<c109e8a7>] ? module_put+0x57/0x70
30 [<c103ee33>] ? warn_slowpath_null+0x23/0x30
31 [<c109e8a7>] ? module_put+0x57/0x70
32 [<f80ca4d0>] ? gp8psk_fe_set_frontend+0x460/0x460 [dvb_usb_gp8psk]
33 [<c109f617>] ? symbol_put_addr+0x27/0x50
34 [<f80bc9ca>] ? dvb_usb_adapter_frontend_exit+0x3a/0x70 [dvb_usb]
[all …]
/Documentation/admin-guide/
Dbug-hunting.rst7 WARNING: CPU: 1 PID: 28102 at kernel/module.c:1108 module_put+0x57/0x70
15 [<c12ba080>] ? dump_stack+0x44/0x64
16 [<c103ed6a>] ? __warn+0xfa/0x120
17 [<c109e8a7>] ? module_put+0x57/0x70
18 [<c109e8a7>] ? module_put+0x57/0x70
19 [<c103ee33>] ? warn_slowpath_null+0x23/0x30
20 [<c109e8a7>] ? module_put+0x57/0x70
21 [<f80ca4d0>] ? gp8psk_fe_set_frontend+0x460/0x460 [dvb_usb_gp8psk]
22 [<c109f617>] ? symbol_put_addr+0x27/0x50
23 [<f80bc9ca>] ? dvb_usb_adapter_frontend_exit+0x3a/0x70 [dvb_usb]
[all …]
/Documentation/mm/
Dslub.rst107 If the file contains 1, the option is enabled, 0 means disabled. The debug
117 failslab file is writable, so writing 1 or 0 will enable or disable
154 .. slab_min_order=x (default 0)
174 ``debug_guardpage_minorder=N`` (N > 0), forces setting
175 ``slab_max_order`` to 0, what cause minimum possible order of
187 INFO: 0xc90f6d28-0xc90f6d2b. First byte 0x00 instead of 0xcc
188 INFO: Slab 0xc528c530 flags=0x400000c3 inuse=61 fp=0xc90f6d58
189 INFO: Object 0xc90f6d20 @offset=3360 fp=0xc90f6d58
190 INFO: Allocated in get_modalias+0x61/0xf5 age=53 cpu=1 pid=554
192 Bytes b4 (0xc90f6d10): 00 00 00 00 00 00 00 00 5a 5a 5a 5a 5a 5a 5a 5a ........ZZZZZZZZ
[all …]
/Documentation/driver-api/
Dmtdnand.rst141 .offset = 0,
197 should return 0, if the device is busy (R/B pin is low) and 1, if the
217 int err = 0;
325 GPIO(BOARD_NAND_NCE) |= 0xff;
326 if (chip >= 0)
344 case 0:
654 terminated by an {0, 0} entry.
667 <spare data page 0><ecc result 0>...<ecc result n>
671 <spare data page n><ecc result 0>...<ecc result n>
699 0x00 ECC byte 0 Error correction code byte 0
[all …]
/Documentation/trace/
Dhistogram.rst226 field:unsigned short common_type; offset:0; size:2; signed:0;
227 field:unsigned char common_flags; offset:2; size:1; signed:0;
228 field:unsigned char common_preempt_count; offset:3; size:1; signed:0;
231 field:unsigned long call_site; offset:8; size:8; signed:0;
232 field:const void * ptr; offset:16; size:8; signed:0;
233 field:size_t bytes_req; offset:24; size:8; signed:0;
234 field:size_t bytes_alloc; offset:32; size:8; signed:0;
235 field:gfp_t gfp_flags; offset:40; size:4; signed:0;
288 Dropped: 0
305 allowed for the table (normally 0, but if not a hint that you may
[all …]