Home
last modified time | relevance | path

Searched +full:0 +full:x50000000 (Results 1 – 25 of 25) sorted by relevance

/Documentation/devicetree/bindings/mailbox/
Dmailbox.txt36 mboxes = <&mailbox 0 &mailbox 1>;
43 reg = <0x50000000 0x10000>;
47 ranges = <0 0x50000000 0x10000>;
49 cl_shmem: shmem@0 {
51 reg = <0x0 0x200>;
57 mboxes = <&mailbox 0>;
/Documentation/devicetree/bindings/ata/
Dintel,ixp4xx-compact-flash.yaml48 reg = <0xc4000000 0x1000>;
52 ranges = <0 0x0 0x50000000 0x01000000>, <1 0x0 0x51000000 0x01000000>;
53 dma-ranges = <0 0x0 0x50000000 0x01000000>, <1 0x0 0x51000000 0x01000000>;
54 ide@1,0 {
56 reg = <1 0x00000000 0x1000>, <1 0x00040000 0x1000>;
/Documentation/devicetree/bindings/pci/
Dversatile.yaml38 - const: 0x1800
39 - const: 0
40 - const: 0
58 reg = <0x10001000 0x1000>,
59 <0x41000000 0x10000>,
60 <0x42000000 0x100000>;
61 bus-range = <0 0xff>;
67 <0x01000000 0 0x00000000 0x43000000 0 0x00010000>, /* downstream I/O */
68 <0x02000000 0 0x50000000 0x50000000 0 0x10000000>, /* non-prefetchable memory */
69 <0x42000000 0 0x60000000 0x60000000 0 0x10000000>; /* prefetchable memory */
[all …]
Dtoshiba,visconti-pcie.yaml81 reg = <0x0 0x28400000 0x0 0x00400000>,
82 <0x0 0x70000000 0x0 0x10000000>,
83 <0x0 0x28050000 0x0 0x00010000>,
84 <0x0 0x24200000 0x0 0x00002000>,
85 <0x0 0x24162000 0x0 0x00001000>;
88 bus-range = <0x00 0xff>;
95 ranges = <0x81000000 0 0x40000000 0 0x40000000 0 0x00010000>,
96 <0x82000000 0 0x50000000 0 0x50000000 0 0x20000000>;
100 interrupt-map-mask = <0 0 0 7>;
102 <0 0 0 1 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
[all …]
Dfaraday,ftpci100.yaml18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
19 Technology) and product ID 0x4321.
34 interrupt-map-mask = <0xf800 0 0 7>;
36 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
37 <0x4800 0 0 2 &pci_intc 1>,
38 <0x4800 0 0 3 &pci_intc 2>,
39 <0x4800 0 0 4 &pci_intc 3>,
40 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
41 <0x5000 0 0 2 &pci_intc 2>,
42 <0x5000 0 0 3 &pci_intc 3>,
[all …]
Dv3-v360epc-pci.txt18 each be exactly 256MB (0x10000000) in size.
38 reg = <0x62000000 0x10000>, <0x61000000 0x01000000>;
42 bus-range = <0x00 0xff>;
43 ranges = 0x01000000 0 0x00000000 /* I/O space @00000000 */
44 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */
45 0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */
46 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */
47 0x42000000 0 0x50000000 /* prefetchable memory @50000000 */
48 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */
49 dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */
[all …]
Dxlnx,axi-pcie-host.yaml41 const: 0
71 reg = <0x50000000 0x1000000>;
77 interrupt-map-mask = <0 0 0 7>;
78 interrupt-map = <0 0 0 1 &pcie_intc 1>,
79 <0 0 0 2 &pcie_intc 2>,
80 <0 0 0 3 &pcie_intc 3>,
81 <0 0 0 4 &pcie_intc 4>;
82 ranges = <0x02000000 0 0x60000000 0x60000000 0 0x10000000>;
85 #address-cells = <0>;
Dnvidia,tegra20-pcie.txt27 - cell 0 specifies the bus and device numbers of the root port:
30 - cell 1 denotes the upper 32 address bits and should be 0
45 - 0x81000000: I/O memory region
46 - 0x82000000: non-prefetchable memory region
47 - 0xc2000000: prefetchable memory region
73 - pinctrl-0: phandle for the default/active state of pin configurations.
104 - If lanes 0 to 3 are used:
150 - Root port 0 uses 4 lanes, root port 1 is unused.
158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
171 reg = <0x80003000 0x00000800 /* PADS registers */
[all …]
/Documentation/devicetree/bindings/memory-controllers/
Dintel,ixp4xx-expansion-bus-controller.yaml19 pattern: '^bus@[0-9a-f]+$'
55 "^.*@[0-7],[0-9a-f]+$":
78 reg = <0xc4000000 0x28>;
82 ranges = <0 0x0 0x50000000 0x01000000>,
83 <1 0x0 0x51000000 0x01000000>;
84 dma-ranges = <0 0x0 0x50000000 0x01000000>,
85 <1 0x0 0x51000000 0x01000000>;
86 flash@0,0 {
89 reg = <0 0x00000000 0x1000000>;
91 intel,ixp4xx-eb-cycle-type = <0>;
[all …]
Datmel,ebi.txt103 reg = <0x10000000 0x10000000
104 0x40000000 0x30000000>;
105 ranges = <0x0 0x0 0x10000000 0x10000000
106 0x1 0x0 0x40000000 0x10000000
107 0x2 0x0 0x50000000 0x10000000
108 0x3 0x0 0x60000000 0x10000000>;
112 pinctrl-0 = <&pinctrl_ebi_addr>;
114 nor: flash@0,0 {
118 reg = <0x0 0x0 0x1000000>;
124 atmel,smc-ncs-rd-setup-ns = <0>;
[all …]
Dti,gpmc.yaml82 <cs-number> 0 <physical address of mapping> <size>
84 - description: NAND bank 0
85 - description: NOR/SRAM bank 0
97 0 - NAND_fifoevent
109 0 maps to GPMC_WAIT0 pin.
126 "@[0-7],[a-f0-9]+$":
163 reg = <0x50000000 0x2000>;
167 dmas = <&edma 52 0>;
173 ranges = <0 0 0x08000000 0x10000000>; /* CS0 @addr 0x8000000, size 0x10000000 */
179 nand@0,0 {
[all …]
/Documentation/devicetree/bindings/watchdog/
Dmaxim,max63xx.yaml41 reg = <0x50000000 0x1>;
Dapple,wdt.yaml48 reg = <0x50000000 0x4000>;
/Documentation/devicetree/bindings/media/
Dpxa-camera.txt19 reg = <0x50000000 0x1000>;
30 #size-cells = <0>;
33 qci: endpoint@0 {
34 reg = <0>; /* Local endpoint # */
37 hsync-active = <0>; /* Active low */
38 vsync-active = <0>; /* Active low */
/Documentation/devicetree/bindings/perf/
Darm,cmn.yaml65 reg = <0x50000000 0x4000000>;
66 /* 4x2 mesh with one DTC, and CFG node at 0,1,1,0 */
68 arm,root-node = <0x104000>;
/Documentation/devicetree/bindings/firmware/
Darm,scpi.yaml15 0922B ("ARM Compute Subsystem SCP: Message Interface Protocols")[0] can be
21 [0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html
29 SCPI compliant firmware complying to SCPI v1.0 and above OR
31 prior to SCPI v1.0
33 - const: arm,scpi # SCPI v1.0 and above
34 - const: arm,scpi-pre-1.0 # Unversioned SCPI before v1.0
117 "^clocks-[0-9a-f]+$":
189 scpi_dvfs: clocks-0 {
192 clock-indices = <0>, <1>, <2>;
218 reg = <0x0 0x50000000 0x0 0x10000>;
[all …]
Darm,scmi.yaml20 and Management Interface Platform Design Document")[0] provide for OSPM in
23 [0] https://developer.arm.com/documentation/den0056/latest
117 const: 0
125 default: 0
150 const: 0x11
164 const: 0x12
172 const: 0x13
193 const: 0x14
207 const: 0x15
221 const: 0x16
[all …]
/Documentation/devicetree/bindings/virtio/
Dpci-iommu.yaml40 BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be
63 reg = <0x0 0x40000000 0x0 0x1000000>;
64 ranges = <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x0f000000>;
70 iommu-map = <0x0 &iommu0 0x0 0x8
71 0x9 &iommu0 0x9 0xfff7>;
74 iommu0: iommu@1,0 {
76 reg = <0x800 0 0 0 0>;
85 reg = <0x0 0x50000000 0x0 0x1000000>;
86 ranges = <0x02000000 0x0 0x51000000 0x0 0x51000000 0x0 0x0f000000>;
90 * with endpoint IDs 0x10000 - 0x1ffff
[all …]
/Documentation/devicetree/bindings/clock/
Dst,stm32mp1-rcc.yaml40 = 0x180 / 4 * 32 + 0 = 3072
121 reg = <0x50000000 0x1000>;
/Documentation/trace/coresight/
Dultrasoc-smb.rst38 BIT(0) is zero value which means the buffer is empty.
58 ReadWrite, 0x0, 0x95100000, 0x951FFFFF, 0x0, 0x100000) \
60 ReadWrite, 0x0, 0x50000000, 0x53FFFFFF, 0x0, 0x4000000) \
66 0, \
72 Package() {0x8, 0, \_SB.S00.SL11.CL28.F008, 0}, \
73 Package() {0x9, 0, \_SB.S00.SL11.CL29.F009, 0}, \
74 Package() {0xa, 0, \_SB.S00.SL11.CL2A.F010, 0}, \
75 Package() {0xb, 0, \_SB.S00.SL11.CL2B.F011, 0}, \
76 Package() {0xc, 0, \_SB.S00.SL11.CL2C.F012, 0}, \
77 Package() {0xd, 0, \_SB.S00.SL11.CL2D.F013, 0}, \
[all …]
/Documentation/devicetree/bindings/mtd/
Dti,gpmc-nand.yaml82 dmas = <&edma 52 0>;
86 reg = <0x50000000 0x2000>;
97 ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
98 nand@0,0 {
100 reg = <0 0 4>; /* device IO registers */
102 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
112 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
117 partition@0 {
119 reg = <0x00000000 0x00040000>;
123 reg = <0x00040000 0x00040000>;
Datmel-nand.txt38 device (always 0)
39 3rd entry: the memory region size (always 0x800000)
67 reg = <0x70000000 0x8000000>;
72 reg = <0xffffc070 0x490>,
73 <0xffffc500 0x100>;
81 reg = <0x10000000 0x10000000
82 0x40000000 0x30000000>;
83 ranges = <0x0 0x0 0x10000000 0x10000000
84 0x1 0x0 0x40000000 0x10000000
85 0x2 0x0 0x50000000 0x10000000
[all …]
/Documentation/arch/arm/sa1100/
Dassabet.rst91 load zImage -r -b 0x100000
95 load -m ymodem -r -b 0x100000
99 fis create "Linux kernel" -b 0x100000 -l 0xc0000
108 load ramdisk_image.gz -r -b 0x800000
119 exec -b 0x100000 -l 0xc0000
140 load sample_img.jffs2 -r -b 0x100000
144 RedBoot> load sample_img.jffs2 -r -b 0x100000
145 Raw file loaded 0x00100000-0x00377424
154 0x500E0000 .. 0x503C0000
162 size of unallocated flash: 0x503c0000 - 0x500e0000 = 0x2e0000
[all …]
/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.yaml175 use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to
211 - description: host1x syncpoint interrupt 0
235 use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to
251 reg = <0x50000000 0x00024000>;
252 interrupts = <0 65 0x04>, /* mpcore syncpt */
253 <0 67 0x04>; /* mpcore general */
263 ranges = <0x54000000 0x54000000 0x04000000>;
267 reg = <0x54040000 0x00040000>;
268 interrupts = <0 68 0x04>;
276 reg = <0x54080000 0x00040000>;
[all …]
/Documentation/devicetree/bindings/mips/cavium/
Dbootbus.txt52 - cavium,pages: A cell specifying the PAGES parameter (0 = 8 bytes, 1
71 reg = <0x11800 0x00000000 0x0 0x200>;
76 ranges = <0 0 0x0 0x1f400000 0xc00000>,
77 <1 0 0x10000 0x30000000 0>,
78 <2 0 0x10000 0x40000000 0>,
79 <3 0 0x10000 0x50000000 0>,
80 <4 0 0x0 0x1d020000 0x10000>,
81 <5 0 0x0 0x1d040000 0x10000>,
82 <6 0 0x0 0x1d050000 0x10000>,
83 <7 0 0x10000 0x90000000 0>;
[all …]