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/Documentation/devicetree/bindings/media/i2c/
Dths8200.txt16 reg = <0x5c>;
Dtvp514x.txt33 reg = <0x5c>;
39 pclk-sample = <0>;
Dtvp7002.txt11 this property is not specified is <0>.
14 this property is not specified is <0>.
17 not specified is <0>.
21 0 = Normal Operation (Active Low, Default)
26 (field 1) and set to logic 0 for an even field (field 0).
27 0 = Normal Operation (Active Low, Default)
40 reg = <0x5c>;
46 pclk-sample = <0>;
48 field-even-active = <0>;
Dmt9v032.txt33 reg = <0x5c>;
Dtvp5150.txt24 AIP1A sink 0
32 tvp-5150 port@0 (AIP1A)
33 endpoint@0 -----------> Comp0-Con port
37 endpoint@0 -----------> Comp1-Con port
39 endpoint (video bitstream output at YOUT[0-7] parallel bus)
47 transmission. Must be <0>.
94 #size-cells = <0>;
96 svideo_luma_to_tvp5150: endpoint@0 {
97 reg = <0>;
111 reg = <0x5c>;
[all …]
/Documentation/devicetree/bindings/mmc/
Dmoxa,moxart-mmc.txt24 reg = <0x98e00000 0x5C>;
25 interrupts = <5 0>;
/Documentation/translations/zh_CN/dev-tools/
Dubsan.rst28 CPU: 0 PID: 0 Comm: swapper Not tainted 4.4.0-rc1+ #26
33 [<ffffffff815e6cd6>] dump_stack+0x45/0x5f
34 [<ffffffff8163a5ed>] ubsan_epilogue+0xd/0x40
35 [<ffffffff8163ac2b>] __ubsan_handle_shift_out_of_bounds+0xeb/0x130
36 [<ffffffff815f0001>] ? radix_tree_gang_lookup_slot+0x51/0x150
37 [<ffffffff8173c586>] _mix_pool_bytes+0x1e6/0x480
38 [<ffffffff83105653>] ? dmi_walk_early+0x48/0x5c
39 [<ffffffff8173c881>] add_device_randomness+0x61/0x130
40 [<ffffffff83105b35>] ? dmi_save_one_device+0xaa/0xaa
41 [<ffffffff83105653>] dmi_walk_early+0x48/0x5c
[all …]
/Documentation/devicetree/bindings/input/touchscreen/
Dauo_pixcir_ts.txt19 reg = <0x5c>;
22 gpios = <&gpf 2 0 GPIO_LEVEL_HIGH>, /* INT */
Dsis_i2c.txt7 binding [0])
11 - pinctrl-0: a phandle pointing to the pin settings for the
17 [0]: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
24 reg = <0x5c>;
26 pinctrl-0 = <&pinctrl_sis>;
Dpixcir,pixcir_ts.yaml56 #size-cells = <0>;
60 reg = <0x5c>;
61 interrupts = <2 0>;
62 attb-gpio = <&gpf 2 0 2>;
Dbu21013.txt33 reg = <0x5c>;
/Documentation/dev-tools/
Dubsan.rst24 CPU: 0 PID: 0 Comm: swapper Not tainted 4.4.0-rc1+ #26
29 [<ffffffff815e6cd6>] dump_stack+0x45/0x5f
30 [<ffffffff8163a5ed>] ubsan_epilogue+0xd/0x40
31 [<ffffffff8163ac2b>] __ubsan_handle_shift_out_of_bounds+0xeb/0x130
32 [<ffffffff815f0001>] ? radix_tree_gang_lookup_slot+0x51/0x150
33 [<ffffffff8173c586>] _mix_pool_bytes+0x1e6/0x480
34 [<ffffffff83105653>] ? dmi_walk_early+0x48/0x5c
35 [<ffffffff8173c881>] add_device_randomness+0x61/0x130
36 [<ffffffff83105b35>] ? dmi_save_one_device+0xaa/0xaa
37 [<ffffffff83105653>] dmi_walk_early+0x48/0x5c
[all …]
/Documentation/devicetree/bindings/dma/
Dmoxa,moxart-dma.txt17 reg = <0x90500080 0x40>;
18 interrupts = <24 0>;
39 reg = <0x98e00000 0x5C>;
40 interrupts = <5 0>;
/Documentation/devicetree/bindings/iio/pressure/
Dmurata,zpa2326.yaml45 #size-cells = <0>;
49 reg = <0x5c>;
58 #size-cells = <0>;
59 pressure@0 {
61 reg = <0>;
/Documentation/devicetree/bindings/power/supply/
Dcw2015_battery.yaml61 #size-cells = <0>;
65 reg = <0x62>;
67 0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63
68 0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36
69 0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69
70 0x69 0x5B 0x0C 0x29 0x20 0x40 0x52 0x59
71 0x57 0x56 0x54 0x4F 0x3B 0x1F 0x7F 0x17
72 0x06 0x1A 0x30 0x5A 0x85 0x93 0x96 0x2D
73 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB
74 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11
/Documentation/hwmon/
Dadt7462.rst10 Addresses scanned: I2C 0x58, 0x5C
69 from 0 (off) to 255 (full speed). Fan speed will be set to maximum when the
Demc1403.rst8 Addresses scanned: I2C 0x18, 0x1c, 0x29, 0x4c, 0x4d, 0x5c
19 Addresses scanned: I2C 0x18, 0x29, 0x4c, 0x4d
30 Addresses scanned: I2C 0x4c
40 Addresses scanned: I2C 0x4c
50 Addresses scanned: I2C 0x18, 0x4c, 0x4d
Dsubmitting-patches.rst108 * Only the following I2C addresses shall be probed: 0x18-0x1f, 0x28-0x2f,
109 0x48-0x4f, 0x58, 0x5c, 0x73 and 0x77. Probing other addresses is strongly
Dw83781d.rst10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
18 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports)
26 Addresses scanned: I2C 0x2d
34 Addresses scanned: I2C 0x28 - 0x2f
52 Use 'init=0' to bypass initializing the chip.
56 (default 0)
62 a certain chip. Typical usage is `force_subclients=0,0x2d,0x4a,0x4b`
63 to force the subclients of chip 0x2d on bus 0 to i2c addresses
64 0x4a and 0x4b. This parameter is useful for certain Tyan boards.
80 | as99127f | 7 | 3 | 0 | 3 | 0x31 | 0x12c3 | yes | no |
[all …]
/Documentation/devicetree/bindings/hwmon/
Dti,tmp513.yaml36 If 0, the calibration process will be skipped and the current and power
67 default: 0x00
68 minimum: 0x00
69 maximum: 0xFF
84 #size-cells = <0>;
88 reg = <0x5c>;
92 ti,nfactor = <0x1 0xf3 0x00>;
/Documentation/devicetree/bindings/display/bridge/
Dfsl,ldb.yaml42 port@0:
55 - port@0
91 reg = <0x5c 0x4>, <0x128 0x4>;
96 #size-cells = <0>;
98 port@0 {
99 reg = <0>;
Dite,it6505.yaml59 const: 0
65 port@0:
96 - enum: [ 0, 1 ]
102 - port@0
122 #size-cells = <0>;
126 interrupts = <152 IRQ_TYPE_EDGE_FALLING 152 0>;
127 reg = <0x5c>;
129 pinctrl-0 = <&it6505_pins>;
137 #size-cells = <0>;
139 port@0 {
[all …]
/Documentation/fault-injection/
Dnvme-fault-injection.rst33 name fault_inject, interval 1, probability 100, space 0, times 1
34 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.15.0-rc8+ #2
39 dump_stack+0x5c/0x7d
40 should_fail+0x148/0x170
41 nvme_should_fail+0x2f/0x50 [nvme_core]
42 nvme_process_cq+0xe7/0x1d0 [nvme]
43 nvme_irq+0x1e/0x40 [nvme]
44 __handle_irq_event_percpu+0x3a/0x190
45 handle_irq_event_percpu+0x30/0x70
46 handle_irq_event+0x36/0x60
[all …]
/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx8mp-media-blk-ctrl.yaml112 reg = <0x32ec0000 0x138>;
135 reg = <0x5c 0x4>, <0x128 0x4>;
142 #size-cells = <0>;
144 port@0 {
145 reg = <0>;
/Documentation/devicetree/bindings/clock/ti/
Ddpll.txt34 - #clock-cells : from common clock binding; shall be set to 0.
68 #clock-cells = <0>;
71 reg = <0x490>, <0x45c>, <0x488>, <0x468>;
75 #clock-cells = <0>;
81 reg = <0x4>, <0x24>, <0x34>, <0x40>;
85 #clock-cells = <0>;
88 reg = <0x90>, <0x5c>, <0x68>;
92 #clock-cells = <0>;
95 reg = <0x0500>, <0x0540>;
99 #clock-cells = <0>;
[all …]

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