Searched +full:0 +full:x6f (Results 1 – 13 of 13) sorted by relevance
| /Documentation/devicetree/bindings/rtc/ |
| D | isil,isl12026.txt | 4 registers respond at bus address 0x6f, and the EEPROM array responds
5 at bus address 0x57. The canonical "reg" value will be for the RTC portion.
10 - "reg": I2C bus address of the device (always 0x6f)
25 reg = <0x6f>;
26 isil,pwr-bsw = <0>;
|
| D | nuvoton,nct3018y.yaml | 37 #size-cells = <0>;
41 reg = <0x6f>;
|
| D | intersil,isl12022.yaml | 23 const: 0
54 #size-cells = <0>;
58 reg = <0x6f>;
|
| D | isil,isl1208.yaml | 51 enum: [ 0, 1 ]
56 <0> : Enables internal pull-up on evin pin
94 #size-cells = <0>;
98 reg = <0x6f>;
|
| /Documentation/hwmon/ |
| D | ltc4151.rst | 32 Example: the following will load the driver for an LTC4151 at address 0x6f
33 on I2C bus #0::
36 # echo ltc4151 0x6f > /sys/bus/i2c/devices/i2c-0/new_device
|
| D | smsc47b397.rst | 40 pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The
41 HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB)
42 and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and
43 0x480 and 0x481 for the index/data pair.
49 Temp1 0x25 (Currently, this reflects the CPU temp on all systems).
50 Temp2 0x26
51 Temp3 0x27
52 Temp4 0x80
67 Ex: If AL contains 0x2A, the temperature is 42 degrees C.
74 Tach1 0x28 0x29 (Currently, this reflects the CPU
[all …]
|
| /Documentation/devicetree/bindings/i2c/ |
| D | tsd,mule-i2c-mux.yaml | 22 0x18| +---------------+ |
27 | | \-------->| dev #0 | |
29 0x6f| | M |-------->| dev #1 | |
55 #size-cells = <0>;
57 i2c@0 {
58 reg = <0x0>;
60 #size-cells = <0>;
64 reg = <0x6f>;
|
| /Documentation/devicetree/bindings/hwmon/ |
| D | adi,ltc2992.yaml | 28 const: 0
33 "^channel@([0-1])$":
44 minimum: 0
61 #size-cells = <0>;
65 #size-cells = <0>;
68 reg = <0x6f>;
70 channel@0 {
71 reg = <0x0>;
76 reg = <0x1>;
|
| /Documentation/devicetree/bindings/regulator/ |
| D | adi,max77857.yaml | 27 - enum: [0x66, 0x67, 0x6E, 0x6F]
75 #size-cells = <0>;
78 reg = <0x66>;
|
| D | renesas,raa215300.yaml | 69 #clock-cells = <0>;
75 #size-cells = <0>;
79 reg = <0x12>, <0x6f>;
|
| /Documentation/devicetree/bindings/power/supply/ |
| D | cw2015_battery.yaml | 61 #size-cells = <0>;
65 reg = <0x62>;
67 0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63
68 0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36
69 0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69
70 0x69 0x5B 0x0C 0x29 0x20 0x40 0x52 0x59
71 0x57 0x56 0x54 0x4F 0x3B 0x1F 0x7F 0x17
72 0x06 0x1A 0x30 0x5A 0x85 0x93 0x96 0x2D
73 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB
74 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11
|
| /Documentation/fault-injection/ |
| D | nvme-fault-injection.rst | 33 name fault_inject, interval 1, probability 100, space 0, times 1
34 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.15.0-rc8+ #2
39 dump_stack+0x5c/0x7d
40 should_fail+0x148/0x170
41 nvme_should_fail+0x2f/0x50 [nvme_core]
42 nvme_process_cq+0xe7/0x1d0 [nvme]
43 nvme_irq+0x1e/0x40 [nvme]
44 __handle_irq_event_percpu+0x3a/0x190
45 handle_irq_event_percpu+0x30/0x70
46 handle_irq_event+0x36/0x60
[all …]
|
| /Documentation/driver-api/ |
| D | ipmi.rst | 406 unload_when_empty=[0|1]
407 trydmi=[0|1] tryacpi=[0|1]
408 tryplatform=[0|1] trypci=[0|1]
438 and the start address is 0xca2, then the address for the second
439 register would be 0xca6. This defaults to 1.
451 usually 0x20 and the driver defaults to that, but in case it's not, it
455 (if set to 0) the kernel IPMI daemon. Normally this is auto-detected
462 default is one. Setting to 0 is useful with the hotmod, but is
538 tryacpi=[0|1] trydmi=[0|1]
559 usually 0x20 and the driver defaults to that, but in case it's not, it
[all …]
|