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Searched +full:0 +full:x70000000 (Results 1 – 6 of 6) sorted by relevance

/Documentation/devicetree/bindings/pci/
Dsifive,fu740-pcie.yaml94 reg = <0xe 0x00000000 0x0 0x80000000>,
95 <0xd 0xf0000000 0x0 0x10000000>,
96 <0x0 0x100d0000 0x0 0x1000>;
100 bus-range = <0x0 0xff>;
101 ranges = <0x81000000 0x0 0x60080000 0x0 0x60080000 0x0 0x10000>, /* I/O */
102 <0x82000000 0x0 0x60090000 0x0 0x60090000 0x0 0xff70000>, /* mem */
103 <0x82000000 0x0 0x70000000 0x0 0x70000000 0x0 0x1000000>, /* mem */
104 … <0xc3000000 0x20 0x00000000 0x20 0x00000000 0x20 0x00000000>; /* mem prefetchable */
105 num-lanes = <0x8>;
109 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
[all …]
Dtoshiba,visconti-pcie.yaml81 reg = <0x0 0x28400000 0x0 0x00400000>,
82 <0x0 0x70000000 0x0 0x10000000>,
83 <0x0 0x28050000 0x0 0x00010000>,
84 <0x0 0x24200000 0x0 0x00002000>,
85 <0x0 0x24162000 0x0 0x00001000>;
88 bus-range = <0x00 0xff>;
95 ranges = <0x81000000 0 0x40000000 0 0x40000000 0 0x00010000>,
96 <0x82000000 0 0x50000000 0 0x50000000 0 0x20000000>;
100 interrupt-map-mask = <0 0 0 7>;
102 <0 0 0 1 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
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Dmicrochip,pcie-host.yaml41 0-3
45 pattern: '^fic[0-3]$'
64 reg = <0x0 0x70000000 0x0 0x08000000>,
65 <0x0 0x43000000 0x0 0x00010000>;
72 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
73 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
74 <0 0 0 2 &pcie_intc0 1>,
75 <0 0 0 3 &pcie_intc0 2>,
76 <0 0 0 4 &pcie_intc0 3>;
80 bus-range = <0x00 0x7f>;
[all …]
/Documentation/devicetree/bindings/spi/
Dst,stm32-qspi.yaml69 reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
72 dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
73 <&mdma1 22 0x10 0x100008 0x0 0x0>;
79 #size-cells = <0>;
81 flash@0 {
83 reg = <0>;
/Documentation/devicetree/bindings/mtd/
Datmel-nand.txt38 device (always 0)
39 3rd entry: the memory region size (always 0x800000)
67 reg = <0x70000000 0x8000000>;
72 reg = <0xffffc070 0x490>,
73 <0xffffc500 0x100>;
81 reg = <0x10000000 0x10000000
82 0x40000000 0x30000000>;
83 ranges = <0x0 0x0 0x10000000 0x10000000
84 0x1 0x0 0x40000000 0x10000000
85 0x2 0x0 0x50000000 0x10000000
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/Documentation/devicetree/bindings/memory-controllers/
Dti-aemif.txt25 first address cell and it may accept values 0..N-1
76 it can be in range [0-3]. For compatible
105 Minimum value is 1 (0 treated as 1).
110 Minimum value is 1 (0 treated as 1).
117 Minimum value is 1 (0 treated as 1).
122 Minimum value is 1 (0 treated as 1).
127 Minimum value is 1 (0 treated as 1).
134 Minimum value is 1 (0 treated as 1).
145 clocks = <&clkaemif 0>;
148 reg = <0x21000A00 0x00000100>;
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