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/Documentation/devicetree/bindings/pci/
Dstarfive,jh7110-pcie.yaml81 reg = <0x9 0x40000000 0x0 0x10000000>,
82 <0x0 0x2b000000 0x0 0x1000000>;
88 ranges = <0x82000000 0x0 0x30000000 0x0 0x30000000 0x0 0x08000000>,
89 <0xc3000000 0x9 0x00000000 0x9 0x00000000 0x0 0x40000000>;
91 bus-range = <0x0 0xff>;
94 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
95 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc0 0x1>,
96 <0x0 0x0 0x0 0x2 &pcie_intc0 0x2>,
97 <0x0 0x0 0x0 0x3 &pcie_intc0 0x3>,
98 <0x0 0x0 0x0 0x4 &pcie_intc0 0x4>;
[all …]
Dmvebu-pci.txt23 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s
32 registers area. This range entry translates the '0x82000000 0 r' PCI
33 address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part
34 of the internal register window (as identified by MBUS_ID(0xf0,
35 0x01)).
39 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0
79 value is 0.
99 bus-range = <0x00 0xff>;
103 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
104 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
[all …]
Drockchip-dw-pcie-ep.yaml63 reg = <0xa 0x40000000 0x0 0x00100000>,
64 <0xa 0x40100000 0x0 0x00100000>,
65 <0x0 0xfe150000 0x0 0x00010000>,
66 <0x9 0x00000000 0x0 0x40000000>,
67 <0xa 0x40300000 0x0 0x00100000>;
75 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH 0>,
76 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH 0>,
77 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH 0>,
78 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH 0>,
79 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH 0>,
[all …]
/Documentation/input/devices/
Dalps.rst32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
45 The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
94 byte 0: 0 0 YSGN XSGN 1 M R L
109 byte 0: 1 0 0 0 1 x9 x8 x7
110 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
111 byte 2: 0 ? ? l r ? fin ges
112 byte 3: 0 ? ? ? ? y9 y8 y7
113 byte 4: 0 y6 y5 y4 y3 y2 y1 y0
114 byte 5: 0 z6 z5 z4 z3 z2 z1 z0
[all …]
Delantech.rst69 (TouchPadOff=0) will also disable the buttons associated with the touchpad.
99 By echoing "0" to this file all debugging will be turned OFF.
113 By echoing "0" to this file parity checking will be turned OFF. Any
128 Sets crc_enabled to 0/1. The name "crc_enabled" is the official name of
138 "0" or "1" to this file will set the state to "0" or "1".
143 To detect the hardware version, read the version number as param[0].param[1].param[2]::
164 Probably all the versions with param[0] <= 01 can be considered as
179 echo -n 0x16 > reg_10
183 bit 7 6 5 4 3 2 1 0
197 bit 7 6 5 4 3 2 1 0
[all …]
/Documentation/devicetree/bindings/input/
Dspear-keyboard.txt9 - st,mode: keyboard mode: 0 - 9x9, 1 - 6x6, 2 - 2x2
15 reg = <0xfc400000 0x100>;
16 linux,keymap = < 0x00030012
17 0x0102003a >;
19 st,mode = <0>;
/Documentation/devicetree/bindings/virtio/
Dpci-iommu.yaml40 BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be
63 reg = <0x0 0x40000000 0x0 0x1000000>;
64 ranges = <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x0f000000>;
70 iommu-map = <0x0 &iommu0 0x0 0x8
71 0x9 &iommu0 0x9 0xfff7>;
74 iommu0: iommu@1,0 {
76 reg = <0x800 0 0 0 0>;
85 reg = <0x0 0x50000000 0x0 0x1000000>;
86 ranges = <0x02000000 0x0 0x51000000 0x0 0x51000000 0x0 0x0f000000>;
90 * with endpoint IDs 0x10000 - 0x1ffff
[all …]
/Documentation/devicetree/bindings/leds/
Dleds-tlc591xx.txt6 - #size-cells: must be 0
7 - reg: typically 0x68
13 - reg: number of LED line, 0 to 15 or 0 to 7
21 #size-cells = <0>;
23 reg = <0x68>;
25 wan@0 {
27 reg = <0x0>;
32 reg = <0x2>;
37 reg = <0x9>;
Dawinic,aw200xx.yaml17 - AW20054 (6x9) 54 LEDs
42 const: 0
48 "^led@[0-9a-f]+$":
80 "^led@[0-9a-f]+$":
84 minimum: 0
94 "^led@[0-9a-f]+$":
98 minimum: 0
108 "^led@[0-9a-f]+$":
112 minimum: 0
122 "^led@[0-9a-f]+$":
[all …]
/Documentation/devicetree/bindings/power/supply/
Dsbs,sbs-charger.yaml47 #size-cells = <0>;
51 reg = <0x9>;
Dbq24735.yaml40 The POR value is 0x0000h. This number is in mA (e.g. 8192).
41 See spec for more information about the ChargeCurrent (0x14h) register.
48 The POR value is 0x0000h. This number is in mV (e.g. 19200).
49 See spec for more information about the ChargeVoltage (0x15h) register.
56 The POR value is 0x1000h. This number is in mA (e.g. 8064).
57 See the spec for more information about the InputCurrent (0x3fh) register.
82 #size-cells = <0>;
86 reg = <0x9>;
87 ti,ac-detect-gpios = <&gpio 72 0x1>;
/Documentation/devicetree/bindings/timestamp/
Dhte-consumer.yaml37 timestamps = <&tegra_hte_aon 0x9>, <&tegra_hte_lic 0x19>;
/Documentation/devicetree/bindings/clock/
Drenesas,versaclock7.yaml48 #clock-cells = <0>;
52 i2c@0 {
53 reg = <0x0 0x100>;
55 #size-cells = <0>;
59 reg = <0x9>;
Dxgene.txt50 Default is 0.
51 - csr-mask : CSR reset mask bit. Default is 0xF.
53 Default is 0x8.
54 - enable-mask : CSR enable mask bit. Default is 0xF.
56 Default is 0x0.
57 - divider-width : Width of the divider register. Default is 0.
58 - divider-shift : Bit shift of the divider register. Default is 0.
65 clocks = <&refclk 0>;
67 reg = <0x0 0x17000100 0x0 0x1000>;
69 type = <0>;
[all …]
/Documentation/devicetree/bindings/firmware/
Dqemu,fw-cfg-mmio.yaml34 * Bytes 0x0 to 0x7 cover the data register.
35 * Bytes 0x8 to 0x9 cover the selector register.
52 reg = <0x9020000 0xa>;
/Documentation/devicetree/bindings/extcon/
Dqcom,pm8941-misc.yaml52 #size-cells = <0>;
58 reg = <0x900>;
59 interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>;
/Documentation/devicetree/bindings/sound/
Dadi,max98363.yaml16 SoundWire peripheral device ID of MAX98363 is 0x3*019f836300
18 It supports up to 10 peripheral devices(0x0 to 0x9).
31 const: 0
44 #size-cells = <0>;
45 reg = <0x3250000 0x2000>;
47 speaker@0,0 {
49 reg = <0 0>;
50 #sound-dai-cells = <0>;
54 speaker@0,1 {
56 reg = <0 1>;
[all …]
/Documentation/devicetree/bindings/rtc/
Dst,m41t80.yaml60 #size-cells = <0>;
63 reg = <0x68>;
65 interrupts = <0x9 0x8>;
69 #clock-cells = <0>;
/Documentation/i2c/busses/
Di2c-mlxcpld.rst28 CPBLTY 0x0 - capability reg.
32 CTRL 0x1 - control reg.
34 HALF_CYC 0x4 - cycle reg.
37 I2C_HOLD 0x5 - hold reg.
40 CMD 0x6 - command reg.
41 Bit 0, 0 = write, 1 = read.
44 NUM_DATA 0x7 - data size reg.
46 NUM_ADDR 0x8 - address reg.
48 STATUS 0x9 - status reg.
49 Bit 0 - transaction is completed.
[all …]
/Documentation/trace/coresight/
Dultrasoc-smb.rst38 BIT(0) is zero value which means the buffer is empty.
58 ReadWrite, 0x0, 0x95100000, 0x951FFFFF, 0x0, 0x100000) \
60 ReadWrite, 0x0, 0x50000000, 0x53FFFFFF, 0x0, 0x4000000) \
66 0, \
72 Package() {0x8, 0, \_SB.S00.SL11.CL28.F008, 0}, \
73 Package() {0x9, 0, \_SB.S00.SL11.CL29.F009, 0}, \
74 Package() {0xa, 0, \_SB.S00.SL11.CL2A.F010, 0}, \
75 Package() {0xb, 0, \_SB.S00.SL11.CL2B.F011, 0}, \
76 Package() {0xc, 0, \_SB.S00.SL11.CL2C.F012, 0}, \
77 Package() {0xd, 0, \_SB.S00.SL11.CL2D.F013, 0}, \
[all …]
/Documentation/sound/cards/
Demu10k1-jack.rst30 /usr/local/bin/jackd -R -dalsa -r48000 -p64 -n2 -D -Chw:0,2 -Phw:0,3 -S
60 capture_1 asio14 FXBUS2(0xe)
61 capture_2 asio15 FXBUS2(0xf)
62 capture_3 asio0 FXBUS2(0x0)
63 ~capture_4 Center EXTOUT(0x11) // mapped to by Center
64 ~capture_5 LFE EXTOUT(0x12) // mapped to by LFE
65 capture_6 asio3 FXBUS2(0x3)
66 capture_7 asio4 FXBUS2(0x4)
67 capture_8 asio5 FXBUS2(0x5)
68 capture_9 asio6 FXBUS2(0x6)
[all …]
/Documentation/driver-api/media/drivers/
Dtuners.rst12 - L= LG_API (VHF_LO=0x01, VHF_HI=0x02, UHF=0x08, radio=0x04)
13 - P= PHILIPS_API (VHF_LO=0xA0, VHF_HI=0x90, UHF=0x30, radio=0x04)
14 - T= TEMIC_API (VHF_LO=0x02, VHF_HI=0x04, UHF=0x01)
15 - A= ALPS_API (VHF_LO=0x14, VHF_HI=0x12, UHF=0x11)
16 - M= PHILIPS_MK3 (VHF_LO=0x01, VHF_HI=0x02, UHF=0x04, radio=0x19)
85 40x9: Tuner+FM compact
113 - TADC-M201D: PAL D/K+B/G+I (L,143/425) (sound control at I2C address 0xc8)
131 - TSBE1 has extra API 05,02,08 Control_byte=0xCB Source:[#f1]_
/Documentation/devicetree/bindings/mfd/
Dmaxim,max77802.yaml99 #size-cells = <0>;
106 pinctrl-0 = <&max77802_irq>, <&pmic_selb>,
109 reg = <0x9>;
/Documentation/staging/
Dstatic-keys.rst233 ffffffff81044294: e9 00 00 00 00 jmpq ffffffff81044299 <sys_getppid+0x9>
234 ffffffff81044299: 65 48 8b 04 25 c0 b6 mov %gs:0xb6c0,%rax
236 ffffffff810442a2: 48 8b 80 80 02 00 00 mov 0x280(%rax),%rax
237 ffffffff810442a9: 48 8b 80 b0 02 00 00 mov 0x2b0(%rax),%rax
238 ffffffff810442b0: 48 8b b8 e8 02 00 00 mov 0x2e8(%rax),%rdi
243 ffffffff810442c0: 48 c7 c7 e3 54 98 81 mov $0xffffffff819854e3,%rdi
246 ffffffff810442ce: eb c9 jmp ffffffff81044299 <sys_getppid+0x9>
251 …ffffffff810441f0: 8b 05 8a 52 d8 00 mov 0xd8528a(%rip),%eax # ffffffff81dc94…
255 ffffffff810441fc: 75 27 jne ffffffff81044225 <sys_getppid+0x35>
256 ffffffff810441fe: 65 48 8b 04 25 c0 b6 mov %gs:0xb6c0,%rax
[all …]
/Documentation/RCU/
Dlockdep-splat.rst30 rcu_scheduler_active = 1, debug_locks = 0
32 #0: (&shost->scan_mutex){+.+.}, at: [<ffffffff8145efca>]
33 scsi_scan_host_selected+0x5a/0x150
35 elevator_exit+0x22/0x60
37 cfq_exit_queue+0x43/0x190
40 Pid: 1552, comm: scsi_scan_6 Not tainted 3.0.0-rc5 #17
42 [<ffffffff810abb9b>] lockdep_rcu_dereference+0xbb/0xc0
43 [<ffffffff812b6139>] __cfq_exit_single_io_context+0xe9/0x120
44 [<ffffffff812b626c>] cfq_exit_queue+0x7c/0x190
45 [<ffffffff812a5046>] elevator_exit+0x36/0x60
[all …]

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