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/Documentation/devicetree/bindings/dma/
Dbrcm,iproc-sba.txt21 mboxes = <&raid_mbox 0 0x1 0xffff>,
22 <&raid_mbox 1 0x1 0xffff>,
23 <&raid_mbox 2 0x1 0xffff>,
24 <&raid_mbox 3 0x1 0xffff>,
25 <&raid_mbox 4 0x1 0xffff>,
26 <&raid_mbox 5 0x1 0xffff>,
27 <&raid_mbox 6 0x1 0xffff>,
28 <&raid_mbox 7 0x1 0xffff>;
Dintel,ldma.yaml93 reg = <0xe0e00000 0x1000>;
96 dma-channel-mask = <0xFFFF>;
99 resets = <&rcu0 0x30 0>;
109 reg = <0xec800000 0x1000>;
111 resets = <&rcu0 0x10 9>;
/Documentation/devicetree/bindings/mailbox/
Dbrcm,iproc-flexrm-mbox.txt45 reg = <0x67000000 0x200000>;
46 msi-parent = <&gic_its 0x7f00>;
52 reg = <0x672c0000 0x1000>;
53 mboxes = <&crypto_mbox 0 0x1 0xffff>,
54 <&crypto_mbox 1 0x1 0xffff>,
55 <&crypto_mbox 16 0x1 0xffff>,
56 <&crypto_mbox 17 0x1 0xffff>,
57 <&crypto_mbox 30 0x1 0xffff>,
58 <&crypto_mbox 31 0x1 0xffff>;
/Documentation/admin-guide/perf/
Dhisi-pcie-pmu.rst42 $# perf stat -e hisi_pcie0_core0/rx_mwr_latency,port=0xffff/
43 $# perf stat -e hisi_pcie0_core0/rx_mwr_cnt,port=0xffff/
52 b) By event type, such as "event=0xXXXX, event=0x1XXXX".
56 … perf stat -e "{hisi_pcie0_core0/rx_mwr_latency,port=0xffff/,hisi_pcie0_core0/rx_mwr_cnt,port=0xff…
73 "bdf" filter will be in effect, because "bdf=0" meaning 0000:000:00.0.
83 bitmap should be set, port=0x1; if target Root Port is 0000:00:04.0 (x4
84 lanes), bit8 is set, port=0x100; if these two Root Ports are both
85 monitored, port=0x101.
89 $# perf stat -e hisi_pcie0_core0/rx_mwr_latency,port=0x1/ sleep 5
97 For example, "bdf=0x3900" means BDF of target Endpoint is 0000:39:00.0.
[all …]
Dhns3-pmu.rst44 config=0x00204
46 config=0x10204
51 The bits 0~15 of config (here 0x0204) are the true hardware event code. If
52 two events have same value of bits 0~15 of config, that means they are
53 event pair. And the bit 16 of config indicates getting counter 0 or
59 counter 0 / counter 1
75 …$# perf stat -g -e hns3_pmu_sicl_0/config=0x00002,global=1/ -e hns3_pmu_sicl_0/config=0x10002,glob…
86 $# perf stat -a -e hns3_pmu_sicl_0/config=0x1020F,global=1/ -I 1000
90 is same as mac id. The "tc" filter option must be set to 0xF in this mode,
95 $# perf stat -a -e hns3_pmu_sicl_0/config=0x1020F,port=0,tc=0xF/ -I 1000
[all …]
/Documentation/devicetree/bindings/input/touchscreen/
Dfsl,imx6ul-tsc.yaml48 default: 0xffff
49 minimum: 0
50 maximum: 0xffffff
56 default: 0xfff
57 minimum: 0
58 maximum: 0xffffffff
85 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
92 pinctrl-0 = <&pinctrl_tsc>;
94 measure-delay-time = <0xfff>;
95 pre-charge-time = <0xffff>;
/Documentation/ABI/testing/
Dsysfs-platform-brcmstb-memc8 from 0 (disable inactivity timeout) to 65535 (0xffff).
Dsysfs-bus-event_source-devices-events23 event=0xNNNN
25 where 'N' is a hex digit and the number '0xNNNN' shows the
52 a number is base-16 format with a '0x' prefix (lowercase only).
54 is implied that 0x1 is assigned to that <term>.
58 event=0x2abc
59 event=0x423,inv,cmask=0x3
60 domain=0x1,offset=0x8,starting_index=0xffff
61 domain=0x1,offset=0x8,core=?
/Documentation/devicetree/bindings/clock/st/
Dst,clkgen-pll.txt30 reg = <0x92b0000 0xffff>;
/Documentation/devicetree/bindings/clock/
Dfsl,plldig.yaml28 const: 0
53 reg = <0xf1f0000 0xffff>;
54 #clock-cells = <0>;
/Documentation/devicetree/bindings/bus/
Dbrcm,bus-axi.txt26 reg = <0x18000000 0x1000>;
27 ranges = <0x00000000 0x18000000 0x00100000>;
31 interrupt-map-mask = <0x000fffff 0xffff>;
33 /* Ethernet Controller 0 */
34 <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
37 <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
39 /* PCIe Controller 0 */
40 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
41 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
42 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/Documentation/PCI/endpoint/
Dpci-ntb-howto.rst66 baseclass_code deviceid msi_interrupts pci-epf-ntb.0
73 vendorid with 0xffff and interrupt_pin with 0x0001::
76 0xffff
78 0x0001
88 # echo 0x104c > functions/pci_epf_ntb/func1/vendorid
89 # echo 0xb00d > functions/pci_epf_ntb/func1/deviceid
96 # ls functions/pci_epf_ntb/func1/pci_epf_ntb.0/
102 # echo 4 > functions/pci_epf_ntb/func1/pci_epf_ntb.0/db_count
103 # echo 128 > functions/pci_epf_ntb/func1/pci_epf_ntb.0/spad_count
104 # echo 2 > functions/pci_epf_ntb/func1/pci_epf_ntb.0/num_mws
[all …]
Dpci-test-howto.rst67 vendorid with 0xffff and interrupt_pin with 0x0001::
70 0xffff
72 0x0001
82 # echo 0x104c > functions/pci_epf_test/func1/vendorid
83 # echo 0xb500 > functions/pci_epf_test/func1/deviceid
Dpci-vntb-howto.rst62 baseclass_code deviceid msi_interrupts pci-epf-ntb.0
69 vendorid with 0xffff and interrupt_pin with 0x0001::
72 0xffff
74 0x0001
84 # echo 0x1957 > functions/pci_epf_vntb/func1/vendorid
85 # echo 0x0809 > functions/pci_epf_vntb/func1/deviceid
92 # ls functions/pci_epf_vntb/func1/pci_epf_vntb.0/
98 # echo 4 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/db_count
99 # echo 128 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/spad_count
100 # echo 1 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/num_mws
[all …]
/Documentation/userspace-api/media/dvb/
Ddmx-get-pes-pids.rst41 pids[DMX_PES_AUDIO] 0 first audio PID
50 A value equal to 0xffff means that the PID was not filled by the
56 On success 0 is returned.
/Documentation/fb/
Dcmap_xfbdev.rst12 .red = { 4, 3, 0 },
13 .green = { 0, 0, 0 },
14 .blue = { 0, 0, 0 },
19 for (i = 0; i < 8; i++)
20 info->cmap.red[i] = (((2*i)+1)*(0xFFFF))/16;
26 for (i=0; i < 8; i++) {
28 memset(colorspec,0,64);
/Documentation/devicetree/bindings/opp/
Doperating-points-v2-ti-cpu.yaml40 '^opp(-?[0-9]+)*$':
71 opp-supported-hw = <0x06 0x0020>;
78 opp-supported-hw = <0x01 0xFFFF>;
84 opp-supported-hw = <0x06 0x0040>;
90 opp-supported-hw = <0x04 0x0200>;
/Documentation/devicetree/bindings/sound/
Dwlf,wm8962.yaml29 const: 0
74 within [0x0, 0xffff] are valid. Any other value is regarded as setting
75 the GPIO register to its reset value 0x0.
101 #size-cells = <0>;
105 reg = <0x1a>;
116 0x0000 /* 0:Default */
117 0x0000 /* 1:Default */
118 0x0013 /* 2:FN_DMICCLK */
119 0x0000 /* 3:Default */
120 0x8014 /* 4:FN_DMICCDAT */
[all …]
Dwlf,wm8994.yaml72 const: 0
79 of these registers is performed. If any value is over 0xffff then the
174 #size-cells = <0>;
178 reg = <0x1a>;
179 clocks = <&i2s0 0>;
191 wlf,ldo1ena-gpios = <&gpb0 0 GPIO_ACTIVE_HIGH>;
/Documentation/admin-guide/
Dsvga.rst37 0..35 - Menu item number (when you have used the menu to view the list of
39 to use). 0..9 correspond to "0".."9", 10..35 to "a".."z". Warning: the
44 0x.... - Hexadecimal video mode ID (also displayed on the menu, see below
61 0 0F00 80x25
62 1 0F01 80x50
63 2 0F02 80x43
64 3 0F03 80x26
74 "0 0F00 80x25" means that the first menu item (the menu items are numbered
75 from "0" to "9" and from "a" to "z") is a 80x25 mode with ID=0x0f00 (see the
112 expressed in a hexadecimal notation (starting with "0x"). You can set a mode
[all …]
/Documentation/filesystems/ext4/
Dgroup_descr.rst53 * - 0x0
57 * - 0x4
61 * - 0x8
65 * - 0xC
69 * - 0xE
73 * - 0x10
77 * - 0x12
81 * - 0x14
85 * - 0x18
89 * - 0x1A
[all …]
/Documentation/sound/cards/
Daudigy-mixer.rst47 name='PCM Front Playback Volume',index=0
53 name='PCM Surround Playback Volume',index=0
60 name='PCM Side Playback Volume',index=0
66 name='PCM Center Playback Volume',index=0
72 name='PCM LFE Playback Volume',index=0
78 name='PCM Playback Volume',index=0
81 accumulators. ALSA uses accumulators 0 and 1 for left and right PCM samples for
84 name='PCM Capture Volume',index=0
87 accumulators. ALSA uses accumulators 0 and 1 for left and right PCM samples for
90 name='Music Playback Volume',index=0
[all …]
/Documentation/networking/device_drivers/ethernet/aquantia/
Datlantic.rst100 PHYAD: 0
126 version: 5.2.0-050200rc5-generic-kern
151 InErrors: 0
168 InDroppedDma: 0
169 Queue[0] InPackets: 23567131
170 Queue[0] OutPackets: 20070028
171 Queue[0] InJumboPackets: 0
172 Queue[0] InLroPackets: 0
173 Queue[0] InErrors: 0
176 Queue[1] InJumboPackets: 0
[all …]
/Documentation/networking/
Dproc_net_tcp.rst33 1000 0 54165785 4 cd1e6040 25 4 27 3 -1
36 | | | | | | | | | is >= 0xFFFF
45 | |----------------------------------> unanswered 0-window probes
51 0 no timer is pending
/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-single.yaml49 const: 0
100 '-pins(-[0-9]+)?$|-pin$':
194 reg = <0x4a100040 0x0196>;
196 #size-cells = <0>;
201 pinctrl-single,function-mask = <0xffff>;
202 pinctrl-single,gpio-range = <&range 0 3 0>;
209 <0xd8 0x118>,
210 <0xda 0>,
211 <0xdc 0x118>,
212 <0xde 0>;

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