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/Documentation/devicetree/bindings/net/bluetooth/
Dbrcm,bcm4377-bluetooth.yaml70 reg = <0xa0000000 0x1000000>;
72 ranges = <0x43000000 0x6 0xa0000000 0xa0000000 0x0 0x20000000>;
74 bluetooth@0,1 {
76 reg = <0x100 0x0 0x0 0x0 0x0>;
/Documentation/devicetree/bindings/mtd/
Dmxicy,nand-ecc-engine.yaml36 reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>;
38 clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
41 #size-cells = <0>;
43 flash@0 {
45 reg = <0>;
52 reg = <0x43c40000 0x10000>;
59 reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>;
61 clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
64 #size-cells = <0>;
67 flash@0 {
[all …]
/Documentation/devicetree/bindings/i2c/
Dopencores,i2c-ocores.yaml60 default: 0
92 reg = <0xa0000000 0x8>;
94 #size-cells = <0>;
98 reg-shift = <0>; /* 8 bit registers */
104 reg = <0xa0000000 0x8>;
106 #size-cells = <0>;
111 reg-shift = <0>; /* 8 bit registers */
/Documentation/devicetree/bindings/w1/
Damd,axi-1wire-host.yaml39 reg = <0xa0000000 0x10000>;
40 clocks = <&zynqmp_clk 0x47>;
41 interrupts = <GIC_SPI 0x59 IRQ_TYPE_LEVEL_HIGH>;
/Documentation/devicetree/bindings/i3c/
Dsilvaco,i3c-master.yaml56 interrupts = <0 89 4>;
57 reg = <0xa0000000 0x1000>;
59 #size-cells = <0>;
Dmipi-i3c-hci.yaml48 reg = <0xa0000000 0x2000>;
51 #size-cells = <0>;
/Documentation/devicetree/bindings/pci/
Dapple,pcie.yaml114 reg = <0x6 0x90000000 0x0 0x1000000>,
115 <0x6 0x80000000 0x0 0x100000>,
116 <0x6 0x81000000 0x0 0x4000>,
117 <0x6 0x82000000 0x0 0x4000>,
118 <0x6 0x83000000 0x0 0x4000>;
130 iommu-map = <0x100 &dart0 1 1>,
131 <0x200 &dart1 1 1>,
132 <0x300 &dart2 1 1>;
133 iommu-map-mask = <0xff00>;
135 bus-range = <0 3>;
[all …]
Dmobiveil-pcie.txt49 reg = <0xa0000000 0x00001000>,
50 <0xb0000000 0x00010000>,
51 <0xff000000 0x00200000>,
52 <0xb0010000 0x00001000>;
60 bus-range = <0x00000000 0x000000ff>;
64 interrupts = < 0 89 4 >;
65 interrupt-map-mask = <0 0 0 7>;
66 interrupt-map = <0 0 0 0 &pci_express 0>,
67 <0 0 0 1 &pci_express 1>,
68 <0 0 0 2 &pci_express 2>,
[all …]
Dxlnx,xdma-host.yaml50 - const: 0
51 - const: 0
52 - const: 0
68 const: 0
124 reg = <0x0 0xa0000000 0x0 0x10000000>;
125 ranges = <0x2000000 0x0 0xb0000000 0x0 0xb0000000 0x0 0x1000000>,
126 <0x43000000 0x5 0x0 0x5 0x0 0x0 0x1000000>;
135 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
136 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
137 <0 0 0 2 &pcie_intc_0 1>,
[all …]
Dnvidia,tegra20-pcie.txt27 - cell 0 specifies the bus and device numbers of the root port:
30 - cell 1 denotes the upper 32 address bits and should be 0
45 - 0x81000000: I/O memory region
46 - 0x82000000: non-prefetchable memory region
47 - 0xc2000000: prefetchable memory region
73 - pinctrl-0: phandle for the default/active state of pin configurations.
104 - If lanes 0 to 3 are used:
150 - Root port 0 uses 4 lanes, root port 1 is unused.
158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
171 reg = <0x80003000 0x00000800 /* PADS registers */
[all …]
/Documentation/devicetree/bindings/spi/
Dmxicy,mx25f0a-spi.yaml59 reg = <0x43c30000 0x10000>, <0xa0000000 0x20000000>;
61 clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 18>;
64 #size-cells = <0>;
/Documentation/devicetree/bindings/mmc/
Datmel,sama5d2-sdhci.yaml86 reg = <0xa0000000 0x300>;
87 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
/Documentation/devicetree/bindings/media/
Dallegro,al5e.yaml77 reg = <0 0xa0009000 0 0x1000>,
78 <0 0xa0000000 0 0x8000>;
80 interrupts = <0 96 4>;
81 clocks = <&xlnx_vcu 0>, <&xlnx_vcu 1>,
94 reg = <0 0xa0029000 0 0x1000>,
95 <0 0xa0020000 0 0x8000>;
97 interrupts = <0 96 4>;
/Documentation/devicetree/bindings/net/
Dengleder,tsnep.yaml83 reg = <0x0 0xa0000000 0x0 0x10000>;
84 interrupts = <0 89 1>;
91 #size-cells = <0>;
102 reg = <0x0 0xa0010000 0x0 0x10000>;
103 interrupts = <0 93 1>, <0 94 1>, <0 95 1>, <0 96 1>;
111 #size-cells = <0>;
Dcavium-pip.txt18 - #size-cells: Must be <0>.
29 - #size-cells: Must be <0>.
40 - rx-delay: Delay value for RGMII receive clock. Optional. Disabled if 0.
43 - tx-delay: Delay value for RGMII transmit clock. Optional. Disabled if 0.
51 #size-cells = <0>;
52 reg = <0x11800 0xa0000000 0x0 0x2000>;
54 interface@0 {
57 #size-cells = <0>;
58 reg = <0>; /* interface */
60 ethernet@0 {
[all …]
/Documentation/arch/xtensa/
Dmmu.rst16 - RASID is 0x04030201 (reset state).
28 After step 2, we jump to virtual address in the range 0x40000000..0x5fffffff
29 or 0x00000000..0x1fffffff, depending on whether the kernel was loaded below
30 0x40000000 or above. That address corresponds to next instruction to execute
32 The scheme below assumes that the kernel is loaded below 0x40000000.
49 The default location of IO peripherals is above 0xf0000000. This may be changed
75 | Userspace | 0x00000000 TASK_SIZE
76 +------------------+ 0x40000000
78 | Page table | XCHAL_PAGE_TABLE_VADDR 0x80000000 XCHAL_PAGE_TABLE_SIZE
80 | KASAN shadow map | KASAN_SHADOW_START 0x80400000 KASAN_SHADOW_SIZE
[all …]
/Documentation/translations/zh_CN/arch/loongarch/
Dintroduction.rst98 0x0 当前模式信息 CRMD
99 0x1 异常前模式信息 PRMD
100 0x2 扩展部件使能 EUEN
101 0x3 杂项控制 MISC
102 0x4 异常配置 ECFG
103 0x5 异常状态 ESTAT
104 0x6 异常返回地址 ERA
105 0x7 出错(Faulting)虚拟地址 BADV
106 0x8 出错(Faulting)指令字 BADI
107 0xC 异常入口地址 EENTRY
[all …]
/Documentation/translations/zh_TW/arch/loongarch/
Dintroduction.rst98 0x0 當前模式信息 CRMD
99 0x1 異常前模式信息 PRMD
100 0x2 擴展部件使能 EUEN
101 0x3 雜項控制 MISC
102 0x4 異常配置 ECFG
103 0x5 異常狀態 ESTAT
104 0x6 異常返回地址 ERA
105 0x7 出錯(Faulting)虛擬地址 BADV
106 0x8 出錯(Faulting)指令字 BADI
107 0xC 異常入口地址 EENTRY
[all …]
/Documentation/arch/loongarch/
Dintroduction.rst101 0x0 Current Mode Information CRMD
102 0x1 Pre-exception Mode Information PRMD
103 0x2 Extension Unit Enable EUEN
104 0x3 Miscellaneous Control MISC
105 0x4 Exception Configuration ECFG
106 0x5 Exception Status ESTAT
107 0x6 Exception Return Address ERA
108 0x7 Bad (Faulting) Virtual Address BADV
109 0x8 Bad (Faulting) Instruction Word BADI
110 0xC Exception Entrypoint Address EENTRY
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