| /Documentation/devicetree/bindings/pci/ |
| D | xgene-pci.txt | 35 reg = < 0x00 0x1f2b0000 0x0 0x00010000 /* Controller registers */
36 0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */
38 ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000 /* io */
39 0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */
40 dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
41 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
42 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
43 interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
44 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
45 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
[all …]
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| D | xgene-pci-msi.txt | 8 - reg: physical base address (0x79000000) and length (0x900000) for controller
13 interrupt number 0x10 to 0x1f.
27 reg = <0x00 0x79000000 0x0 0x900000>;
28 interrupts = <0x0 0x10 0x4>
29 <0x0 0x11 0x4>
30 <0x0 0x12 0x4>
31 <0x0 0x13 0x4>
32 <0x0 0x14 0x4>
33 <0x0 0x15 0x4>
34 <0x0 0x16 0x4>
[all …]
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| D | mvebu-pci.txt | 23 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s
32 registers area. This range entry translates the '0x82000000 0 r' PCI
33 address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part
34 of the internal register window (as identified by MBUS_ID(0xf0,
35 0x01)).
39 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0
79 value is 0.
99 bus-range = <0x00 0xff>;
103 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
104 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
[all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | marvell,pxa1928-usb-phy.yaml | 25 const: 0
44 reg = <0x7000 0xe0>;
46 #phy-cells = <0>;
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| D | phy-miphy28lp.txt | 56 reg = <0x9b22000 0xff>,
57 <0x9b09000 0xff>,
58 <0x9b04000 0xff>;
63 st,syscfg = <0x114 0x818 0xe0 0xec>;
71 reg = <0x9b2a000 0xff>,
72 <0x9b19000 0xff>,
73 <0x9b14000 0xff>;
78 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
87 reg = <0x8f95000 0xff>,
88 <0x8f90000 0xff>;
[all …]
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | msi-pic.txt | 45 reg = <0x41600 0x80>;
46 msi-available-ranges = <0 0x100>;
48 0xe0 0
49 0xe1 0
50 0xe2 0
51 0xe3 0
52 0xe4 0
53 0xe5 0
54 0xe6 0
55 0xe7 0>;
[all …]
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| /Documentation/devicetree/bindings/bus/ |
| D | mvebu-mbus.txt | 65 pcie-mem-aperture = <0xe0000000 0x8000000>;
66 pcie-io-aperture = <0xe8000000 0x100000>;
73 reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;
87 0xSIAA0000 0x00oooooo
91 S = 0x0 for a MBus valid window
92 S = 0xf for a non-valid window (see below)
94 If S = 0x0, then:
99 If S = 0xf, then:
105 (S = 0x0), an address decoding window is allocated. On the other side,
106 entries for translation that do not correspond to valid windows (S = 0xf)
[all …]
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| /Documentation/devicetree/bindings/spi/ |
| D | mediatek,spi-mtk-nor.yaml | 86 reg = <0 0x1100d000 0 0xe0>;
92 #size-cells = <0>;
94 flash@0 {
96 reg = <0>;
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| /Documentation/devicetree/bindings/sound/ |
| D | cs35l33.txt | 22 0, then VBST = VP. If greater than 0, the boost voltage will be 3300mV with
31 20ms. If this property is set to 0,1,2,3 then ramp times would be 40ms,
39 ADC data word. This property can be set as a value of 0 for bits 15 down
40 to 0, 6 for 21 down to 6, 7, for 22 down to 7, 8 for 23 down to 8.
54 LRCLK cycles. If this property is set to 0, 1, 2, or 3 then the memory
64 0xF).
72 from 0 to 7 for delays of 5ms, 10ms, 50ms, 100ms, 200ms, 500ms, 1000ms.
80 The reference voltage starts at 3000mV with a value of 0x3 and is increased
85 tracking. This property can be set to values from 0 to 3 with rates of 128
90 using VPMON. This property can be set to values from 0 to 6 starting at
[all …]
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| /Documentation/translations/zh_CN/dev-tools/ |
| D | kmemleak.rst | 59 设定自动内存扫描间隔，以秒为单位（默认值为 600，设置为 0 表示停
213 unreferenced object 0xffff89862ca702e8 (size 32):
219 [<00000000e0a73ec7>] 0xffffffffc01d2036
220 [<000000000c5d2a46>] do_one_initcall+0x41/0x1df
221 [<0000000046db7e0a>] do_init_module+0x55/0x200
222 [<00000000542b9814>] load_module+0x203c/0x2480
223 [<00000000c2850256>] __do_sys_finit_module+0xba/0xe0
224 [<000000006564e7ef>] do_syscall_64+0x43/0x110
225 [<000000007c873fa6>] entry_SYSCALL_64_after_hwframe+0x44/0xa9
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| /Documentation/devicetree/bindings/timer/ |
| D | ingenic,tcu.yaml | 33 pattern: "^timer@[0-9a-f]+$"
109 minimum: 0x00
110 maximum: 0xff
111 default: 0xfc
249 reg = <0x10002000 0x1000>;
252 ranges = <0x0 0x10002000 0x1000>;
267 watchdog: watchdog@0 {
269 reg = <0x0 0xc>;
277 reg = <0x40 0x80>;
295 reg = <0xe0 0x20>;
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| /Documentation/devicetree/bindings/ufs/ |
| D | qcom,ufs.yaml | 307 reg = <0 0x01d84000 0 0x3000>;
323 iommus = <&apps_smmu 0xe0 0x0>;
345 <0 0>,
346 <0 0>,
349 <0 0>,
350 <0 0>,
351 <0 0>;
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| /Documentation/arch/powerpc/ |
| D | elf_hwcaps.rst | 52 instructions that can be used differ between the v3.0B and v3.1B ISA
58 The Power ISA before v3.0 uses the term "category" to describe certain
167 The processor supports architected PMU events in the range 0xE0-0xFF.
209 The processor supports the v3.0B / v3.0C userlevel architecture. Processors
220 The scv 0 instruction may be used for system calls, see
|
| /Documentation/hwmon/ |
| D | abituguru-datasheet.rst | 34 0xE0 and 0xE4, so we don't have to scan any port-range, just check what the two
35 ports are holding for detection. We will refer to 0xE0 as CMD (command-port)
36 and 0xE4 as DATA because Abit refers to them with these names.
38 If DATA holds 0x00 or 0x08 and CMD holds 0x00 or 0xAC an uGuru could be
40 after a reboot uGuru will hold 0x00 here, but if the driver is removed and
41 later on attached again data-port will hold 0x08, more about this later.
44 turned up which will hold 0x00 instead of 0xAC at the CMD port, thus we also
46 hold 0x09 and will only hold 0x08 after reading CMD first, so CMD must be read
72 bank 0x24 for example the addressing within the bank selects a PWM output not
87 To put the uGuru in ready mode first write 0x00 to DATA and then wait for DATA
[all …]
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| /Documentation/fault-injection/ |
| D | nvme-fault-injection.rst | 33 name fault_inject, interval 1, probability 100, space 0, times 1
34 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.15.0-rc8+ #2
39 dump_stack+0x5c/0x7d
40 should_fail+0x148/0x170
41 nvme_should_fail+0x2f/0x50 [nvme_core]
42 nvme_process_cq+0xe7/0x1d0 [nvme]
43 nvme_irq+0x1e/0x40 [nvme]
44 __handle_irq_event_percpu+0x3a/0x190
45 handle_irq_event_percpu+0x30/0x70
46 handle_irq_event+0x36/0x60
[all …]
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| /Documentation/dev-tools/ |
| D | kfence.rst | 29 CONFIG_KFENCE_SAMPLE_INTERVAL=0
41 ``CONFIG_KFENCE_SAMPLE_INTERVAL``. Setting ``kfence.sample_interval=0``
87 BUG: KFENCE: out-of-bounds read in test_out_of_bounds_read+0xa6/0x234
89 Out-of-bounds read at 0xffff8c3f2e291fff (1B left of kfence-#72):
90 test_out_of_bounds_read+0xa6/0x234
91 kunit_try_run_case+0x61/0xa0
92 kunit_generic_run_threadfn_adapter+0x16/0x30
93 kthread+0x176/0x1b0
94 ret_from_fork+0x22/0x30
96 kfence-#72: 0xffff8c3f2e292000-0xffff8c3f2e29201f, size=32, cache=kmalloc-32
[all …]
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| D | kmemleak.rst | 56 (default 600, 0 to stop the automatic scanning)
242 unreferenced object 0xffff89862ca702e8 (size 32):
248 [<00000000e0a73ec7>] 0xffffffffc01d2036
249 [<000000000c5d2a46>] do_one_initcall+0x41/0x1df
250 [<0000000046db7e0a>] do_init_module+0x55/0x200
251 [<00000000542b9814>] load_module+0x203c/0x2480
252 [<00000000c2850256>] __do_sys_finit_module+0xba/0xe0
253 [<000000006564e7ef>] do_syscall_64+0x43/0x110
254 [<000000007c873fa6>] entry_SYSCALL_64_after_hwframe+0x44/0xa9
|
| /Documentation/driver-api/i3c/ |
| D | protocol.rst | 128 The MSB of this ID specifies whether this is a broadcast command (bit7 = 0) or a
142 (0x61-0x7f and 0xe0-0xef).
185 * bit[15]: direction bit, read is 1, write is 0
189 * bit[0]: reserved/parity-bit
|
| /Documentation/userspace-api/media/cec/ |
| D | cec-ioc-g-mode.rst | 80 :header-rows: 0
81 :stub-columns: 0
87 - 0x0
93 - 0x1
100 - 0x2
116 :header-rows: 0
117 :stub-columns: 0
123 - 0x00
128 - 0x10
136 - 0x20
[all …]
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| /Documentation/admin-guide/ |
| D | java.rst | 78 echo Usage: $0 class-file
95 declare -i LINKLEVEL=0
118 echo $0:
129 echo $0:
143 echo $0:
303 program = argv[0];
340 for(i = 0; i < length; ++i)
343 if((x & 0x80) || !x)
345 if((x & 0xE0) == 0xC0)
348 if((y & 0xC0) == 0x80)
[all …]
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| /Documentation/usb/ |
| D | gadget_hid.rst | 29 .subclass = 0, /* No subclass */
34 0x05, 0x01, /* USAGE_PAGE (Generic Desktop) */
35 0x09, 0x06, /* USAGE (Keyboard) */
36 0xa1, 0x01, /* COLLECTION (Application) */
37 0x05, 0x07, /* USAGE_PAGE (Keyboard) */
38 0x19, 0xe0, /* USAGE_MINIMUM (Keyboard LeftControl) */
39 0x29, 0xe7, /* USAGE_MAXIMUM (Keyboard Right GUI) */
40 0x15, 0x00, /* LOGICAL_MINIMUM (0) */
41 0x25, 0x01, /* LOGICAL_MAXIMUM (1) */
42 0x75, 0x01, /* REPORT_SIZE (1) */
[all …]
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| /Documentation/mm/ |
| D | slub.rst | 107 If the file contains 1, the option is enabled, 0 means disabled. The debug
117 failslab file is writable, so writing 1 or 0 will enable or disable
154 .. slab_min_order=x (default 0)
174 ``debug_guardpage_minorder=N`` (N > 0), forces setting
175 ``slab_max_order`` to 0, what cause minimum possible order of
187 INFO: 0xc90f6d28-0xc90f6d2b. First byte 0x00 instead of 0xcc
188 INFO: Slab 0xc528c530 flags=0x400000c3 inuse=61 fp=0xc90f6d58
189 INFO: Object 0xc90f6d20 @offset=3360 fp=0xc90f6d58
190 INFO: Allocated in get_modalias+0x61/0xf5 age=53 cpu=1 pid=554
192 Bytes b4 (0xc90f6d10): 00 00 00 00 00 00 00 00 5a 5a 5a 5a 5a 5a 5a 5a ........ZZZZZZZZ
[all …]
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| /Documentation/filesystems/ext4/ |
| D | super.rst | 12 number is either 0 or a power of 3, 5, or 7. If the flag is not set,
29 * - 0x0
33 * - 0x4
37 * - 0x8
41 * - 0xC
45 * - 0x10
49 * - 0x14
53 is typically 0 for all other block sizes.
54 * - 0x18
58 * - 0x1C
[all …]
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| /Documentation/userspace-api/ioctl/ |
| D | hdio.rst | 41 Unless otherwise specified, all ioctl calls return 0 on success
162 0=16-bit, 1=32-bit, 2,3 = 32bit+sync
186 memset(&task.req_task, 0, sizeof(task.req_task));
256 [4] The default value of SELECT is (0xa0|DEV_bit|LBA_bit)
258 per port chipsets, it's (0xa0|DEV_bit|LBA_bit) for the first
259 pair and (0x80|DEV_bit|LBA_bit) for the second pair.
299 SELECT First, masked with 0xE0 if LBA48, 0xEF
411 args[0] COMMAND
420 args[0] COMMAND
433 args[0] status
[all …]
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| /Documentation/trace/ |
| D | histogram.rst | 226 field:unsigned short common_type; offset:0; size:2; signed:0;
227 field:unsigned char common_flags; offset:2; size:1; signed:0;
228 field:unsigned char common_preempt_count; offset:3; size:1; signed:0;
231 field:unsigned long call_site; offset:8; size:8; signed:0;
232 field:const void * ptr; offset:16; size:8; signed:0;
233 field:size_t bytes_req; offset:24; size:8; signed:0;
234 field:size_t bytes_alloc; offset:32; size:8; signed:0;
235 field:gfp_t gfp_flags; offset:40; size:4; signed:0;
288 Dropped: 0
305 allowed for the table (normally 0, but if not a hint that you may
[all …]
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