Searched +full:0 +full:xe0000000 (Results 1 – 8 of 8) sorted by relevance
| /Documentation/devicetree/bindings/hwinfo/ |
| D | samsung,s5pv210-chipid.yaml | 29 reg = <0xe0000000 0x1000>;
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| /Documentation/devicetree/bindings/pci/ |
| D | xilinx-versal-cpm.yaml | 55 const: 0
87 interrupts = <0 72 4>;
89 interrupt-map-mask = <0 0 0 7>;
90 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
91 <0 0 0 2 &pcie_intc_0 1>,
92 <0 0 0 3 &pcie_intc_0 2>,
93 <0 0 0 4 &pcie_intc_0 3>;
94 bus-range = <0x00 0xff>;
95 ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>,
96 <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
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| D | xlnx,nwl-pcie.yaml | 50 - const: 0
51 - const: 0
52 - const: 0
87 const: 0
125 reg = <0x0 0xfd0e0000 0x0 0x1000>,
126 <0x0 0xfd480000 0x0 0x1000>,
127 <0x80 0x00000000 0x0 0x10000000>;
129 ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
130 <0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>;
141 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
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| /Documentation/devicetree/bindings/reset/ |
| D | intel,rcu-gw.yaml | 28 minimum: 0
54 reg = <0xe0000000 0x20000>;
55 intel,global-reset = <0x10 30>;
61 reg = <0xe0d00000 0x30>;
64 resets = <&rcu0 0x30 21>;
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| /Documentation/devicetree/bindings/serial/ |
| D | cdns,uart.yaml | 79 reg = <0xe0000000 0x1000>;
80 interrupts = <0 27 4>;
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| /Documentation/devicetree/bindings/bus/ |
| D | mvebu-mbus.txt | 65 pcie-mem-aperture = <0xe0000000 0x8000000>;
66 pcie-io-aperture = <0xe8000000 0x100000>;
73 reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>;
87 0xSIAA0000 0x00oooooo
91 S = 0x0 for a MBus valid window
92 S = 0xf for a non-valid window (see below)
94 If S = 0x0, then:
99 If S = 0xf, then:
105 (S = 0x0), an address decoding window is allocated. On the other side,
106 entries for translation that do not correspond to valid windows (S = 0xf)
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| /Documentation/arch/xtensa/ |
| D | mmu.rst | 16 - RASID is 0x04030201 (reset state).
28 After step 2, we jump to virtual address in the range 0x40000000..0x5fffffff
29 or 0x00000000..0x1fffffff, depending on whether the kernel was loaded below
30 0x40000000 or above. That address corresponds to next instruction to execute
32 The scheme below assumes that the kernel is loaded below 0x40000000.
49 The default location of IO peripherals is above 0xf0000000. This may be changed
75 | Userspace | 0x00000000 TASK_SIZE
76 +------------------+ 0x40000000
78 | Page table | XCHAL_PAGE_TABLE_VADDR 0x80000000 XCHAL_PAGE_TABLE_SIZE
80 | KASAN shadow map | KASAN_SHADOW_START 0x80400000 KASAN_SHADOW_SIZE
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| /Documentation/devicetree/bindings/net/ |
| D | microchip,lan966x-switch.yaml | 20 pattern: "^switch@[0-9a-f]+$"
68 const: 0
73 "^port@[0-9a-f]+$":
83 const: 0
143 reg = <0xe0000000 0x0100000>,
144 <0xe2000000 0x0800000>;
148 resets = <&switch_reset 0>;
152 #size-cells = <0>;
154 port0: port@0 {
155 reg = <0>;
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