| /Documentation/ABI/testing/ |
| D | sysfs-bus-event_source-devices-dfl_fme | 13 event = "config:0-11" - event ID
19 fab_mmio_read = "event=0x06,evtype=0x02,portid=0xff"
21 It shows this fab_mmio_read is a fabric type (0x02) event with
22 0x06 local event id for overall monitoring (portid=0xff).
43 Basic events (evtype=0x00)::
45 clock = "event=0x00,evtype=0x00,portid=0xff"
47 Cache events (evtype=0x01)::
49 cache_read_hit = "event=0x00,evtype=0x01,portid=0xff"
50 cache_read_miss = "event=0x01,evtype=0x01,portid=0xff"
51 cache_write_hit = "event=0x02,evtype=0x01,portid=0xff"
[all …]
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| D | debugfs-dell-wmi-ddv | 8 character (0xFF).
24 character (0xFF).
|
| /Documentation/devicetree/bindings/soundwire/ |
| D | qcom,soundwire.yaml | 64 const: 0
80 Value of 0xff indicates that this option is not implemented
91 Value of 0xff indicates that this option is not implemented
102 Value of 0xffff indicates that this option is not implemented
113 Value of 0xff indicates that this option is not implemented
124 Value of 0xff indicates that this option is not implemented
135 Value of 0xff indicates that this option is not implemented
145 0 to indicate Blocks are per Channel
148 Value of 0xff indicates that this option is not implemented
155 - minimum: 0
[all …]
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| /Documentation/admin-guide/ |
| D | binfmt-misc.rst | 32 defaults to 0 if you omit it (i.e. you write ``:name:type::magic...``).
44 is an (optional, defaults to all 0xff) mask. You can mask out some
57 ``P`` - preserve-argv[0]
59 the original argv[0] with the full path to the binary. When this
61 vector for this purpose, thus preserving the original ``argv[0]``.
102 a line ``none /proc/sys/fs/binfmt_misc binfmt_misc defaults 0 0`` to your
116 …0\x00\x00\x00\x00\x00\x00\x02\x00\x03:\xff\xff\xff\xff\xff\xfe\xfe\xff\xff\xff\xff\xff\xff\xff\xff…
117 …0\x00\x00\x00\x00\x00\x00\x02\x00\x06:\xff\xff\xff\xff\xff\xfe\xfe\xff\xff\xff\xff\xff\xff\xff\xff…
130 You can enable/disable binfmt_misc or one binary type by echoing 0 (to disable)
|
| D | btmrvl.rst | 14 bit 8:0 -- Gap
18 It could be any valid GPIO pin# (e.g. 0-7) or 0xff (SDIO interface
22 wakeup event, or 0xff for special host sleep setting.
26 # Use SDIO interface to wake up the host and set GAP to 0x80:
27 echo 0xff80 > /debug/btmrvl/config/gpiogap
30 # Use GPIO pin #3 to wake up the host and set GAP to 0xff:
31 echo 0x03ff > /debug/btmrvl/config/gpiogap
40 0 -- Disable auto sleep mode
49 echo 0 > /debug/btmrvl/config/psmode
59 0 -- Wake up firmware
[all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-miphy28lp.txt | 56 reg = <0x9b22000 0xff>,
57 <0x9b09000 0xff>,
58 <0x9b04000 0xff>;
63 st,syscfg = <0x114 0x818 0xe0 0xec>;
71 reg = <0x9b2a000 0xff>,
72 <0x9b19000 0xff>,
73 <0x9b14000 0xff>;
78 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
87 reg = <0x8f95000 0xff>,
88 <0x8f90000 0xff>;
[all …]
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| /Documentation/networking/ |
| D | mac80211-injection.rst | 75 0x00, 0x00, // <-- radiotap version
76 0x0b, 0x00, // <- radiotap header length
77 0x04, 0x0c, 0x00, 0x00, // <-- bitmap
78 0x6c, // <-- rate
79 0x0c, //<-- tx power
80 0x01 //<-- antenna
85 0x08, 0x01, 0x00, 0x00,
86 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
87 0x13, 0x22, 0x33, 0x44, 0x55, 0x66,
88 0x13, 0x22, 0x33, 0x44, 0x55, 0x66,
[all …]
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| /Documentation/devicetree/bindings/net/ |
| D | marvell-bt-8xxx.txt | 52 #size-cells = <0>;
60 0x37 0x01 0x1c 0x00 0xff 0xff 0xff 0xff 0x01 0x7f 0x04 0x02
61 0x00 0x00 0xba 0xce 0xc0 0xc6 0x2d 0x00 0x00 0x00 0x00 0x00
62 0x00 0x00 0xf0 0x00>;
63 marvell,wakeup-pin = /bits/ 16 <0x0d>;
64 marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
72 #size-cells = <0>;
80 marvell,wakeup-pin = /bits/ 16 <0x0d>;
81 marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
|
| /Documentation/devicetree/bindings/sound/ |
| D | ti,tlv320aic32x4.yaml | 50 const: 0
85 #size-cells = <0>;
88 reg = <0x18>;
94 0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
95 0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
96 0x04 /* MFP3 AIC32X4_MFP3_GPIO_ENABLED */
97 0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
98 0x08 /* MFP5 AIC32X4_MFP5_GPIO_INPUT */
|
| D | omap-mcbsp.txt | 25 reg = <0x49022000 0xff>,
26 <0x49028000 0xff>;
28 interrupts = <0 17 0x4>, /* OCP compliant interrupt */
29 <0 62 0x4>, /* TX interrupt */
30 <0 63 0x4>, /* RX interrupt */
31 <0 4 0x4>; /* Sidetone */
|
| D | fsl,sai.yaml | 51 - description: master clock source 0 (obsoleted)
108 - description: format Default(0), I2S(1) or PDM(2)
109 enum: [0, 1, 2]
148 const: 0
177 reg = <0x40031000 0x1000>;
180 pinctrl-0 = <&pinctrl_sai2_1>;
183 <&clks 0>, <&clks 0>;
186 dmas = <&edma0 0 20>, <&edma0 0 21>;
196 reg = <0x30010000 0x10000>;
203 dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
[all …]
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| D | brcm,bcm63xx-audio.txt | 6 - #size-cells: 32bit valued, 0 cell.
23 #size-cells = <0>;
25 reg = <0xFF802080 0xFF>;
|
| /Documentation/devicetree/bindings/ata/ |
| D | sata_highbank.yaml | 60 The upper 24 bits of each entry are always 0 and thus ignored.
83 reg = <0xffe08000 0x1000>;
86 calxeda,port-phys = <&combophy5 0>, <&combophy0 0>, <&combophy0 1>,
89 calxeda,led-order = <4 0 1 2 3>;
90 calxeda,tx-atten = <0xff 22 0xff 0xff 23>;
92 calxeda,post-clocks = <0>;
|
| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad4695.yaml | 106 The first cell is the GPn number: 0 to 3.
113 const: 0
121 "^channel@[0-9a-f]$":
135 Describes the common mode channel for single channels. 0xFF is REFGND
139 enum: [1, 3, 5, 7, 9, 11, 13, 15, 0xFE, 0xFF]
140 default: 0xFF
156 const: 0xFF
199 "^channel@[0-7]$":
204 enum: [1, 3, 5, 7, 0xFE, 0xFF]
216 #size-cells = <0>;
[all …]
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| D | ti,am3359-adc.yaml | 27 description: List of analog inputs available for ADC. AIN0 = 0, AIN1 = 1 and
37 the start of ADC conversion. Maximum value is 0x3FFFF.
45 to sample (to hold start of conversion high). Maximum value is 0xFF.
72 ti,chan-step-opendelay = <0x098 0x3ffff 0x098 0x0>;
73 ti,chan-step-sampledelay = <0xff 0x0 0xf 0x0>;
|
| /Documentation/userspace-api/media/v4l/ |
| D | vidioc-subdev-querycap.rst | 46 :header-rows: 0
47 :stub-columns: 0
65 ``__u32 version = KERNEL_VERSION(0, 8, 1);``
69 ``(version >> 16) & 0xFF, (version >> 8) & 0xFF, version & 0xFF);``
76 - Reserved for future extensions. Set to 0 by the V4L2 core.
85 :header-rows: 0
86 :stub-columns: 0
90 - 0x00000001
99 On success 0 is returned, on error -1 and the ``errno`` variable is set
|
| /Documentation/driver-api/mtd/ |
| D | nand_ecc.rst | 34 if the data over which the parity is calculated is 1 and the parity bit = 0
35 if the data over which the parity is calculated is 0. So the total
45 byte 0: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp4 ... rp14
78 - rp0 is the parity of all even bytes (0, 2, 4, 6, ... 252, 254)
80 - rp2 is the parity of all bytes 0, 1, 4, 5, 8, 9, ...
85 so rp4 calculates parity over bytes 0, 1, 2, 3, 8, 9, 10, 11, 16, ...)
105 ECC Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
107 ECC 0 rp07 rp06 rp05 rp04 rp03 rp02 rp01 rp00
120 Attempt 0
126 for (i = 0; i < 256; i++)
[all …]
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| /Documentation/devicetree/bindings/pci/ |
| D | mediatek-pcie.txt | 32 where N starting from 0 to one less than the number of root ports.
80 reg = <0 0x1a000000 0 0x1000>;
88 reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */
89 <0 0x1a142000 0 0x1000>, /* Port0 registers */
90 <0 0x1a143000 0 0x1000>, /* Port1 registers */
91 <0 0x1a144000 0 0x1000>; /* Port2 registers */
96 interrupt-map-mask = <0xf800 0 0 0>;
97 interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>,
98 <0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>,
99 <0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
[all …]
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| D | xilinx-versal-cpm.yaml | 55 const: 0
87 interrupts = <0 72 4>;
89 interrupt-map-mask = <0 0 0 7>;
90 interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
91 <0 0 0 2 &pcie_intc_0 1>,
92 <0 0 0 3 &pcie_intc_0 2>,
93 <0 0 0 4 &pcie_intc_0 3>;
94 bus-range = <0x00 0xff>;
95 ranges = <0x02000000 0x0 0xe0010000 0x0 0xe0010000 0x0 0x10000000>,
96 <0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
[all …]
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| D | brcm,iproc-pcie.yaml | 117 reg = <0x18012000 0x1000>;
120 interrupt-map-mask = <0 0 0 0>;
121 interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
123 linux,pci-domain = <0>;
125 bus-range = <0x00 0xff>;
130 ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
131 <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
133 phys = <&phy 0 5>;
137 brcm,pcie-ob-axi-offset = <0x00000000>;
155 reg = <0x18013000 0x1000>;
[all …]
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| /Documentation/hwmon/ |
| D | pmbus-core.rst | 24 executed. Some devices return an error, some devices return 0xff or 0xffff and
72 Standard PMBus commands (commands values 0x00 to 0xff) are defined in the PMBUs
82 Virtual PMBus commands start with command value 0x100 and can thus easily be
84 than 0xff). Support for virtual PMBus commands is device specific and thus has
179 supports multiple phases, a phase value of 0xff indicates all phases.
220 ignored. Otherwise, a phase value of 0xff selects all phases.
230 value of 0xff selects all phases.
303 #define PMBUS_SKIP_STATUS_CHECK BIT(0)
|
| /Documentation/devicetree/bindings/hwmon/ |
| D | hpe,gxp-fan-ctrl.yaml | 43 reg = <0x1000c00 0x200>, <0xd1000000 0xff>, <0x80200000 0x100000>;
|
| D | nuvoton,nct6775.yaml | 38 maximum: 0xff
39 default: 0
51 #size-cells = <0>;
55 reg = <0x4d>;
56 nuvoton,tsi-channel-mask = <0x03>;
|
| /Documentation/dev-tools/kunit/ |
| D | usage.rst | 42 KUNIT_EXPECT_EQ(test, 1, add(1, 0));
73 KUNIT_EXPECT_EQ(test, 1, add(1, 0));
79 KUNIT_EXPECT_EQ(test, 0, add(-1, 1));
84 KUNIT_EXPECT_EQ(test, INT_MAX, add(0, INT_MAX));
106 for (i = 0; i < TEST_LEN; i++) {
111 for (i = 0; i < TEST_LEN-1; i++)
154 KUNIT_EXPECT_EQ(test, some_setup_function(), 0);
379 memset(this->contents, 0, FAKE_EEPROM_CONTENTS_SIZE);
396 char buffer[] = {0xff};
401 KUNIT_EXPECT_EQ(test, fake_eeprom->contents[0], 0);
[all …]
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| /Documentation/PCI/endpoint/function/binding/ |
| D | pci-test.rst | 12 vendorid should be 0x104c
13 deviceid should be 0xb500 for DRA74x and 0xb501 for DRA72x
17 baseclass_code should be 0xff
|