Searched +full:0 +full:xfff (Results 1 – 9 of 9) sorted by relevance
| /Documentation/devicetree/bindings/phy/ |
| D | airoha,en7581-pcie-phy.yaml | 38 const: 0
58 #phy-cells = <0>;
59 reg = <0x0 0x1fa5a000 0x0 0xfff>,
60 <0x0 0x1fa5b000 0x0 0xfff>,
61 <0x0 0x1fa5c000 0x0 0xfff>,
62 <0x0 0x1fc10044 0x0 0x4>,
63 <0x0 0x1fc30044 0x0 0x4>,
64 <0x0 0x1fc15030 0x0 0x104>;
|
| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | fsl,imx6ul-tsc.yaml | 48 default: 0xffff
49 minimum: 0
50 maximum: 0xffffff
56 default: 0xfff
57 minimum: 0
58 maximum: 0xffffffff
85 reg = <0x02040000 0x4000>, <0x0219c000 0x4000>;
92 pinctrl-0 = <&pinctrl_tsc>;
94 measure-delay-time = <0xfff>;
95 pre-charge-time = <0xffff>;
|
| /Documentation/userspace-api/media/v4l/ |
| D | pixfmt-y12i.rst | 23 left0 = 0xfff & *(__u16 *)buf;
31 :header-rows: 0
32 :stub-columns: 0
34 * - Y'\ :sub:`0left[7:0]`
35 - Y'\ :sub:`0right[3:0]`\ Y'\ :sub:`0left[11:8]`
36 - Y'\ :sub:`0right[11:4]`
|
| /Documentation/devicetree/bindings/crypto/ |
| D | fsl,sec-v4.0.yaml | 5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0.yaml#
42 - const: fsl,sec-v5.0
43 - const: fsl,sec-v4.0
47 - fsl,sec-v5.0
48 - const: fsl,sec-v4.0
49 - const: fsl,sec-v4.0
83 '^jr@[0-9a-f]+$':
98 - const: fsl,sec-v5.0-job-ring
99 - const: fsl,sec-v4.0-job-ring
101 - const: fsl,sec-v5.0-job-ring
[all …]
|
| /Documentation/devicetree/bindings/dma/ |
| D | snps,dma-spear1340.yaml | 76 default: 0
77 enum: [0, 1]
85 default: 0
86 enum: [0, 1]
113 - 0 # 8 bits
119 default: 0
129 enum: [0, 1]
151 indicates the following features: bit 0 - privileged mode,
153 default: 0
154 minimum: 0
[all …]
|
| /Documentation/devicetree/bindings/display/msm/ |
| D | hdmi.yaml | 91 port@0:
102 - port@0
188 reg = <0x04a00000 0x2f0>;
200 pinctrl-0 = <&hpd_active &ddc_active &cec_active>;
213 reg = <0x009a0000 0x50c>,
214 <0x00070000 0x6158>,
215 <0x009e0000 0xfff>;
238 pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>;
246 #size-cells = <0>;
248 port@0 {
[all …]
|
| /Documentation/driver-api/media/drivers/ccs/ |
| D | mk-ccs-regs | 28 $0 - Create CCS register definitions for C
30 usage: $0 -c ccs-regs.asc -e header -r regarray -l limit-c -L limit-header [-k]
40 exit 0;
62 my $addr = hex $_[0];
64 return 0 if $addr < 0x40; # weed out status registers
65 return 0 if $addr >= 0x100 && $addr < 0xfff; # weed out configuration registers
75 my $note = "/*\n * Generated by $0;\n * do not modify.\n */\n";
145 #define CCS_R_ADDR(r) ((r) & 0xffff)
176 print $LH "#define CCS_L_FL_SAME_REG " . bit_def(0) . "\n\n";
192 my $limitcount = 0;
[all …]
|
| /Documentation/driver-api/nvdimm/ |
| D | nvdimm.rst | 107 https://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf
163 +------+ | pm0.0 | free | pm1.0 | free | 0
165 +--+---+ | pm0.0 | free | pm1.0 | free | 1
171 +--+---+ | free | pm1.0 | free | 2
173 +------+ | free | pm1.0 | free | 3
182 of DIMM0 and DIMM1 with a user-specified name of "pm0.0". Some of that
189 named "pm1.0".
192 /sys/devices/platform/nfit_test.0 when the nfit_test.ko module from
222 if (ndctl_new(&ctx) == 0)
260 /sys/devices/platform/nfit_test.0/ndbus0
[all …]
|
| /Documentation/sound/cards/ |
| D | multisound.sh | 77 # 0x250, 0x260 or 0x270. This port can be disabled to have the card
96 # to obtain one with the command `pnpdump 1 0x203' -- this may vary
107 # io base 0x210, irq 5 and mem 0xd8000, and also sets the Kurzweil
108 # synth to 0x330 and irq 9 (may need editing for your system):
110 # (READPORT 0x0203)
115 # (CONFIGURE BVJ0440/-1 (LD 0
116 # (INT 0 (IRQ 5 (MODE +E))) (IO 0 (BASE 0x0210)) (MEM 0 (BASE 0x0d8000))
121 # (IO 0 (BASE 0x0330)) (INT 0 (IRQ 9 (MODE +E)))
140 # If you specify cfg=0x250 for the snd-msnd-pinnacle module, it
143 # on the card to 0x250, 0x260 or 0x270).
[all …]
|