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/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
Dpincfg.txt4 - pio-map : array of pin configurations. Each pin is defined by 6
7 - port : port number of the pin; 0-6 represent port A-G in UM.
8 - pin : pin number in the port.
9 - dir : direction of the pin, should encode as follows:
12 1 = The pin is an output
13 2 = The pin is an input
16 - open_drain : indicates the pin is normal or wired-OR:
19 1 = The pin is an open-drain driver. As an output, the pin is
20 driven active-low, otherwise it is three-stated.
22 - assignment : function number of the pin according to the Pin Assignment
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/Documentation/hwmon/
Dmp2975.rst1 .. SPDX-License-Identifier: GPL-2.0
17 -----------
20 vendor dual-loop, digital, multi-phase controller MP2975.
24 - Supports up to two power rail.
25 - Provides 8 pulse-width modulations (PWMs), and can be configured up
26 to 8-phase operation for rail 1 and up to 4-phase operation for rail
27 2.
28 - Supports two pages 0 and 1 for telemetry and also pages 2 and 3 for
30 - Can configured VOUT readout in direct or VID format and allows
31 setting of different formats on rails 1 and 2. For VID the following
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Dir35221.rst9 Addresses scanned: -
13 Author: Samuel Mendoza-Jonas <sam@mendozajonas.com>
17 -----------
19 IR35221 is a Digital DC-DC Multiphase Converter
23 -----------
32 # echo ir35221 0x70 > /sys/bus/i2c/devices/i2c-4/new_device
36 ----------------
44 curr[2-3]_label "iout[1-2]"
45 curr[2-3]_input Measured output current
46 curr[2-3]_crit Critical maximum current
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Dlt7182s.rst1 .. SPDX-License-Identifier: GPL-2.0
12 Addresses scanned: -
16 Author: Guenter Roeck <linux@roeck-us.net>
20 -----------
22 LT7182S is a Dual Channel 6A, 20V PolyPhase Step-Down Silent Switcher with
27 -----------
36 # echo lt7182s 0x4f > /sys/bus/i2c/devices/i2c-4/new_device
42 ----------------
45 curr[1-2]_label "iin[12]"
46 curr[1-2]_input Measured input current
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Dmp2856.rst1 .. SPDX-License-Identifier: GPL-2.0
21 -----------
24 vendor dual-loop, digital, multi-phase controller MP2856/MP2857
28 - Supports up to two power rail.
29 - Supports two pages 0 and 1 for and also pages 2 for configuration.
30 - Can configured VOUT readout in direct or VID format and allows
31 setting of different formats on rails 1 and 2. For VID the following
32 protocols are available: AMD SVI3 mode with 5-mV/LSB.
36 - SVID interface.
37 - AVSBus interface.
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/Documentation/filesystems/ext4/
Dblocks.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ------
7 sectors between 1KiB and 64KiB, and the number of sectors must be an
8 integral power of 2. Blocks are in turn grouped into larger units called
12 pages). By default a filesystem can contain 2^32 blocks; if the '64bit'
13 feature is enabled, then a filesystem can have 2^64 blocks. The location
17 For 32-bit filesystems, limits are as follows:
19 .. list-table::
20 :widths: 1 1 1 1 1
21 :header-rows: 1
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/Documentation/userspace-api/media/v4l/
Dcrop.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
25 ….48 8.19,17.01 -46.93,23.31 29.61,-25.515 -38.12,8.505 47.25,-23.31 z m -1559.25,800.73 -8.5,-17.0…
27 inkscape:connector-curvature="0"
28 style="clip-rule:evenodd" /></clipPath><clipPath
31 …-1626 -1,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2…
32 -1,0 0,1 -1,0 0,1 -1,0 0,1 -2,0 0,1 -1,0 0,2 2,0 0,-1 4,0 0,-1 5,0 0,-1 4,0 0,-1 5,0 0,-1 5,0 0,-1 …
34 inkscape:connector-curvature="0"
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Dpixfmt-rgb.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
57 for each component. For instance, the RGB565 format stores a pixel in a 16-bit
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Dsubdev-formats.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
17 :widths: 1 1 2
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
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Dyuv-formats.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _yuv-formats:
29 direction are possible, common factors are 1 (no subsampling), 2 and 4, with
33 - `4:4:4`: No subsampling
34 - `4:2:2`: Horizontal subsampling by 2, no vertical subsampling
35 - `4:2:0`: Horizontal subsampling by 2, vertical subsampling by 2
36 - `4:1:1`: Horizontal subsampling by 4, no vertical subsampling
37 - `4:1:0`: Horizontal subsampling by 4, vertical subsampling by 4
42 - .. _yuv-chroma-centered:
49 - .. _yuv-chroma-cosited:
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/Documentation/driver-api/media/drivers/ccs/
Dccs-regs.asc1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2 # Copyright (C) 2019--2020 Intel Corporation
5 # - f field LSB MSB rflags
6 # - e enum value # after a field
7 # - e enum value [LSB MSB]
8 # - b bool bit
9 # - l arg name min max elsize [discontig...]
13 # v1.1 defined in version 1.1
23 - e GRBG 0
24 - e RGGB 1
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/Documentation/gpu/
Dafbc.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 It provides fine-grained random access and minimizes the amount of
21 AFBC streams can contain several components - where a component
32 * Component 1: G
33 * Component 2: B
37 reside in the least-significant bits of the corresponding linear
43 * Component 1: G(8)
44 * Component 2: B(8)
50 * Component 1: G(8)
51 * Component 2: B(8)
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/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
6 Extra information for hardware version 1 found and
9 Version 2 (EeePC) hardware support based on patches
15 1. Introduction
16 2. Extra knobs
18 4. Hardware version 1
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
26 5.2.2 One/Three finger touch
31 6.2.1 One/Three finger touch
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Dsentelic.rst8 :Copyright: |copy| 2002-2011 Sentelic Corporation.
10 :Last update: Dec-07-2011
18 1. Set sample rate to 200;
19 2. Set sample rate to 200;
26 Packet 1
27 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
28 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
29 1 |Y|X|y|x|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 | | |B|F|W|W|W|W|
30 |---------------| |---------------| |---------------| |---------------|
32 Byte 1: Bit7 => Y overflow
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/Documentation/tools/rtla/
Drtla-timerlat-hist.rst2 rtla-timerlat-hist
4 ------------------------------------------------
6 ------------------------------------------------
8 :Manual section: 1
21 **osnoise:** tracepoints are enabled when using the **-T** option.
37 in the cpus *0-4*, *skipping zero* only lines. Moreover, **rtla timerlat
39 *SCHED_DEADLINE* priority, with a *100us* runtime every *1ms* period. The
40 *1ms* period is also passed to the *timerlat* tracer. Auto-analysis is disabled
43 [root@alien ~]# timerlat hist -d 10m -c 0-4 -P d:100us:1ms -p 1000 --no-aa
47 …Index IRQ-000 Thr-000 IRQ-001 Thr-001 IRQ-002 Thr-002 IRQ-003 Thr-003 IRQ-004 …
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/Documentation/admin-guide/device-mapper/
Ddm-service-time.rst2 dm-service-time
5 dm-service-time is a path selector module for device-mapper targets,
10 of in-flight I/Os on a path with the performance value of the path.
12 in a path-group, and it can be specified as a table argument.
14 The path selector name is 'service-time'.
26 among all paths in the path-group.
27 The valid range is 0-100.
28 If not given, minimum value '1' is used.
34 <status> <fail-count> <in-flight-size> <relative_throughput>
37 <fail-count>:
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/Documentation/devicetree/bindings/iio/imu/
Dadi,adis16475.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ADIS16475.pdf
19 - adi,adis16475-1
20 - adi,adis16475-2
21 - adi,adis16475-3
22 - adi,adis16477-1
23 - adi,adis16477-2
[all …]
/Documentation/devicetree/bindings/iio/dac/
Dadi,ad5064.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lars-Peter Clausen <lars@metafoo.de>
11 - Jonathan Cameron <jic23@kernel.org>
14 A range of similar DAC devices with between 1 and 12 channels. Some parts
21 - description: I2C devics
23 - adi,ad5024
24 - adi,ad5025
25 - adi,ad5044
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/Documentation/devicetree/bindings/display/
Drenesas,du.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Display Unit (DU)
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the Display Unit embedded in the Renesas R-Car
14 Gen1, R-Car Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,du-r8a7742 # for RZ/G1H compatible DU
20 - renesas,du-r8a7743 # for RZ/G1M compatible DU
21 - renesas,du-r8a7744 # for RZ/G1N compatible DU
[all …]
/Documentation/translations/zh_CN/core-api/
Dworkqueue.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/core-api/workqueue.rst
109 每个与实际CPU绑定的worker-pool通过钩住调度器来实现并发管理。每当
139 参数 - ``@name`` , ``@flags`` 和 ``@max_active`` 。
148 ---------
202 --------------
259 如果 ``@max_active`` == 2, ::
382 dm-crypt 的性能测试清楚地阐明了这一取舍。
385 9 3900x）上。为保持一致性，关闭CPU超频。 ``/dev/dm-0``
[all …]
Dpacking.rst1 .. SPDX-License-Identifier: GPL-2.0+
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/core-api/packing.rst
22 --------
42 --------
46 - 将一个CPU可使用的数字打包到内存缓冲区中（具有硬件约束/特殊性）。
47 - 将内存缓冲区（具有硬件约束/特殊性）解压缩为一个CPU可使用的数字。
54 以下示例介绍了打包u64字段的内存布局。打包缓冲区中的字节偏移量始终默认为0，1...7。
57 1. 通常情况下（无特殊性），我们会这样做：
63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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/Documentation/devicetree/bindings/iio/proximity/
Dsemtech,sx9324.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gwendal Grignou <gwendal@chromium.org>
11 - Daniel Campello <campello@chromium.org>
17 - $ref: /schemas/iio/iio.yaml#
24 maxItems: 1
30 maxItems: 1
32 vdd-supply:
35 svdd-supply:
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/Documentation/devicetree/bindings/usb/
Dusb-device.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-device.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
15 http://www.devicetree.org/open-firmware/bindings/usb/usb-1_0.ps
17 Four types of device-tree nodes are defined: "host-controller nodes"
31 pattern: "^usb[0-9a-f]{1,4},[0-9a-f]{1,4}$"
41 description: the number of the USB hub port or the USB host-controller
42 port to which this device is attached. The range is 1-255.
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/Documentation/admin-guide/media/
Ddvb_intro.rst1 .. SPDX-License-Identifier: GPL-2.0
12 structure of DVB-T cards are substantially similar to Analogue TV cards,
30 embedded within the modulated composite analogue signal -
38 signal encoded at a resolution of 768x576 24-bit color pixels over 25
39 frames per second - a fair amount of data is generated and must be
43 encoded and compressed form - similar to the form that is used in
46 The purpose of a simple budget digital TV card (DVB-T,C or S) is to
96 On this example, we're considering tuning into DVB-T channels in
102 Table 1. Transponder Frequencies Mount Dandenong, Vic, Aus.
115 The digital TV Scan utilities (like dvbv5-scan) have use a set of
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/Documentation/devicetree/bindings/media/i2c/
Dst,st-mipid02.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/i2c/st,st-mipid02.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
10 - Benjamin Mugnier <benjamin.mugnier@foss.st.com>
11 - Sylvain Petinot <sylvain.petinot@foss.st.com>
14 MIPID02 has two CSI-2 input ports, only one of those ports can be
15 active at a time. Active port input stream will be de-serialized
17 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2
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