Searched +full:1 +full:- +full:3 (Results 1 – 25 of 1188) sorted by relevance
12345678910>>...48
| /Documentation/devicetree/bindings/net/ |
| D | mdio-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
17 - $ref: /schemas/net/mdio-mux.yaml#
21 const: mdio-mux-gpio
26 minItems: 1
30 - compatible
31 - gpios
[all …]
|
| /Documentation/hwmon/ |
| D | ir35221.rst | 9 Addresses scanned: -
13 Author: Samuel Mendoza-Jonas <sam@mendozajonas.com>
17 -----------
19 IR35221 is a Digital DC-DC Multiphase Converter
23 -----------
32 # echo ir35221 0x70 > /sys/bus/i2c/devices/i2c-4/new_device
36 ----------------
44 curr[2-3]_label "iout[1-2]"
45 curr[2-3]_input Measured output current
46 curr[2-3]_crit Critical maximum current
[all …]
|
| D | mp2856.rst | 1 .. SPDX-License-Identifier: GPL-2.0
21 -----------
24 vendor dual-loop, digital, multi-phase controller MP2856/MP2857
28 - Supports up to two power rail.
29 - Supports two pages 0 and 1 for and also pages 2 for configuration.
30 - Can configured VOUT readout in direct or VID format and allows
31 setting of different formats on rails 1 and 2. For VID the following
32 protocols are available: AMD SVI3 mode with 5-mV/LSB.
36 - SVID interface.
37 - AVSBus interface.
[all …]
|
| D | lt7182s.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 Addresses scanned: -
16 Author: Guenter Roeck <linux@roeck-us.net>
20 -----------
22 LT7182S is a Dual Channel 6A, 20V PolyPhase Step-Down Silent Switcher with
27 -----------
36 # echo lt7182s 0x4f > /sys/bus/i2c/devices/i2c-4/new_device
42 ----------------
45 curr[1-2]_label "iin[12]"
46 curr[1-2]_input Measured input current
[all …]
|
| D | isl68137.rst | 10 Addresses scanned: -
21 Addresses scanned: -
31 Addresses scanned: -
41 Addresses scanned: -
51 Addresses scanned: -
61 Addresses scanned: -
71 Addresses scanned: -
81 Addresses scanned: -
91 Addresses scanned: -
101 Addresses scanned: -
[all …]
|
| D | dme1737.rst | 18 Addresses scanned: none, address read from Super-I/O config space
34 Addresses scanned: none, address read from Super-I/O config space
43 -----------------
52 Include non-standard LPC addresses 0x162e and 0x164e
55 - VIA EPIA SN18000
59 -----------
63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors
64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and
65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement
66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and
[all …]
|
| /Documentation/devicetree/bindings/iio/imu/ |
| D | adi,adis16475.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ADIS16475.pdf
19 - adi,adis16475-1
20 - adi,adis16475-2
21 - adi,adis16475-3
22 - adi,adis16477-1
23 - adi,adis16477-2
[all …]
|
| /Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
6 Extra information for hardware version 1 found and
15 1. Introduction
17 3. Differentiating hardware versions
18 4. Hardware version 1
25 5.2.1 Parity checking and packet re-synchronization
27 5.2.3 Two finger touch
28 6. Hardware version 3
31 6.2.1 One/Three finger touch
36 7.2.1 Status packet
[all …]
|
| /Documentation/userspace-api/media/v4l/ |
| D | pixfmt-rgb.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
57 for each component. For instance, the RGB565 format stores a pixel in a 16-bit
[all …]
|
| D | subdev-formats.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
17 :widths: 1 1 2
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
[all …]
|
| /Documentation/devicetree/bindings/iio/proximity/ |
| D | semtech,sx9324.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gwendal Grignou <gwendal@chromium.org>
11 - Daniel Campello <campello@chromium.org>
17 - $ref: /schemas/iio/iio.yaml#
24 maxItems: 1
30 maxItems: 1
32 vdd-supply:
35 svdd-supply:
[all …]
|
| /Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx6sll-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6sll-iomuxc"
8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
11 imx6sll-pinfunc.h under device tree source folder. The last integer CONFIG is
12 the pad setting value like pull-up on this pin. Please refer to i.MX6SLL
16 PAD_CTL_LVE (1 << 22)
17 PAD_CTL_HYS (1 << 16)
19 PAD_CTL_PUS_47K_UP (1 << 14)
21 PAD_CTL_PUS_22K_UP (3 << 14)
22 PAD_CTL_PUE (1 << 13)
[all …]
|
| D | fsl,imx6sl-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6sl-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 pull-up for this pin. Please refer to imx6sl datasheet for the valid pad
15 PAD_CTL_LVE (1 << 22)
16 PAD_CTL_HYS (1 << 16)
18 PAD_CTL_PUS_47K_UP (1 << 14)
20 PAD_CTL_PUS_22K_UP (3 << 14)
21 PAD_CTL_PUE (1 << 13)
22 PAD_CTL_PKE (1 << 12)
[all …]
|
| D | fsl,imx6sx-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6sx-iomuxc"
8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
11 imx6sx-pinfunc.h under device tree source folder. The last integer CONFIG is
12 the pad setting value like pull-up on this pin. Please refer to i.MX6 SoloX
16 PAD_CTL_HYS (1 << 16)
18 PAD_CTL_PUS_47K_UP (1 << 14)
20 PAD_CTL_PUS_22K_UP (3 << 14)
21 PAD_CTL_PUE (1 << 13)
22 PAD_CTL_PKE (1 << 12)
[all …]
|
| D | fsl,imx6q-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6q-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 pull-up for this pin. Please refer to imx6q datasheet for the valid pad
15 PAD_CTL_HYS (1 << 16)
17 PAD_CTL_PUS_47K_UP (1 << 14)
19 PAD_CTL_PUS_22K_UP (3 << 14)
20 PAD_CTL_PUE (1 << 13)
21 PAD_CTL_PKE (1 << 12)
22 PAD_CTL_ODE (1 << 11)
[all …]
|
| D | fsl,imx6dl-pinctrl.txt | 3 Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
7 - compatible: "fsl,imx6dl-iomuxc"
8 - fsl,pins: two integers array, represents a group of pins mux and config
11 pull-up for this pin. Please refer to imx6dl datasheet for the valid pad
15 PAD_CTL_HYS (1 << 16)
17 PAD_CTL_PUS_47K_UP (1 << 14)
19 PAD_CTL_PUS_22K_UP (3 << 14)
20 PAD_CTL_PUE (1 << 13)
21 PAD_CTL_PKE (1 << 12)
22 PAD_CTL_ODE (1 << 11)
[all …]
|
| /Documentation/devicetree/bindings/phy/ |
| D | apm-xgene-phy.txt | 1 * APM X-Gene 15Gbps Multi-purpose PHY nodes
3 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
7 - compatible : Shall be "apm,xgene-phy".
8 - reg : PHY memory resource is the SDS PHY access resource.
9 - #phy-cells : Shall be 1 as it expects one argument for setting
11 1 (SGMII), 2 (PCIe), 3 (USB), and 4 (XFI).
14 - status : Shall be "ok" if enabled or "disabled" if disabled.
16 - clocks : Reference to the clock entry.
17 - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial
19 Two set of 3-tuple setting for each (up to 3)
[all …]
|
| /Documentation/driver-api/media/drivers/ccs/ |
| D | ccs-regs.asc | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2 # Copyright (C) 2019--2020 Intel Corporation
5 # - f field LSB MSB rflags
6 # - e enum value # after a field
7 # - e enum value [LSB MSB]
8 # - b bool bit
9 # - l arg name min max elsize [discontig...]
13 # v1.1 defined in version 1.1
23 - e GRBG 0
24 - e RGGB 1
[all …]
|
| /Documentation/admin-guide/media/ |
| D | dvb_intro.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 structure of DVB-T cards are substantially similar to Analogue TV cards,
30 embedded within the modulated composite analogue signal -
38 signal encoded at a resolution of 768x576 24-bit color pixels over 25
39 frames per second - a fair amount of data is generated and must be
43 encoded and compressed form - similar to the form that is used in
46 The purpose of a simple budget digital TV card (DVB-T,C or S) is to
96 On this example, we're considering tuning into DVB-T channels in
102 Table 1. Transponder Frequencies Mount Dandenong, Vic, Aus.
115 The digital TV Scan utilities (like dvbv5-scan) have use a set of
[all …]
|
| /Documentation/devicetree/bindings/pci/ |
| D | intel,ixp4xx-pci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/intel,ixp4xx-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
15 - $ref: /schemas/pci/pci-host-bridge.yaml#
20 - enum:
21 - intel,ixp42x-pci
22 - intel,ixp43x-pci
28 - description: IXP4xx-specific registers
[all …]
|
| /Documentation/translations/zh_CN/core-api/ |
| D | packing.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/core-api/packing.rst
22 --------
42 --------
46 - 将一个CPU可使用的数字打包到内存缓冲区中（具有硬件约束/特殊性）。
47 - 将内存缓冲区（具有硬件约束/特殊性）解压缩为一个CPU可使用的数字。
54 以下示例介绍了打包u64字段的内存布局。打包缓冲区中的字节偏移量始终默认为0，1...7。
57 1. 通常情况下（无特殊性），我们会这样做：
63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
[all …]
|
| /Documentation/leds/ |
| D | leds-mlxcpld.rst | 10 -----------
14 - mlxcpld:fan1:green
15 - mlxcpld:fan1:red
16 - mlxcpld:fan2:green
17 - mlxcpld:fan2:red
18 - mlxcpld:fan3:green
19 - mlxcpld:fan3:red
20 - mlxcpld:fan4:green
21 - mlxcpld:fan4:red
22 - mlxcpld:psu:green
[all …]
|
| /Documentation/fb/ |
| D | viafb.modes | 10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
28 mode "640x480-60"
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
33 geometry 480 640 480 640 32 timings 39722 72 24 19 1 48 3 endmode
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
41 # 8 chars 3 lines
43 # 2 chars 1 lines
52 mode "640x480-75"
54 geometry 640 480 640 480 32 timings 31747 120 16 16 1 64 3 endmode
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
[all …]
|
| /Documentation/tools/rtla/ |
| D | rtla-timerlat-top.rst | 2 rtla-timerlat-top
4 -------------------------------------------
6 -------------------------------------------
8 :Manual section: 1
22 seem with the option **-T**.
35 **--aa-only** *us*
38 Print the auto-analysis if the system hits the stop tracing condition. This option
45 In the example below, the timerlat tracer is dispatched in cpus *1-23* in the
49 # timerlat -a 40 -c 1-23 -q
53 1 #12322 | 0 0 1 15 | 10 3 9 31
[all …]
|
| /Documentation/arch/arm64/ |
| D | kasan-offsets.sh | 7 printf "%02d\t" $1
8 printf "0x%08x00000000\n" $(( (0xffffffff & (-1 << ($1 - 1 - 32))) \
9 - (1 << (64 - 32 - $2)) ))
12 echo KASAN_SHADOW_SCALE_SHIFT = 3
14 print_kasan_offset 48 3
15 print_kasan_offset 47 3
16 print_kasan_offset 42 3
17 print_kasan_offset 39 3
18 print_kasan_offset 36 3
|
12345678910>>...48