Searched +full:1 +full:- +full:47 (Results 1 – 25 of 135) sorted by relevance
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| /Documentation/translations/zh_CN/core-api/ |
| D | packing.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/core-api/packing.rst
22 --------
42 --------
46 - 将一个CPU可使用的数字打包到内存缓冲区中（具有硬件约束/特殊性）。
47 - 将内存缓冲区（具有硬件约束/特殊性）解压缩为一个CPU可使用的数字。
54 以下示例介绍了打包u64字段的内存布局。打包缓冲区中的字节偏移量始终默认为0，1...7。
57 1. 通常情况下（无特殊性），我们会这样做：
61 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
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| /Documentation/hwmon/ |
| D | smsc47m1.rst | 16 http://www.smsc.com/media/Downloads_Public/Data_Sheets/47b272.pdf
18 http://www.smsc.com/media/Downloads_Public/Data_Sheets/47m10x.pdf
20 http://www.smsc.com/media/Downloads_Public/Data_Sheets/47m112.pdf
44 - Mark D. Studebaker <mdsxyz123@yahoo.com>,
45 - With assistance from Bruce Allen <ballen@uwm.edu>, and his
48 - http://www.lsc-group.phys.uwm.edu/%7Eballen/driver/
50 - Gabriele Gorla <gorlik@yahoo.com>,
51 - Jean Delvare <jdelvare@suse.de>
54 -----------
56 The Standard Microsystems Corporation (SMSC) 47M1xx Super I/O chips
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| D | f71805f.rst | 44 -----------
57 The Fintek F71806F/FG Super-I/O chip is essentially the same as the
65 ------------------
67 Voltages are sampled by an 8-bit ADC with a LSB of 8 mV. The supported
84 in1 VIN1 VTT1.2V 10K - 1.00 1.20 V
85 in2 VIN2 VRAM 100K 100K 2.00 ~1.25 V [1]_
86 in3 VIN3 VCHIPSET 47K 100K 1.47 2.24 V [2]_
87 in4 VIN4 VCC5V 200K 47K 5.25 0.95 V
89 in6 VIN6 VCC1.5V 10K - 1.00 1.50 V
90 in7 VIN7 VCORE 10K - 1.00 ~1.40 V [1]_
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| /Documentation/core-api/ |
| D | packing.rst | 6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
48 The byte offsets in the packed buffer are always implicitly 0, 1, ... 7.
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| /Documentation/arch/arm64/ |
| D | kasan-offsets.sh | 7 printf "%02d\t" $1
8 printf "0x%08x00000000\n" $(( (0xffffffff & (-1 << ($1 - 1 - 32))) \
9 - (1 << (64 - 32 - $2)) ))
15 print_kasan_offset 47 3
23 print_kasan_offset 47 4
|
| D | memory.rst | 12 with the 4KB page configuration, allowing 39-bit (512GB) or 48-bit
14 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
23 contains only user (non-global) mappings. The swapper_pg_dir address is
27 AArch64 Linux memory layout with 4KB pages + 4 levels (48-bit)::
30 -----------------------------------------------------------------------
44 AArch64 Linux memory layout with 64KB pages + 3 levels (52-bit with HW support)::
47 -----------------------------------------------------------------------
63 +--------+--------+--------+--------+--------+--------+--------+--------+
64 |63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
65 +--------+--------+--------+--------+--------+--------+--------+--------+
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| /Documentation/translations/zh_TW/arch/arm64/ |
| D | memory.txt | 1 SPDX-License-Identifier: GPL-2.0
14 ---------------------------------------------------------------------
30 ---------------------------------------------------------------------
40 分別都有 39-bit (512GB) 或 48-bit (256TB) 的虛擬地址空間。
41 對於頁大小爲 64KB的配置，僅使用 2 級轉換表，有 42-bit (4TB) 的虛擬地址空間，但內存佈局相同。
43 用戶地址空間的 63:48 位爲 0，而內核地址空間的相應位爲 1。TTBRx 的
52 -----------------------------------------------------------------------
60 -----------------------------------------------------------------------
68 -----------------------------------------------------------------------
76 -----------------------------------------------------------------------
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| /Documentation/translations/zh_CN/arch/arm64/ |
| D | memory.txt | 11 ---------------------------------------------------------------------
26 ---------------------------------------------------------------------
36 分别都有 39-bit (512GB) 或 48-bit (256TB) 的虚拟地址空间。
37 对于页大小为 64KB的配置，仅使用 2 级转换表，有 42-bit (4TB) 的虚拟地址空间，但内存布局相同。
39 用户地址空间的 63:48 位为 0，而内核地址空间的相应位为 1。TTBRx 的
48 -----------------------------------------------------------------------
56 -----------------------------------------------------------------------
64 -----------------------------------------------------------------------
72 -----------------------------------------------------------------------
82 +--------+--------+--------+--------+--------+--------+--------+--------+
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | qcom,ipq5018-tlmm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-tlmm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 const: qcom,ipq5018-tlmm
21 maxItems: 1
24 maxItems: 1
26 gpio-reserved-ranges:
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| D | canaan,k210-fpioa.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/canaan,k210-fpioa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Damien Le Moal <dlemoal@kernel.org>
16 a per-pin basis.
20 const: canaan,k210-fpioa
23 maxItems: 1
29 - description: Controller reference clock source
30 - description: APB interface clock source
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| /Documentation/devicetree/bindings/iio/light/ |
| D | st,uvis25.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
17 maxItems: 1
20 maxItems: 1
25 - compatible
26 - reg
29 - |
30 #include <dt-bindings/interrupt-controller/irq.h>
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| /Documentation/devicetree/bindings/display/armada/ |
| D | marvell,dove-lcd.txt | 4 - compatible: value should be "marvell,dove-lcd".
5 - reg: base address and size of the LCD controller
6 - interrupts: single interrupt number for the LCD controller
7 - port: video output port with endpoints, as described by graph.txt
11 - clocks: as described by clock-bindings.txt
12 - clock-names: as described by clock-bindings.txt
13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
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| /Documentation/devicetree/bindings/serial/ |
| D | fsl,s32-linflexuart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl,s32-linflexuart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 as support for full-duplex UART communication through 8-bit and 9-bit
12 frames. See chapter 47 ("LINFlexD") in the reference manual
16 - Chester Lin <chester62515@gmail.com>
19 - $ref: serial.yaml#
24 - const: fsl,s32v234-linflexuart
25 - items:
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| /Documentation/devicetree/bindings/rtc/ |
| D | nxp,lpc1788-rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/nxp,lpc1788-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC1788 real-time clock
14 - Javier Carrasco <javier.carrasco.cruz@gmail.com>
17 - $ref: rtc.yaml#
21 const: nxp,lpc1788-rtc
24 maxItems: 1
28 - description: RTC clock
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| /Documentation/devicetree/bindings/timer/ |
| D | nxp,sysctr-timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/nxp,sysctr-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bai Ping <ping.bai@nxp.com>
22 - nxp,imx95-sysctr-timer
23 - nxp,sysctr-timer
26 maxItems: 1
29 maxItems: 1
32 maxItems: 1
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| /Documentation/devicetree/bindings/dma/ |
| D | marvell,mmp-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/marvell,mmp-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Duje Mihanović <duje.mihanovic@skole.hr>
18 - marvell,pdma-1.0
19 - marvell,adma-1.0
20 - marvell,pxa910-squ
23 maxItems: 1
28 minItems: 1
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| /Documentation/devicetree/bindings/mmc/ |
| D | sdhci-am654.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
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| /Documentation/devicetree/bindings/sound/ |
| D | allwinner,sun8i-a33-codec.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/allwinner,sun8i-a33-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 - $ref: dai-common.yaml#
17 "#sound-dai-cells":
19 maximum: 1
26 - items:
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| /Documentation/devicetree/bindings/iio/humidity/ |
| D | ti,hdc3020.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li peiyu <579lpy@gmail.com>
11 - Javier Carrasco <javier.carrasco.cruz@gmail.com>
22 - items:
23 - enum:
24 - ti,hdc3021
25 - ti,hdc3022
26 - const: ti,hdc3020
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| /Documentation/devicetree/bindings/memory-controllers/ddr/ |
| D | jedec,lpddr5.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR5 SDRAM compliant to JEDEC JESD209-5
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 - $ref: jedec,lpddr-props.yaml#
18 - pattern: "^lpddr5-[0-9a-f]{2},[0-9a-f]{4}$"
19 - const: jedec,lpddr5
21 serial-id:
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | chrontel,ch7322.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Chrontel HDMI-CEC Controller
10 - Jeff Chase <jnchase@google.com>
13 The Chrontel CH7322 is a discrete HDMI-CEC controller. It is
17 - $ref: /schemas/media/cec/cec-common.yaml#
25 maxItems: 1
28 maxItems: 1
31 maxItems: 1
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| /Documentation/devicetree/bindings/clock/ |
| D | imx28-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx28-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
18 ------------------
20 pll0 1
66 ssp1 47
87 const: fsl,imx28-clkctrl
90 maxItems: 1
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| D | imx31-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx31-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <festevam@gmail.com>
18 -----------------------
20 ckih 1
66 ipu_gate 47
81 const: fsl,imx31-ccm
84 maxItems: 1
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| D | imx35-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx35-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steffen Trumtrar <s.trumtrar@pengutronix.de>
18 ---------------------------
20 mpll 1
66 gpio1_gate 47
105 const: fsl,imx35-ccm
108 maxItems: 1
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-event_source-devices-iommu | 5 Description: Read-only. Attribute group to describe the magic bits
9 ABI/testing/sysfs-bus-event_source-devices-format).
14 are listed below (See the VT-d Spec 4.0 for possible
17 event = "config:0-27" - event ID
18 event_group = "config:28-31" - event group ID
20 filter_requester_en = "config1:0" - Enable Requester ID filter
21 filter_domain_en = "config1:1" - Enable Domain ID filter
22 filter_pasid_en = "config1:2" - Enable PASID filter
23 filter_ats_en = "config1:3" - Enable Address Type filter
24 filter_page_table_en= "config1:4" - Enable Page Table Level filter
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