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/Documentation/hwmon/
Dlochnagar.rst10 -----------
12 Lochnagar 2 features built-in Current Monitor circuitry that allows for the
13 measurement of both voltage and current on up to eight of the supply voltage
14 rails provided to the minicards. The Current Monitor does not require any
15 hardware modifications or external circuitry to operate.
18 map interface to the Lochnagar board controller, and can therefore be monitored
22 ----------------
31 power1_average_interval Power averaging time input valid from 1 to 1708mS
33 in1_input Measured voltage for 1V8 DSP (milliVolts)
34 in1_label "1V8 DSP"
[all …]
Dsysfs-interface.rst4 The libsensors library offers an interface to the raw sensors data
5 through the sysfs interface. Since lm-sensors 3.0.0, libsensors is
6 completely chip-independent. It assumes that all the kernel drivers
9 libsensors, and applications using it, do not need to be modified.
10 This is a major improvement compared to lm-sensors 2.
12 Note that motherboards vary widely in the connections to sensor chips.
14 temperature sensor is connected to the CPU, or that the second fan is on
19 can change from motherboard to motherboard, the conversions cannot be
20 hard coded into the driver and have to be done in user space.
22 For this reason, even if we aim at a chip-independent libsensors, it will
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Dnct6775.rst19 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
83 * Nuvoton NCT6796D-S/NCT6799D-R
93 Guenter Roeck <linux@roeck-us.net>
96 -----------
101 The chips support up to 25 temperature monitoring sources. Up to 6 of those are
103 PCH, and SMBUS. Depending on the chip type, 2 to 6 of the temperature sources
105 temperatures. The driver reports up to 10 of the temperatures to the user.
106 There are 4 to 5 fan rotation speed sensors, 8 to 15 analog voltage sensors,
114 either 1 degC or 0.5 degC, depending on the temperature source and
117 value. Alarms are only supported for temp1 to temp6, depending on the chip type.
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Dmax31827.rst1 .. SPDX-License-Identifier: GPL-2.0
12 Addresses scanned: I2C 0x40 - 0x5f
20 Addresses scanned: I2C 0x40 - 0x5f
28 Addresses scanned: I2C 0x40 - 0x5f
34 - Daniel Matyas <daniel.matyas@analog.com>
37 -----------
40 between them is found in the default power-on behaviour of the chips. While the
41 MAX31827's fault queue is set to 1, the other two chip's fault queue is set to
43 chip's alarms are active on low. It is important to note that the chips can be
44 configured to operate in the same manner with 1 write operation to the
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/Documentation/input/devices/
Dsentelic.rst8 :Copyright: |copy| 2002-2011 Sentelic Corporation.
10 :Last update: Dec-07-2011
18 1. Set sample rate to 200;
19 2. Set sample rate to 200;
20 3. Set sample rate to 80;
26 Packet 1
27 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
28 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
29 1 |Y|X|y|x|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 | | |B|F|W|W|W|W|
30 |---------------| |---------------| |---------------| |---------------|
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/Documentation/networking/
Darcnet-hardware.rst1 .. SPDX-License-Identifier: GPL-2.0
9 1) This file is a supplement to arcnet.txt. Please read that for general
11 2) This file is no longer Linux-specific. It should probably be moved out
14 Because so many people (myself included) seem to have obtained ARCnet cards
15 without manuals, this file contains a quick introduction to ARCnet hardware,
17 e-mail apenwarr@worldvisions.ca with any settings for your particular card,
21 Introduction to ARCnet
24 ARCnet is a network type which works in a way similar to popular Ethernet
31 100 Mbps card to a 2.5 Mbps card, and so on. From what I hear, my driver does
32 work with 100 Mbps cards, but I haven't been able to verify this myself,
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/Documentation/driver-api/mtd/
Dspi-nor.rst5 How to propose a new flash addition
6 -----------------------------------
11 standard set of internal read-only parameter tables.
13 The SPI NOR driver queries the SFDP tables in order to determine the
17 on its SFDP data. All one has to do is to specify the "jedec,spi-nor"
20 There are cases however where you need to define an explicit flash
24 to implement the ``spi_nor_fixups`` hooks in order to amend the SFDP
28 -----------------------------
31 section, after the ``---`` marker.
33 1) Specify the controller that you used to test the flash and specify
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Dnand_ecc.rst2 NAND Error-correction Code
11 After that the speed was increased by 35-40%.
15 I decided to annotate my steps in this file. Perhaps it is useful to someone
26 This is done by means of a Hamming code. I'll try to explain it in
27 laymans terms (and apologies to all the pro's in the field in case I do
33 columns. The parity used is even parity which means that the parity bit = 1
34 if the data over which the parity is calculated is 1 and the parity bit = 0
39 sometimes also referred to as xor. In C the operator for xor is ^
41 Back to ecc.
46 byte 1: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp2 rp4 ... rp14
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/Documentation/ABI/testing/
Dsysfs-platform-chipidea-usb-otg6 Set a_bus_req(A-device bus request) input to be 1 if
7 the application running on the A-device wants to use the bus,
8 and to be 0 when the application no longer wants to use
9 the bus(or wants to work as peripheral). a_bus_req can also
10 be set to 1 by kernel in response to remote wakeup signaling
11 from the B-device, the A-device should decide to resume the bus.
13 Valid values are "1" and "0".
15 Reading: returns 1 if the application running on the A-device
23 The a_bus_drop(A-device bus drop) input is 1 when the
24 application running on the A-device wants to power down
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/Documentation/w1/masters/
Dw1-uart.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
4 Kernel driver w1-uart
11 -----------
13 UART 1-Wire bus driver. The driver utilizes the UART interface via the
14 Serial Device Bus to create the 1-Wire timing patterns as described in
15 the document `"Using a UART to Implement a 1-Wire Bus Master"`_.
17 …. _"Using a UART to Implement a 1-Wire Bus Master": https://www.analog.com/en/technical-articles/u…
19 In short, the UART peripheral must support full-duplex and operate in
20 open-drain mode. The timing patterns are generated by a specific
21 combination of baud-rate and transmitted byte, which corresponds to a
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Domap-hdq.rst2 Kernel driver for omap HDQ/1-wire module
7 HDQ/1-wire controller on the TI OMAP 2430/3430 platforms.
15 The HDQ/1-Wire module of TI OMAP2430/3430 platforms implement the hardware
17 Semiconductor 1-Wire protocols. These protocols use a single wire for
18 communication between the master (HDQ/1-Wire controller) and the slave
19 (HDQ/1-Wire external compliant device).
21 A typical application of the HDQ/1-Wire module is the communication with battery
24 The controller supports operation in both HDQ and 1-wire mode. The essential
25 difference between the HDQ and 1-wire mode is how the slave device responds to
26 initialization pulse.In HDQ mode, the firmware does not require the host to
[all …]
/Documentation/arch/x86/
Dtopology.rst1 .. SPDX-License-Identifier: GPL-2.0
8 representation in the kernel. Update/change when doing changes to the
11 The architecture-agnostic topology definitions are in
12 Documentation/admin-guide/cputopology.rst. This file holds x86-specific
13 differences/specialities which must not necessarily apply to the generic
14 definitions. Thus, the way to read up on Linux topology on x86 is to start
17 Needless to say, code should use the generic functions - this file is *only*
18 here to *document* the inner workings of x86 topology.
22 The main aim of the topology facilities is to present adequate interfaces to
23 code which needs to know/query/use the structure of the running system wrt
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/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
15 interface external sigma delta modulators to STM32 micro controllers.
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
[all …]
/Documentation/driver-api/dmaengine/
Ddmatest.rst7 This small document introduces how to test DMA drivers using dmatest module.
15 The dmatest module can be configured to test a specific channel. It can also
21 capability of the following: DMA_MEMCPY (memory-to-memory), DMA_MEMSET
22 (const-to-memory or memory-to-memory, when emulated), DMA_XOR, DMA_PQ.
28 Part 1 - How to build the test module
33 Device Drivers -> DMA Engine support -> DMA Test client
38 Part 2 - When dmatest is built as a module
43 % modprobe dmatest timeout=2000 iterations=1 channel=dma0chan0 run=1
49 % echo 1 > /sys/module/dmatest/parameters/iterations
51 % echo 1 > /sys/module/dmatest/parameters/run
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/Documentation/usb/
Dgadget_printer.rst15 the embedded OS. This driver has nothing to do with using a printer with
21 This will present a printer interface to the USB Host that your USB Device
22 port is connected to.
27 byte when the USB HOST sends a device request to get the printer status. The
29 /dev/g_printer . Both blocking and non-blocking read/write calls are supported.
37 To load the USB device controller driver and the printer gadget driver. The
49 the Netchip vendor id 0x0525. YOU MUST CHANGE TO YOUR OWN VENDOR ID
50 BEFORE RELEASING A PRODUCT. If you plan to release a product and don't
51 already have a Vendor ID please see www.usb.org for details on how to
56 is 0xa4a8, you should change this to an ID that's not used by any of
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/Documentation/admin-guide/media/
Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
10 handles the flow of image frames to and from capture devices and
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
22 The IDMAC is the DMA controller for transfer of image frames to and from
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/Documentation/scsi/
DChangeLog.megaraid_sas1 Release Date : Thu. Jun 19, 2014 17:00:00 PST 2014 -
2 (emaild-id:megaraidlinux@lsi.com)
7 Current Version : 06.803.02.00-rc1
8 Old Version : 06.803.01.00-rc1
9 1. Fix reset_mutex leak in megasas_reset_fusion().
12 4. Add missing initial call to megasas_get_ld_vf_affiliation().
14 -------------------------------------------------------------------------------
15 Release Date : Mon. Mar 10, 2014 17:00:00 PST 2014 -
16 (emaild-id:megaraidlinux@lsi.com)
20 Current Version : 06.803.01.00-rc1
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/Documentation/sound/hd-audio/
Drealtek-pc-beep.rst8 as I can tell, these hidden routes are designed to allow flexible PC Beep output
10 to hide a mixer behind an undocumented vendor register than to just expose it
20 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
23 |0|0|1|1| 0x7 |0|0x0|1| 0x7 | Reset value
24 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
26 1Ah input select (B): 2 bits
29 external PCBEEP pin) on the 1Ah pin node. When nonzero, expose the headphone
31 selected, the 1Ah boost control has no effect.
33 Amplify 1Ah loopback, left (L): 1 bit
34 Amplify the left channel of 1Ah before mixing it into outputs as specified
[all …]
/Documentation/sound/designs/
Dmidi-2.0.rst12 - Support of Universal MIDI Packet (UMP)
13 - Support of MIDI 2.0 protocol messages
14 - Transparent conversions between UMP and legacy MIDI 1.0 byte stream
15 - MIDI-CI for property and profile configurations
17 UMP is a new container format to hold all MIDI protocol 1.0 and MIDI
20 the events up to 16 "UMP Groups", where each UMP Group contain up to
23 MIDI 2.0 protocol is an extended protocol to achieve the higher
26 MIDI-CI is a high-level protocol that can talk with the MIDI device
31 the encoding/decoding of MIDI protocols on UMP, while MIDI-CI is
32 supported in user-space over the standard SysEx.
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/Documentation/devicetree/bindings/phy/
Dapm-xgene-phy.txt1 * APM X-Gene 15Gbps Multi-purpose PHY nodes
3 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
7 - compatible : Shall be "apm,xgene-phy".
8 - reg : PHY memory resource is the SDS PHY access resource.
9 - #phy-cells : Shall be 1 as it expects one argument for setting
11 1 (SGMII), 2 (PCIe), 3 (USB), and 4 (XFI).
14 - status : Shall be "ok" if enabled or "disabled" if disabled.
16 - clocks : Reference to the clock entry.
17 - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial
19 Two set of 3-tuple setting for each (up to 3)
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/Documentation/input/
Dinput.rst7 :Copyright: |copy| 1999-2001 Vojtech Pavlik <vojtech@ucw.cz> - Sponsored by SuSE
12 Input subsystem is a collection of drivers that is designed to support
18 loaded before any other of the input modules - it serves as a way of
22 --------------
24 These modules talk to the hardware (for example via USB), and provide
25 events (keystrokes, mouse movements) to the input module.
28 --------------
31 via various interfaces - keystrokes to the kernel, mouse movements via
32 a simulated PS/2 interface to GPM and X, and so on.
38 you'll have to load the following modules (or have them built in to the
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/Documentation/sound/cards/
Daudiophile-usb.rst2 Guide to using M-Audio Audiophile USB with ALSA and Jack
9 This document is a guide to using the M-Audio Audiophile USB (tm) device with
15 * v1.4 - Thibault Le Meur (2007-07-11)
17 - Added Low Endianness nature of 16bits-modes
19 - Modifying document structure
21 * v1.5 - Thibault Le Meur (2007-07-12)
22 - Added AC3/DTS passthru info
35 - This port supports 2 pairs of line-level audio inputs (1/4" TS and RCA)
36 - When the 1/4" TS (jack) connectors are connected, the RCA connectors
48 * sample rate from 8kHz to 96kHz
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/Documentation/admin-guide/device-mapper/
Dswitch.rst2 dm-switch
5 The device-mapper switch target creates a device that supports an
6 arbitrary mapping of fixed-size regions of I/O across a fixed set of
10 It maps I/O to underlying block devices efficiently when there is a large
11 number of fixed-sized address regions but there is no simple pattern
13 dm-stripe.
16 ----------
23 spreading are hidden from initiators connected to this storage system.
26 session is connected to an eth port on a single member. Data to a LUN
29 forwarding is invisible to the initiator. The storage layout is also
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/Documentation/admin-guide/cgroup-v1/
Ddevices.rst5 1. Description
8 Implement a cgroup to track and enforce open and mknod restrictions
12 to all types and all major and minor numbers. Major and minor are
16 The root device cgroup starts with rwm to 'all'. A child device
27 echo 'c 1:3 mr' > /sys/fs/cgroup/1/devices.allow
29 allows cgroup 1 to read and mknod the device usually known as
32 echo a > /sys/fs/cgroup/1/devices.deny
36 echo a > /sys/fs/cgroup/1/devices.allow
38 will add the 'a *:* rwm' entry to the whitelist.
44 suffice, but we can decide the best way to adequately restrict
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/Documentation/devicetree/bindings/leds/
Dleds-bcm6328.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-bcm6328.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LEDs connected to Broadcom BCM6328 controller
10 - Álvaro Fernández Rojas <noltari@gmail.com>
14 In these SoCs it's possible to control LEDs both as GPIOs or by hardware.
15 However, on some devices there are Serial LEDs (LEDs connected to a 74x164
17 as spi-gpio. See
21 exporting the 74x164 as spi-gpio prevents those LEDs to be hardware
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