Searched +full:10 +full:- +full:11 (Results 1 – 25 of 460) sorted by relevance
12345678910>>...19
| /Documentation/ABI/testing/ |
| D | sysfs-class-rapidio | 3 On-chip RapidIO controllers and PCIe-to-RapidIO bridges
21 0 = small (8-bit destination ID, max. 256 devices),
23 1 = large (16-bit destination ID, max. 65536 devices).
46 [rio@rapidio ~]$ ls /sys/class/rapidio_port/rapidio0/ -l
48 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
49 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
50 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0007
51 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0002
52 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0003
53 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0005
[all …]
|
| /Documentation/translations/zh_CN/core-api/ |
| D | packing.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/core-api/packing.rst
22 --------
42 --------
46 - 将一个CPU可使用的数字打包到内存缓冲区中（具有硬件约束/特殊性）。
47 - 将内存缓冲区（具有硬件约束/特殊性）解压缩为一个CPU可使用的数字。
63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
77 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
89 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
[all …]
|
| /Documentation/devicetree/bindings/pci/ |
| D | intel,ixp4xx-pci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/intel,ixp4xx-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
15 - $ref: /schemas/pci/pci-host-bridge.yaml#
20 - enum:
21 - intel,ixp42x-pci
22 - intel,ixp43x-pci
28 - description: IXP4xx-specific registers
[all …]
|
| D | v3-v360epc-pci.txt | 6 - compatible: should be one of:
7 "v3,v360epc-pci"
8 "arm,integrator-ap-pci", "v3,v360epc-pci"
9 - reg: should contain two register areas:
12 - interrupts: should contain a reference to the V3 error interrupt
14 - bus-range: see pci.txt
15 - ranges: this follows the standard PCI bindings in the IEEE Std
16 1275-1994 (see pci.txt) with the following restriction:
17 - The non-prefetchable and prefetchable memory windows must
19 - The prefetchable memory window must be immediately adjacent
[all …]
|
| /Documentation/userspace-api/media/v4l/ |
| D | pixfmt-yuv-planar.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. planar-yuv:
12 - Semi-planar formats use two planes. The first plane is the luma plane and
16 - Fully planar formats use three planes to store the Y, Cb and Cr components
26 and applications that support the multi-planar API, described in
27 :ref:`planar-apis`. Unless explicitly documented as supporting non-contiguous
31 Semi-Planar YUV Formats
46 For non-contiguous formats, no constraints are enforced by the format on the
57 .. flat-table:: Overview of Semi-Planar YUV Formats
58 :header-rows: 1
[all …]
|
| D | pixfmt-m420.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-M420:
10 YUV 4:2:0. Hybrid plane line-interleaved layout.
24 Y'\ :sub:`10`, Y'\ :sub:`11`.
33 .. flat-table::
34 :header-rows: 0
35 :stub-columns: 0
37 * - start + 0:
38 - Y'\ :sub:`00`
39 - Y'\ :sub:`01`
[all …]
|
| D | pixfmt-uv8.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-UV8:
24 .. flat-table::
25 :header-rows: 0
26 :stub-columns: 0
28 * - start + 0:
29 - Cb\ :sub:`00`
30 - Cr\ :sub:`00`
31 - Cb\ :sub:`01`
32 - Cr\ :sub:`01`
[all …]
|
| D | crop.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
25 ….48 8.19,17.01 -46.93,23.31 29.61,-25.515 -38.12,8.505 47.25,-23.31 z m -1559.25,800.73 -8.5,-17.0…
27 inkscape:connector-curvature="0"
28 style="clip-rule:evenodd" /></clipPath><clipPath
31 …-1626 -1,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2…
32 -1,0 0,1 -1,0 0,1 -1,0 0,1 -2,0 0,1 -1,0 0,2 2,0 0,-1 4,0 0,-1 5,0 0,-1 4,0 0,-1 5,0 0,-1 5,0 0,-1 …
34 inkscape:connector-curvature="0"
[all …]
|
| D | subdev-formats.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
23 - ``height``
[all …]
|
| D | pixfmt-y8i.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-Y8I:
10 Interleaved grey-scale image, e.g. from a stereo-pair
16 This is a grey-scale image with a depth of 8 bits per pixel, but with
17 pixels from 2 sources interleaved. Each pixel is stored in a 16-bit
27 .. flat-table::
28 :header-rows: 0
29 :stub-columns: 0
31 * - start + 0:
32 - Y'\ :sub:`00left`
[all …]
|
| D | pixfmt-z16.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-Z16:
10 16-bit depth data with distance values at each pixel
16 This is a 16-bit format, representing depth data. Each pixel is a
19 is stored in a 16-bit word in the little endian byte order.
27 .. flat-table::
28 :header-rows: 0
29 :stub-columns: 0
31 * - start + 0:
32 - Z\ :sub:`00low`
[all …]
|
| D | pixfmt-tch-tu16.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-TCH-FMT-TU16:
11 16-bit unsigned little endian raw touch data
17 This format represents unsigned 16-bit data from a touch controller.
26 .. flat-table::
27 :header-rows: 0
28 :stub-columns: 0
31 * - start + 0:
32 - R'\ :sub:`00low`
33 - R'\ :sub:`00high`
[all …]
|
| D | metafmt-generic.rst | 1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
8 Generic line-based metadata formats
14 These generic line-based metadata formats define the memory layout of the data
17 .. _v4l2-meta-fmt-generic-8:
20 -----------------------
22 The V4L2_META_FMT_GENERIC_8 format is a plain 8-bit metadata format. This format
23 is used on CSI-2 for 8 bits per :term:`Data Unit`.
26 packed into one 16-bit Data Unit. Otherwise the 16 bits per pixel dataformat is
27 :ref:`V4L2_META_FMT_GENERIC_CSI2_16 <v4l2-meta-fmt-generic-csi2-16>`.
34 .. flat-table:: Sample 4x2 Metadata Frame
[all …]
|
| D | pixfmt-srggb10.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10:
4 .. _v4l2-pix-fmt-sbggr10:
5 .. _v4l2-pix-fmt-sgbrg10:
6 .. _v4l2-pix-fmt-sgrbg10:
16 10-bit Bayer formats expanded to 16 bits
22 These four pixel formats are raw sRGB / Bayer formats with 10 bits per
23 sample. Each sample is stored in a 16-bit word, with 6 unused
24 high bits filled with zeros. Each n-pixel row contains n/2 green samples and
37 .. flat-table::
[all …]
|
| D | pixfmt-tch-td16.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-TCH-FMT-DELTA-TD16:
11 16-bit signed little endian Touch Delta
19 Delta values may range from -32768 to 32767. Typically the values will vary
27 .. flat-table::
28 :header-rows: 0
29 :stub-columns: 0
32 * - start + 0:
33 - D'\ :sub:`00low`
34 - D'\ :sub:`00high`
[all …]
|
| /Documentation/tools/rtla/ |
| D | rtla-timerlat-top.rst | 2 rtla-timerlat-top
4 -------------------------------------------
6 -------------------------------------------
22 seem with the option **-T**.
35 **--aa-only** *us*
38 Print the auto-analysis if the system hits the stop tracing condition. This option
45 In the example below, the timerlat tracer is dispatched in cpus *1-23* in the
49 # timerlat -a 40 -c 1-23 -q
53 1 #12322 | 0 0 1 15 | 10 3 9 31
54 2 #12322 | 3 0 1 12 | 10 3 9 23
[all …]
|
| D | rtla-osnoise-hist.rst | 2 rtla-osnoise-hist
4 ------------------------------------------------------
6 ------------------------------------------------------
19 occurrence in a histogram, displaying the results in a user-friendly way.
33 In the example below, *osnoise* tracer threads are set to run with real-time
34 priority *FIFO:1*, on CPUs *0-11*, for *900ms* at each period (*1s* by
37 histogram is set to group outputs in buckets of *10us* and *25* entries::
39 [root@f34 ~/]# rtla osnoise hist -P F:1 -c 0-11 -r 900000 -d 1M -b 10 -E 25
43 …Index CPU-000 CPU-001 CPU-002 CPU-003 CPU-004 CPU-005 CPU-006 CPU-007 CPU-008 …
45 …10 12224 8356 2912 878 2667 10155 4573 18894 4214 …
[all …]
|
| D | rtla-timerlat-hist.rst | 2 rtla-timerlat-hist
4 ------------------------------------------------
6 ------------------------------------------------
21 **osnoise:** tracepoints are enabled when using the **-T** option.
36 In the example below, **rtla timerlat hist** is set to run for *10* minutes,
37 in the cpus *0-4*, *skipping zero* only lines. Moreover, **rtla timerlat
40 *1ms* period is also passed to the *timerlat* tracer. Auto-analysis is disabled
43 [root@alien ~]# timerlat hist -d 10m -c 0-4 -P d:100us:1ms -p 1000 --no-aa
46 # Duration: 0 00:10:00
47 …Index IRQ-000 Thr-000 IRQ-001 Thr-001 IRQ-002 Thr-002 IRQ-003 Thr-003 IRQ-004 …
[all …]
|
| /Documentation/hwmon/ |
| D | k10temp.rst | 6 * AMD Family 10h processors:
8 Socket F: Quad-Core/Six-Core/Embedded Opteron (but see below)
10 Socket AM2+: Quad-Core Opteron, Phenom (II) X3/X4, Athlon X2 (but see below)
12 Socket AM3: Quad-Core Opteron, Athlon/Phenom II X2/X3/X4, Sempron II
16 * AMD Family 11h processors:
20 * AMD Family 12h processors: "Llano" (E2/A4/A6/A8-Series)
22 * AMD Family 14h processors: "Brazos" (C/E/G/Z-Series)
24 * AMD Family 15h processors: "Bulldozer" (FX-Series), "Trinity", "Kaveri",
41 BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors:
45 BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors:
[all …]
|
| D | w83795.rst | 10 Addresses scanned: I2C 0x2c - 0x2f
18 Addresses scanned: I2C 0x2c - 0x2f
23 - Wei Song (Nuvoton)
24 - Jean Delvare <jdelvare@suse.de>
28 -----------
35 - W83795G
40 13 VSEN1 (VCORE1) 10h in0
41 14 VSEN2 (VCORE2) 11h in1
59 9/ 10 VDSEN16/TR3/TD3 23h in19/temp3
60 11/ 12 VDSEN17/TR4/TD4 24h in20/temp4
[all …]
|
| /Documentation/core-api/ |
| D | packing.rst | 6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
[all …]
|
| /Documentation/devicetree/bindings/media/i2c/ |
| D | tda1997x.txt | 1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
[all …]
|
| /Documentation/devicetree/bindings/net/ |
| D | fsl,fman-dtsec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Madalin Bucur <madalin.bucur@nxp.com>
15 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller
16 (10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate
22 - fsl,fman-dtsec
23 - fsl,fman-xgec
24 - fsl,fman-memac
[all …]
|
| /Documentation/devicetree/bindings/phy/ |
| D | ti,phy-j721e-wiz.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 - ti,j721e-wiz-16g
17 - ti,j721e-wiz-10g
18 - ti,j721s2-wiz-10g
19 - ti,am64-wiz-10g
[all …]
|
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | brcm,bcm2835-armctrl-ic.txt | 1 BCM2835 Top-Level ("ARMCTRL") Interrupt Controller
3 The BCM2835 contains a custom top-level interrupt controller, which supports
4 72 interrupt sources using a 2-level register scheme. The interrupt
9 interrupts, but the per-CPU interrupt controller is the root, and an
14 - compatible : should be "brcm,bcm2835-armctrl-ic" or
15 "brcm,bcm2836-armctrl-ic"
16 - reg : Specifies base physical address and size of the registers.
17 - interrupt-controller : Identifies the node as an interrupt controller
18 - #interrupt-cells : Specifies the number of cells needed to encode an
28 Additional required properties for brcm,bcm2836-armctrl-ic:
[all …]
|
12345678910>>...19
![[all …]](/android16-6.12-lts/more/Documentation/userspace-api/media/v4l/crop.svg?full=10%5C-11){kind=link}