Home
last modified time | relevance | path

Searched +full:11 +full:a (Results 1 – 25 of 617) sorted by relevance

12345678910>>...25

/Documentation/ABI/testing/
Dsysfs-class-rapidio10 NOTE: An mport ID is not a RapidIO destination ID assigned to a
36 only fabric enumerating mports have a valid destination ID
39 After enumeration or discovery was performed for a given mport device,
48 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
49 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
50 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0007
51 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0002
52 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0003
53 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0005
54 lrwxrwxrwx 1 root root 0 Feb 11 15:11 device -> ../../../0000:01:00.0
[all …]
Dsecurityfs-secrets-coco15 secret appears as a file under <securityfs>/secrets/coco,
23 removes the entry from the filesystem. A secret cannot be read
30 -r--r----- 1 root root 0 Jun 28 11:54 736870e5-84f0-4973-92ec-06879ce3da0b
31 -r--r----- 1 root root 0 Jun 28 11:54 83c83f7f-1356-4975-8b7e-d3a0b54312c6
32 -r--r----- 1 root root 0 Jun 28 11:54 9553f55d-3da2-43ee-ab5d-ff17f78864d2
33 -r--r----- 1 root root 0 Jun 28 11:54 e6f5a162-d67f-4750-a67c-5d065f2a9910
35 Reading the secret data by reading a file::
40 Wiping a secret by unlinking a file::
44 -r--r----- 1 root root 0 Jun 28 11:54 736870e5-84f0-4973-92ec-06879ce3da0b
45 -r--r----- 1 root root 0 Jun 28 11:54 83c83f7f-1356-4975-8b7e-d3a0b54312c6
[all …]
Dsysfs-class-switchtec7 KernelVersion: v4.11
10 Each registered switchtec driver is represented by a switchtecX
16 KernelVersion: v4.11
25 KernelVersion: v4.11
33 KernelVersion: v4.11
42 KernelVersion: v4.11
50 KernelVersion: v4.11
58 KernelVersion: v4.11
66 KernelVersion: v4.11
74 KernelVersion: v4.11
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dtda1997x.txt6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
17 - YUV444 12bit per color (36 bits total): Y[11:0] Cb[11:0] Cr[11:0]
[all …]
/Documentation/security/secrets/
Dcoco.rst28 The guest firmware may reserve a designated memory area for secret injection,
30 under a ``LINUX_EFI_COCO_SECRET_AREA_GUID`` entry
35 During the VM's launch, the virtual machine manager may inject a secret to that
38 Guest Owner secret data should be a GUIDed table of secret values; the binary
55 Consider a guest performing computations on encrypted files. The Guest Owner
64 Host can't read the decrypted content from memory because it's a
67 Here is a simple example for usage of the efi_secret module in a guest
72 drwxr-xr-x 2 root root 0 Jun 28 11:54 .
73 drwxr-xr-x 3 root root 0 Jun 28 11:54 ..
74 -r--r----- 1 root root 0 Jun 28 11:54 736870e5-84f0-4973-92ec-06879ce3da0b
[all …]
/Documentation/devicetree/bindings/pci/
Dintel,ixp4xx-pci.yaml88 <0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */
92 <0x1000 0 0 1 &gpio0 10 3>, /* INT A on slot 2 is irq 10 */
95 <0x1000 0 0 4 &gpio0 11 3>, /* INT D on slot 2 is irq 11 */
96 <0x1800 0 0 1 &gpio0 9 3>, /* INT A on slot 3 is irq 9 */
98 <0x1800 0 0 3 &gpio0 11 3>, /* INT C on slot 3 is irq 11 */
Dv3-v360epc-pci.txt12 - interrupts: should contain a reference to the V3 error interrupt
22 be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB,
27 - syscon: should contain a link to the syscon device node, since
56 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
61 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
65 /* IDSEL 11 */
66 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
67 0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */
68 0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */
69 0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */
[all …]
/Documentation/hwmon/
Dmax16065.rst55 accurately monitor (+/-2.5%) one current channel using a dedicated high-side
67 one current channel using a dedicated high-side current-sense amplifier. The
86 any of the i2ctools commands on a command register (0xa5 to 0xac). The chips
87 supported by this driver interpret any access to a command register (including
90 turn into a brick.
97 in[0-11]_input Input voltage measurements.
103 in[0-11]_min Low warning limit.
107 in[0-11]_max High warning limit.
114 in[0-11]_lcrit Low critical limit.
116 in[0-11]_crit High critical limit.
[all …]
Dk10temp.rst16 * AMD Family 11h processors:
45 BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors:
61 Revision Guide for AMD Family 11h Processors:
73 AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks:
91 Family 10h/11h/12h/14h/15h/16h processors.
93 All these processors have a sensor, but on those for Socket F or AM2+,
104 available as temp1_input in sysfs. It is measured in degrees Celsius with a
105 resolution of 1/8th degree. Please note that it is defined as a relative
109 control cooling systems. Tctl is a non-physical temperature on an
122 On some AMD CPUs, there is a difference between the die temperature (Tdie) and
Dmax31785.rst19 The Maxim MAX31785 is a PMBus device providing closed-loop, multi-channel fan
61 temp[1-11]_crit Critical high temperature
62 temp[1-11]_crit_alarm Chip temperature critical high alarm
63 temp[1-11]_input Measured temperature
64 temp[1-11]_max Maximum temperature
65 temp[1-11]_max_alarm Chip temperature high alarm
/Documentation/driver-api/media/
Dtx-rx.rst9 these devices include a camera sensor, a TV tuner and a parallel, a BT.656 or a
20 CSI-2 is a data bus intended for transferring images from cameras to
94 LP-11 and LP-111 states
97 As part of transitioning to high speed mode, a CSI-2 transmitter typically
98 briefly sets the bus to LP-11 or LP-111 state, depending on the PHY. This period
104 involvement in observing LP-11 or LP-111 state. 100 µs is a brief period to hit
108 One way to address this is to configure the transmitter side explicitly to LP-11
113 The ``.pre_streamon()`` callback may be used to prepare a transmitter for
120 the transmitter to the LP-11 or LP-111 state. This also requires powering on the
123 Receiver drivers that do not need explicit LP-11 or LP-111 state setup are
[all …]
/Documentation/core-api/
Dpacking.rst10 One can memory-map a pointer to a carefully crafted struct over the hardware
20 A more robust alternative to struct field definitions would be to extract the
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
47 The following examples cover the memory layout of a packed u64 field.
57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
73 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
77 inverts bit offsets inside a byte.
86 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
[all …]
/Documentation/tools/rtla/
Drtla-timerlat-top.rst19 The **rtla timerlat top** displays a summary of the periodic output
46 automatic trace mode, instructing the tracer to stop if a *40 us* latency or
49 # timerlat -a 40 -c 1-23 -q
56 4 #12322 | 1 0 1 17 | 10 2 11 33
58 6 #12322 | 1 0 1 14 | 16 3 11 35
63 11 #12322 | 0 0 0 15 | 6 2 7 29
67 15 #12321 | 1 0 1 15 | 12 3 11 27
69 17 #12319 | 0 0 1 13 | 11 3 9 25
74 22 #12319 | 0 0 1 11 | 8 3 10 22
75 23 #12320 | 28 0 1 28 | 41 3 11 41
[all …]
/Documentation/ABI/stable/
Dsysfs-devices-system-cpu8 This value is not a global default: it is a way to set
17 a CPU.
20 If a process ever sets the DSCR (via direct access to the
24 If set by a process it will be inherited by child processes.
28 Description: physical package id of cpuX. Typically corresponds to a physical
70 The format is like 0-3, 8-11, 14,17.
81 The format is like 0-3, 8-11, 14,17.
95 The format is like 0-3, 8-11, 14,17.
104 The format is like 0-3, 8-11, 14,17.
115 The format is like 0-3, 8-11, 14,17. it's only used on s390.
[all …]
Dsysfs-class-tpm5 Description: The device/ directory under a specific TPM instance exposes
13 Description: The "active" property prints a '1' if the TPM chip is accepting
16 visible to the OS, but will only accept a restricted set of
41 Manufacturer is a hex dump of the 4 byte manufacturer info
42 space in a TPM. TCG version shows the TCG TPM spec level that
51 used to wait for a short, medium and long TPM command. All
54 any longer than necessary before starting to poll for a
64 Durations can be modified in the case where a buggy chip
73 Description: The "enabled" property prints a '1' if the TPM chip is enabled,
75 may be visible but produce a '0' after some operation that
[all …]
/Documentation/devicetree/bindings/sound/
Dcs35l32.txt15 - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
28 Determines the data packed in a two-CS35L32 configuration.
29 0 = Left/right channels VMON[11:0], IMON[11:0], VPMON[7:0].
30 1 = Left/right channels VMON[11:0], IMON[11:0], STATUS.
/Documentation/userspace-api/media/v4l/
Dpixfmt-sdr-pcu20be.rst14 This format contains a sequence of complex number samples. Each complex
16 and Q are represented as a 20 bit unsigned big endian number stored in
37 - I'\ :sub:`0[11:4]`
42 - I'\ :sub:`1[11:4]`
48 - Q'\ :sub:`0[11:4]`
53 - Q'\ :sub:`1[11:4]`
Dpixfmt-yuv-planar.rst19 Within a plane, components are stored in pixel order, which may be linear or
244 - Y'\ :sub:`11`
265 - Cb\ :sub:`11`
266 - Cr\ :sub:`11`
279 - Y'\ :sub:`11`
301 - Cb\ :sub:`11`
302 - Cr\ :sub:`11`
325 The line stride and image height must be aligned to a multiple of 16.
331 The line stride must be a multiple of 128 pixels to ensure an
332 integer number of Z shapes. The image height must be a multiple of 32 pixels.
[all …]
Dpixfmt-m420.rst16 M420 is a YUV format with ½ horizontal and vertical chroma subsampling
24 Y'\ :sub:`10`, Y'\ :sub:`11`.
44 - Y'\ :sub:`11`
65 - Cb\ :sub:`11`
66 - Cr\ :sub:`11`
Dpixfmt-y12i.rst9 Interleaved grey-scale image, e.g. from a stereo-pair
15 This is a grey-scale image with a depth of 12 bits per pixel, but with
17 in a 24-bit word in the little-endian order. On a little-endian machine
27 pixels cross the byte boundary and have a ratio of 3 bytes for each
35 - Y'\ :sub:`0right[3:0]`\ Y'\ :sub:`0left[11:8]`
36 - Y'\ :sub:`0right[11:4]`
/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.yaml17 A hart context is a privilege mode in a hardware execution thread. For example,
22 a pending enabled interrupt and then release it once it has been handled.
24 Each interrupt has a configurable priority. Higher priority interrupts are
25 serviced first. Each context can specify a priority threshold. Interrupts
36 RZ/Five SoC (AX45MP AndesCore with a NCEPLIC100) and the T-HEAD C900 PLIC.
38 While the RISC-V ISA doesn't specify a memory layout for the PLIC, the
39 "sifive,plic-1.0.0" device is a concrete implementation of the PLIC that
40 contains a specific memory layout, which is documented in chapter 8 of the
44 T-HEAD PLIC implementation requires setting a delegation bit to allow access
95 that a context is not present. Each node pointed to should be a
[all …]
Driscv,aplic.yaml15 in a RISC-V platform. The RISC-V AIA specification can be found at
19 interrupt sources connect to the root APLIC domain and a parent APLIC
45 Given APLIC domain directly injects external interrupts to a set of
46 RISC-V HARTS (or CPUs). Each node pointed to should be a riscv,cpu-intc
47 node, which has a CPU node (i.e. RISC-V HART) as parent.
51 Given APLIC domain forwards wired interrupts as MSIs to a AIA incoming
72 A list of child APLIC domains for the given APLIC domain. Each child
73 APLIC domain is assigned a child index in increasing order, with the
76 domain to a particular child APLIC domain.
88 A interrupt delegation list where each entry is a triple consisting
[all …]
/Documentation/pcmcia/
Ddriver-changes.rst29 ranges. After a call to pcmcia_request_window(), the regions found there
36 ranges. After a call to pcmcia_request_io(), the ports found there
41 dev_info_t and a few other typedefs are removed. No longer use them
46 There is no more need to fill out a "dev_node_t" structure.
64 pcmcia_parse_tuple(), a driver shall use "pcmcia_get_tuple()" if it is
67 a new helper "pcmcia_get_mac_from_cis()" was added.
70 By calling pcmcia_loop_config(), a driver can iterate over all available
71 configuration options. During a driver's probe() phase, one doesn't need
106 * Device model integration (as of 2.6.11)
107 A struct pcmcia_device is registered with the device model core,
[all …]
/Documentation/devicetree/bindings/pinctrl/
Dfsl,vf610-pinctrl.txt8 - fsl,pins: two integers array, represents a group of pins mux and config
10 a pin working on a specific function, CONFIG is the pad setting value
18 PAD_CTL_SRE_FAST (1 << 11)
19 PAD_CTL_SRE_SLOW (0 << 11)
Dnuvoton,ma35d1-pinctrl.yaml38 "^gpio@[0-9a-f]+$":
82 A pinctrl node should contain at least one subnodes representing the
170 nuvoton,pins = <11 0 2>,
171 <11 1 2>,
172 <11 2 2>,
173 <11 3 2>;

12345678910>>...25