Home
last modified time | relevance | path

Searched +full:1 +full:v (Results 1 – 25 of 677) sorted by relevance

12345678910>>...28

/Documentation/hwmon/
Ddme1737.rst64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and
65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement
66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and
69 For the DME1737, A8000 and SCH5027, fan[1-2] and pwm[1-2] are always present.
74 For the SCH311x and SCH5127, fan[1-3] and pwm[1-3] are always present and
94 in0: +5VTR (+5V standby) 0V - 6.64V
95 in1: Vccp (processor core) 0V - 3V
96 in2: VCC (internal +3.3V) 0V - 4.38V
97 in3: +5V 0V - 6.64V
98 in4: +12V 0V - 16V
[all …]
Dmc13783-adc.rst47 0 Battery Voltage (BATT) 2.50 - 4.65V -2.40V
48 1 Battery Current (BATT - BATTISNS) -50 - 50 mV x20
49 2 Application Supply (BP) 2.50 - 4.65V -2.40V
50 3 Charger Voltage (CHRGRAW) 0 - 10V / /5
51 0 - 20V /10
52 4 Charger Current (CHRGISNSP-CHRGISNSN) -0.25 - 0.25V x4
53 5 General Purpose ADIN5 / Battery Pack Thermistor 0 - 2.30V No
54 6 General Purpose ADIN6 / Backup Voltage (LICELL) 0 - 2.30V / No /
55 1.50 - 3.50V -1.20V
56 7 General Purpose ADIN7 / UID / Die Temperature 0 - 2.30V / No /
[all …]
Dltc4245.rst35 on I2C bus #1::
38 $ echo ltc4245 0x23 > /sys/bus/i2c/devices/i2c-1/new_device
52 in1_input 12v input voltage (mV)
53 in2_input 5v input voltage (mV)
54 in3_input 3v input voltage (mV)
55 in4_input Vee (-12v) input voltage (mV)
57 in1_min_alarm 12v input undervoltage alarm
58 in2_min_alarm 5v input undervoltage alarm
59 in3_min_alarm 3v input undervoltage alarm
60 in4_min_alarm Vee (-12v) input undervoltage alarm
[all …]
Dsmsc47m192.rst43 of the temperatures is 1 bit per degree C.
46 each voltage channel is 0V ... 255/192*(nominal voltage), the resolution
47 is 1 bit per (nominal voltage)/192.
51 The +12V analog voltage input channel (in4_input) is multiplexed with
53 a +12V voltage measurement or a 5 bit CPU VID, but not both.
54 The default setting is to use the pin as 12V input, and use only 4 bit VID.
67 in0_input +2.5V voltage input
68 in1_input CPU voltage input (nominal 2.25V)
69 in2_input +3.3V voltage input
70 in3_input +5V voltage input
[all …]
Df71805f.rst68 range is thus from 0 to 2.040 V. Voltage values outside of this range
70 the chip's own power source (+3.3V), and is divided internally by a
83 in0 VCC VCC3.3V int. int. 2.00 1.65 V
84 in1 VIN1 VTT1.2V 10K - 1.00 1.20 V
85 in2 VIN2 VRAM 100K 100K 2.00 ~1.25 V [1]_
86 in3 VIN3 VCHIPSET 47K 100K 1.47 2.24 V [2]_
87 in4 VIN4 VCC5V 200K 47K 5.25 0.95 V
88 in5 VIN5 +12V 200K 20K 11.00 1.05 V
89 in6 VIN6 VCC1.5V 10K - 1.00 1.50 V
90 in7 VIN7 VCORE 10K - 1.00 ~1.40 V [1]_
[all …]
Dcorsair-psu.rst42 temperature sensors, 1 fan rpm sensor, 4 sensors for volt levels, 4 sensors for
51 curr2_input Current on the 12v psu rail
52 curr2_crit Current max critical value on the 12v psu rail
53 curr3_input Current on the 5v psu rail
54 curr3_crit Current max critical value on the 5v psu rail
55 curr4_input Current on the 3.3v psu rail
56 curr4_crit Current max critical value on the 3.3v psu rail
59 in1_input Voltage of the 12v psu rail
60 in1_crit Voltage max critical value on the 12v psu rail
61 in1_lcrit Voltage min critical value on the 12v psu rail
[all …]
/Documentation/devicetree/bindings/iio/dac/
Dadi,ltc2664.yaml14 Analog Devices LTC2664 4 channel, 12-/16-Bit, +-10V DAC
23 maxItems: 1
31 v-pos-supply:
34 v-neg-supply:
52 maxItems: 1
61 0 - MPS2=GND, MPS1=GND, MSP0=GND (+-10V, reset to 0V)
62 1 - MPS2=GND, MPS1=GND, MSP0=VCC (+-5V, reset to 0V)
63 2 - MPS2=GND, MPS1=VCC, MSP0=GND (+-2.5V, reset to 0V)
64 3 - MPS2=GND, MPS1=VCC, MSP0=VCC (0V to 10, reset to 0V)
65 4 - MPS2=VCC, MPS1=GND, MSP0=GND (0V to 10V, reset to 5V)
[all …]
Dadi,ad3552r.yaml30 maxItems: 1
36 maxItems: 1
41 maxItems: 1
46 internal reference will be used. External reference must be 2.5V
49 description: Vref I/O driven by internal vref to 2.5V. If not set, Vref pin
57 - 1: medium low SDO drive strength.
61 enum: [0, 1, 2, 3]
64 const: 1
70 "^channel@([0-1])$":
79 enum: [0, 1]
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dsamsung,s5k5baf.yaml7 title: Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor with embedded SoC ISP
17 maxItems: 1
20 maxItems: 1
31 maxItems: 1
35 maxItems: 1
39 description: Analog power supply 2.8V (2.6V to 3.0V)
42 description: I/O power supply 1.8V (1.65V to 1.95V) or 2.8V (2.5V to 3.1V)
46 Regulator input power supply 1.8V (1.7V to 1.9V) or 2.8V (2.6V to 3.0)
60 - const: 1
79 #address-cells = <1>;
[all …]
Dthine,thp7312.yaml30 maxItems: 1
33 maxItems: 1
39 maximum: 1
40 default: 1
43 0 is for the SPI/2-wire slave boot, 1 is for the SPI master boot (from
47 maxItems: 1
54 1.2V supply for core, PLL, MIPI rx and MIPI tx.
58 Supply for input (RX). 1.8V for MIPI, or 1.8/2.8/3.3V for parallel.
62 Supply for output (TX). 1.8V for MIPI, or 1.8/2.8/3.3V for parallel.
66 Supply for host interface. 1.8V, 2.8V, or 3.3V.
[all …]
/Documentation/virt/hyperv/
Doverview.rst6 enlightened guest on Microsoft's Hyper-V hypervisor. Hyper-V
10 partitions. In this documentation, references to Hyper-V usually
15 Hyper-V runs on x86/x64 and arm64 architectures, and Linux guests
16 are supported on both. The functionality and behavior of Hyper-V is
19 Linux Guest Communication with Hyper-V
21 Linux guests communicate with Hyper-V in four different ways:
24 some guest actions trap to Hyper-V. Hyper-V emulates the action and
29 Hyper-V, passing parameters. Hyper-V performs the requested action
32 Hyper-V. On x86/x64, hypercalls use a Hyper-V specific calling
36 * Synthetic register access: Hyper-V implements a variety of
[all …]
Dclocks.rst8 On arm64, Hyper-V virtualizes the ARMv8 architectural system counter
12 architectural system counter is functional in guest VMs on Hyper-V.
13 While Hyper-V also provides a synthetic system clock and four synthetic
15 Linux kernel in a Hyper-V guest on arm64. However, older versions
16 of Hyper-V for arm64 only partially virtualize the ARMv8
19 Linux kernel versions on these older Hyper-V versions requires an
20 out-of-tree patch to use the Hyper-V synthetic clocks/timers instead.
24 On x86/x64, Hyper-V provides guest VMs with a synthetic system clock
25 and four synthetic per-CPU timers as described in the TLFS. Hyper-V
29 Hyper-V performs TSC calibration, and provides the TSC frequency
[all …]
/Documentation/userspace-api/media/v4l/
Dpixfmt-packed-hsv.rst14 The *saturation* (s) and the *value* (v) are measured in percentage of the
39 - :cspan:`7` Byte 1
51 - 1
60 - 1
69 - 1
78 - 1
100 - h\ :sub:`1`
109 - s\ :sub:`1`
112 - v\ :sub:`7`
113 - v\ :sub:`6`
[all …]
Dsubdev-formats.rst17 :widths: 1 1 2
124 :widths: 3 1 4
184 1 and 2.
196 1, an endianness value stating if the pixel is transferred MSB first
264 - 1
266 * .. _MEDIA-BUS-FMT-RGB444-1X12:
293 - r\ :sub:`1`
297 - g\ :sub:`1`
301 - b\ :sub:`1`
338 - r\ :sub:`1`
[all …]
/Documentation/devicetree/bindings/sound/
Dcs35l32.txt8 of the AD0 pin. Level 0 is 0x40 while Level 1 is 0x41.
21 1 = Automatically managed irrespective of audio, adapting for low-power
25 3 = Boost voltage fixed at 5 V.
30 1 = Left/right channels VMON[11:0], IMON[11:0], STATUS.
37 1 = Two IC's.
40 0 = 3.1V
41 1 = 3.2V
42 2 = 3.3V (Default)
43 3 = 3.4V
46 0 = 3.1V
[all …]
Dti,ts3a227e.yaml28 maxItems: 1
34 - 0 # 2.1 V
35 - 1 # 2.2 V
36 - 2 # 2.3 V
37 - 3 # 2.4 V
38 - 4 # 2.5 V
39 - 5 # 2.6 V
40 - 6 # 2.7 V
41 - 7 # 2.8 V
42 default: 1
[all …]
Dfsl,sgtl5000.yaml20 maxItems: 1
51 values from 1.25V to 3V by 250mV steps. If this node is not mentioned
52 or the value is unknown, then the value is set to 1.25V.
58 The LRCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
61 VDDIO 1.8V 2.5V 3.3V
63 1 = 1.66 mA 2.87 mA 4.02 mA
67 enum: [ 0, 1, 2, 3 ]
71 The SCLK pad strength. Possible values are: 0, 1, 2 and 3 as per the
74 VDDIO 1.8V 2.5V 3.3V
76 1 = 1.66 mA 2.87 mA 4.02 mA
[all …]
/Documentation/litmus-tests/atomic/
DAtomic-RMW-ops-are-atomic-WRT-atomic_set.litmus11 atomic_t v = ATOMIC_INIT(1);
14 P0(atomic_t *v)
16 (void)atomic_add_unless(v, 1, 0);
19 P1(atomic_t *v)
21 atomic_set(v, 0);
25 (v=2)
/Documentation/devicetree/bindings/regulator/
Dltc3589.txt1 Linear Technology LTC3589, LTC3589-1, and LTC3589-2 8-output regulators
4 - compatible: "lltc,ltc3589", "lltc,ltc3589-1" or "lltc,ltc3589-2"
21 0.3625 V to 0.75 V in 12.5 mV steps. The output voltage thus ranges between
22 0.3625 * (1 + R1/R2) V and 0.75 * (1 + R1/R2) V. Regulators bb-out and ldo1
23 have a fixed 0.8 V reference and thus output 0.8 * (1 + R1/R2) V. The ldo3
24 regulator is fixed to 1.8 V on LTC3589 and to 2.8 V on LTC3589-1,2. The ldo4
25 regulator can output between 1.8 V and 3.3 V on LTC3589 and between 1.2 V
26 and 3.2 V on LTC3589-1,2 in four steps. The ldo1 standby regulator can not
32 compatible = "lltc,ltc3589-1";
/Documentation/fb/
Dviafb.modes29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
33 geometry 480 640 480 640 32 timings 39722 72 24 19 1 48 3 endmode
43 # 2 chars 1 lines
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
54 geometry 640 480 640 480 32 timings 31747 120 16 16 1 64 3 endmode
64 # 7 chars 1 lines
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
75 geometry 640 480 640 480 32 timings 27777 80 56 25 1 56 3 endmode
85 # 5 chars 1 lines
[all …]
/Documentation/devicetree/bindings/display/bridge/
Dchipone,icn6211.yaml24 maxItems: 1
31 maxItems: 1
40 description: A 1.8V/2.5V/3.3V supply that power the MIPI RX.
43 description: A 1.8V/2.5V/3.3V supply that power the PLL.
46 description: A 1.8V/2.5V/3.3V supply that power the RGB output.
66 minItems: 1
68 - const: 1
73 port@1:
79 - port@1
94 #address-cells = <1>;
[all …]
Dlontium,lt8912b.yaml21 maxItems: 1
24 maxItems: 1
48 port@1:
56 - port@1
59 description: A 1.8V supply that powers the HDMI PLL.
62 description: A 1.8V supply that powers the HDMI TX part.
65 description: A 1.8V supply that powers the LVDS PLL.
68 description: A 1.8V supply that powers the LVDS TX part.
71 description: A 1.8V supply that powers the MIPI RX part.
74 description: A 1.8V supply that powers the SYSCLK.
[all …]
/Documentation/
Datomic_t.txt94 atomic_t v = ATOMIC_INIT(1);
97 P0(atomic_t *v)
99 (void)atomic_add_unless(v, 1, 0);
102 P1(atomic_t *v)
104 atomic_set(v, 0);
108 (v=2)
123 atomic_add_unless(v, 1, 0);
125 ret = READ_ONCE(v->counter); // == 1
126 atomic_set(v, 0);
127 if (ret != u) WRITE_ONCE(v->counter, 0);
[all …]
/Documentation/devicetree/bindings/mfd/
Dmaxim,max8998.yaml26 maxItems: 1
29 minItems: 1
40 maxItems: 1
46 enum: [0, 1, 2, 3]
54 enum: [0, 1]
108 "^(LDO([2-9]|1[0-7])|BUCK[1-4])$":
149 #address-cells = <1>;
171 regulator-name = "VALIVE_1.2V";
178 regulator-name = "VUSB+MIPI_1.1V";
185 regulator-name = "VADC_3.3V";
[all …]
/Documentation/devicetree/bindings/mmc/
Dnvidia,tegra20-sdhci.yaml43 maxItems: 1
46 maxItems: 1
53 minItems: 1
57 minItems: 1
70 maxItems: 1
83 maxItems: 1
112 nvidia,pad-autocal-pull-down-offset-1v8:
113 description: Specify drive strength calibration offsets for 1.8 V
117 nvidia,pad-autocal-pull-down-offset-1v8-timeout:
119 automatic calibration times out on a 1.8 V signaling mode.
[all …]

12345678910>>...28