Searched +full:1 +full:v2 (Results 1 – 25 of 336) sorted by relevance
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| /Documentation/arch/powerpc/ |
| D | isa-versions.rst | 12 Power10 Power ISA v3.1
14 Power8 Power ISA v2.07
15 e6500 Power ISA v2.06 with some exceptions
16 e5500 Power ISA v2.06 with some exceptions, no Altivec
17 Power7 Power ISA v2.06
18 Power6 Power ISA v2.05
19 PA6T Power ISA v2.04
20 Cell PPU - Power ISA v2.02 with some minor exceptions
22 Power5++ Power ISA v2.04 (no VMX)
23 Power5+ Power ISA v2.03
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,saw2.yaml | 31 - qcom,sdm660-gold-saw2-v4.1-l2
32 - qcom,sdm660-silver-saw2-v4.1-l2
33 - qcom,msm8998-gold-saw2-v4.1-l2
34 - qcom,msm8998-silver-saw2-v4.1-l2
38 - qcom,msm8226-saw2-v2.1-cpu
39 - qcom,msm8226-saw2-v2.1-l2
41 - qcom,msm8974-saw2-v2.1-cpu
42 - qcom,msm8974-saw2-v2.1-l2
43 - qcom,msm8976-gold-saw2-v2.3-l2
44 - qcom,msm8976-silver-saw2-v2.3-l2
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| /Documentation/devicetree/bindings/hwmon/ |
| D | ltc2990.txt | 13 0: V1, V2, TR2
14 1: V1-V2, TR2
15 2: V1-V2, V3, V4
19 6: V1-V2, V3-V4
20 7: V1, V2, V3, V4
26 1: TR1, V1 or V1-V2 only per mode
35 lltc,meas-mode = <7 3>; /* V1, V2, V3, V4 */
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| /Documentation/devicetree/bindings/opp/ |
| D | opp-v2.yaml | 4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2
24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states
28 #address-cells = <1>;
39 operating-points-v2 = <&cpu0_opp_table0>;
42 cpu@1 {
45 reg = <1>;
50 operating-points-v2 = <&cpu0_opp_table0>;
55 compatible = "operating-points-v2";
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| D | opp-v2-qcom-level.yaml | 4 $id: http://devicetree.org/schemas/opp/opp-v2-qcom-level.yaml#
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2-qcom-level
34 minItems: 1
49 compatible = "operating-points-v2-qcom-level";
52 opp-level = <1>;
53 qcom,opp-fuse-level = <1>;
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| D | opp-v2-kryo-cpu.yaml | 4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
13 - $ref: opp-v2-base.yaml#
25 operating-points-v2 table when it is parsed by the OPP framework.
30 - operating-points-v2-krait-cpu
31 - operating-points-v2-kryo-cpu
59 1: MSM8996, speedbin 1
67 5: MSM8996SG, speedbin 1
73 1: IPQ8064/IPQ8066/IPQ8068
123 operating-points-v2 = <&cluster0_opp>;
135 CPU1: cpu@1 {
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| /Documentation/userspace-api/gpio/ |
| D | chardev.rst | 7 This is latest version (v2) of the character device API, as defined in
28 The API is based around two major objects, the :ref:`gpio-v2-chip` and the
29 :ref:`gpio-v2-line-request`.
31 .. _gpio-v2-chip:
41 ``offset`` in the range from 0 to ``chip.lines - 1``, i.e. `[0,chip.lines)`.
43 Lines are requested from the chip using gpio-v2-get-line-ioctl.rst
58 Get Line <gpio-v2-get-line-ioctl>
60 Get Line Info <gpio-v2-get-lineinfo-ioctl>
61 Watch Line Info <gpio-v2-get-lineinfo-watch-ioctl>
63 Read Line Info Changed Events <gpio-v2-lineinfo-changed-read>
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| /Documentation/devicetree/bindings/dma/ |
| D | marvell,xor-v2.yaml | 4 $id: http://devicetree.org/schemas/dma/marvell,xor-v2.yaml#
7 title: Marvell XOR v2 engines
15 - const: marvell,xor-v2
19 - const: marvell,xor-v2
27 minItems: 1
31 minItems: 1
40 maxItems: 1
55 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
57 clocks = <&ap_clk 0>, <&ap_clk 1>;
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| /Documentation/devicetree/bindings/iommu/ |
| D | arm,smmu.yaml | 15 Management Unit Architecture, which can be used to provide 1 or 2 stages
26 - description: Qcom SoCs implementing "arm,smmu-v2"
29 - qcom,msm8996-smmu-v2
30 - qcom,msm8998-smmu-v2
31 - qcom,sdm630-smmu-v2
32 - qcom,sm6375-smmu-v2
33 - const: qcom,smmu-v2
116 - description: Qcom Adreno GPUs implementing "arm,smmu-v2"
119 - qcom,msm8996-smmu-v2
120 - qcom,sc7180-smmu-v2
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| /Documentation/ABI/stable/ |
| D | sysfs-class-rfkill | 10 KernelVersion: v2.6.22
19 KernelVersion v2.6.22
27 KernelVersion v2.6.22
35 KernelVersion v2.6.22
42 - 1: true
47 KernelVersion v2.6.22
61 1: RFKILL_STATE_UNBLOCKED
70 KernelVersion v2.6.34
77 1: active
84 KernelVersion v2.6.34
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| /Documentation/devicetree/bindings/cpufreq/ |
| D | qcom-cpufreq-nvmem.yaml | 51 - operating-points-v2-krait-cpu
52 - operating-points-v2-kryo-cpu
54 $ref: /schemas/opp/opp-v2-kryo-cpu.yaml#
59 const: operating-points-v2-qcom-level
61 $ref: /schemas/opp/opp-v2-qcom-level.yaml#
84 maxItems: 1
99 const: operating-points-v2-kryo-cpu
117 #address-cells = <1>;
129 operating-points-v2 = <&cpu_opp_table>;
143 operating-points-v2 = <&cpu_opp_table>;
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| D | nvidia,tegra20-cpufreq.txt | 7 - operating-points-v2: See ../bindings/opp/opp-v2.yaml for details.
10 For each opp entry in 'operating-points-v2' table:
13 1. CPU process ID mask
17 1. CPU process ID mask
36 compatible = "operating-points-v2";
52 operating-points-v2 = <&cpu0_opp_table>;
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| D | cpufreq-mediatek.txt | 13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml
34 Example 1 (MT7623 SoC):
37 compatible = "operating-points-v2";
73 operating-points-v2 = <&cpu_opp_table>;
76 cpu@1 {
80 operating-points-v2 = <&cpu_opp_table>;
86 operating-points-v2 = <&cpu_opp_table>;
92 operating-points-v2 = <&cpu_opp_table>;
97 compatible = "operating-points-v2";
142 compatible = "operating-points-v2";
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| /Documentation/devicetree/bindings/net/ |
| D | brcm,asp-v2.0.yaml | 4 $id: http://devicetree.org/schemas/net/brcm,asp-v2.0.yaml#
21 - const: brcm,asp-v2.2
25 - const: brcm,asp-v2.1
29 - const: brcm,asp-v2.0
32 const: 1
34 const: 1
37 maxItems: 1
42 minItems: 1
46 - description: Port 1 Wake-on-LAN
49 maxItems: 1
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| D | brcm,unimac-mdio.yaml | 21 - brcm,genet-mdio-v2
25 - brcm,asp-v2.0-mdio
26 - brcm,asp-v2.1-mdio
27 - brcm,asp-v2.2-mdio
32 minItems: 1
38 minItems: 1
82 #address-cells = <1>;
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| /Documentation/devicetree/bindings/power/ |
| D | qcom,kpss-acc-v2.yaml | 4 $id: http://devicetree.org/schemas/power/qcom,kpss-acc-v2.yaml#
7 title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v2
16 with the CPU accessing the region. ACC v2 is currently used as a
21 const: qcom,kpss-acc-v2
27 minItems: 1
38 compatible = "qcom,kpss-acc-v2";
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| D | qcom,rpmpd.yaml | 68 const: 1
70 operating-points-v2: true
78 - operating-points-v2
85 // Example 1 (rpmh power domain controller and OPP table):
91 #power-domain-cells = <1>;
92 operating-points-v2 = <&rpmhpd_opp_table>;
95 compatible = "operating-points-v2";
145 #power-domain-cells = <1>;
146 operating-points-v2 = <&rpmpd_opp_table>;
149 compatible = "operating-points-v2";
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| /Documentation/devicetree/bindings/spi/ |
| D | qcom,spi-qup.yaml | 28 - qcom,spi-qup-v2.1.1 # for 8974 and later
29 - qcom,spi-qup-v2.2.1 # for 8974 v2 and later
48 maxItems: 1
51 maxItems: 1
53 operating-points-v2: true
56 maxItems: 1
59 maxItems: 1
78 compatible = "qcom,spi-qup-v2.2.1";
86 pinctrl-1 = <&blsp1_spi1_sleep>;
90 operating-points-v2 = <&spi_opp_table>;
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| /Documentation/devicetree/bindings/pwm/ |
| D | pwm-amlogic.yaml | 38 - amlogic,meson8-pwm-v2
46 - amlogic,meson8b-pwm-v2
47 - amlogic,meson-gxbb-pwm-v2
48 - amlogic,meson-axg-pwm-v2
49 - amlogic,meson-g12-pwm-v2
50 - const: amlogic,meson8-pwm-v2
53 maxItems: 1
56 minItems: 1
60 minItems: 1
64 maxItems: 1
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| /Documentation/devicetree/bindings/ufs/ |
| D | ufs-common.yaml | 25 Preferred is operating-points-v2.
28 as the clocks property. If either this property or operating-points-v2 is
32 operating-points-v2:
44 maxItems: 1
48 enum: [1, 2]
70 vcc-supply-1p8:
94 operating-points-v2: [ clocks, clock-names ]
105 operating-points-v2: false
108 - operating-points-v2
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| /Documentation/networking/device_drivers/fddi/ |
| D | skfp.rst | 13 Readme File for skfp.o v2.06
18 (1) OVERVIEW
28 1. Overview
76 From v2.01 on, the driver is integrated in the linux kernel sources.
144 changed in SMT version v2.82. With this new SMT version, the yellow
150 With versions of SMT prior to v2.82 a ring up was indicated if the
162 v2.06 (20000511) (In-Kernel version)
169 v2.05 (20000217) (In-Kernel version)
174 v2.04 (20000207) (Standalone version)
179 v2.03 (20000111) (Standalone version)
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| /Documentation/ABI/testing/ |
| D | sysfs-block-loop | 3 KernelVersion: v2.6.37
6 (RO) Shows if the device is in autoclear mode or not ( "1" or
12 KernelVersion: v2.6.37
20 KernelVersion: v2.6.37
27 KernelVersion: v2.6.37
39 device or not ("1" or "0"). This can be requested individually
50 not ("1 or "0").
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| D | sysfs-bus-rapidio | 18 (with destID = 1)::
26 sysfs entry for itself, this is why an endpoint with destID=1
34 KernelVersion: v2.6.15
42 KernelVersion: v2.6.15
50 KernelVersion: v2.6.15
58 KernelVersion: v2.6.15
66 KernelVersion: v2.6.15
75 KernelVersion: v2.6.15
84 KernelVersion: v2.6.3
93 KernelVersion: v2.6.39
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| /Documentation/devicetree/bindings/scsi/ |
| D | hisilicon-sas.txt | 8 (b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset
9 (c) "hisilicon,hip07-sas-v2" for v2 hw in hip07 chipset
32 Completion queue interrupts : each completion queue has 1
38 For v2 hw: Interrupts for phys, Sata, and completion queues;
46 Sata interrupts : Each phy on the controller has 1 Sata
49 Completion queue interrupts : each completion queue has 1
54 - hip06-sas-v2-quirk-amt : when set, indicates that the v2 controller has the
85 <336 1>,<337 1>,<338 1>,/* cq0-2 */
86 <339 1>,<340 1>,<341 1>,/* cq3-5 */
87 <342 1>,<343 1>,<344 1>,/* cq6-8 */
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| /Documentation/devicetree/bindings/i2c/ |
| D | qcom,i2c-qup.yaml | 21 - qcom,i2c-qup-v2.1.1 # for 8974 v1
22 - qcom,i2c-qup-v2.2.1 # for 8974 v2 and later
44 maxItems: 1
47 pinctrl-1: true
50 minItems: 1
56 maxItems: 1
73 compatible = "qcom,i2c-qup-v2.2.1";
84 pinctrl-1 = <&blsp1_i2c1_sleep>;
87 #address-cells = <1>;
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