Searched +full:1 +full:c00000 (Results 1 – 25 of 34) sorted by relevance
12
| /Documentation/devicetree/bindings/rng/ |
| D | xiphera,xip8001b-trng.yaml | 20 maxItems: 1
30 rng@43c00000 {
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| /Documentation/devicetree/bindings/mtd/ |
| D | ingenic,nand.yaml | 29 minItems: 1
47 maxItems: 1
51 maxItems: 1
68 #size-cells = <1>;
69 ranges = <1 0 0x1b000000 0x1000000>,
78 nand-controller@1 {
80 reg = <1 0 0x1000000>;
82 #address-cells = <1>;
96 nand@1 {
97 reg = <1>;
[all …]
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| /Documentation/devicetree/bindings/mfd/ |
| D | xylon,logicvc.yaml | 27 maxItems: 1
30 const: 1
33 const: 1
60 logicvc: logicvc@43c00000 {
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| D | syscon-common.yaml | 39 maxItems: 1
45 enum: [1, 2, 4, 8]
67 syscon: syscon@1c00000 {
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| /Documentation/devicetree/bindings/media/ |
| D | allwinner,sun50i-h6-vpu-g2.yaml | 21 maxItems: 1
24 maxItems: 1
37 maxItems: 1
40 maxItems: 1
59 video-codec-g2@1c00000 {
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| D | qcom,msm8996-venus.yaml | 26 maxItems: 1
57 maxItems: 1
64 maxItems: 1
82 maxItems: 1
89 maxItems: 1
112 video-codec@c00000 {
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| /Documentation/devicetree/bindings/bus/ |
| D | qcom,ssbi.yaml | 23 maxItems: 1
48 ssbi@c00000 {
59 #address-cells = <1>;
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| D | socionext,uniphier-system-bus.yaml | 28 maxItems: 1
37 const: 1
61 "^.*@[1-5],[1-9a-f][0-9a-f]+$":
82 system-bus@58c00000 {
86 #size-cells = <1>;
87 ranges = <1 0x00000000 0x42000000 0x02000000>,
90 ethernet@1,1f00000 {
92 reg = <1 0x01f00000 0x1000>;
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| /Documentation/devicetree/bindings/gpio/ |
| D | xylon,logicvc-gpio.yaml | 35 maxItems: 1
43 minItems: 1
56 logicvc: logicvc@43c00000 {
60 #address-cells = <1>;
61 #size-cells = <1>;
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| /Documentation/devicetree/bindings/mailbox/ |
| D | ti,secure-proxy.yaml | 28 const: 1
42 minItems: 1
51 minItems: 1
70 secure_proxy: mailbox@32c00000 {
72 #mbox-cells = <1>;
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| D | nvidia,tegra186-hsp.yaml | 75 maxItems: 1
78 minItems: 1
114 hsp_top0: hsp@3c00000 {
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | wkup_m3_rproc.txt | 35 l4_wkup: l4_wkup@44c00000 {
38 #address-cells = <1>;
39 #size-cells = <1>;
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| /Documentation/devicetree/bindings/display/ |
| D | arm,komeda.yaml | 27 maxItems: 1
30 maxItems: 1
36 maxItems: 1
40 const: 1
46 maxItems: 1
67 enum: [ 0, 1 ]
73 maxItems: 1
94 display@c00000 {
95 #address-cells = <1>;
102 iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
[all …]
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| /Documentation/devicetree/bindings/net/ |
| D | brcm,asp-v2.0.yaml | 25 - const: brcm,asp-v2.1
32 const: 1
34 const: 1
37 maxItems: 1
42 minItems: 1
46 - description: Port 1 Wake-on-LAN
49 maxItems: 1
55 const: 1
69 maxItems: 1
108 ethernet@9c00000 {
[all …]
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| /Documentation/devicetree/bindings/pci/ |
| D | qcom,pcie-sm8350.yaml | 68 maxItems: 1
90 pcie@1c00000 {
104 num-lanes = <1>;
138 #interrupt-cells = <1>;
140 interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
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| D | qcom,pcie-sm8150.yaml | 66 maxItems: 1
88 pcie@1c00000 {
102 num-lanes = <1>;
134 #interrupt-cells = <1>;
136 interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
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| D | qcom,pcie-sc8180x.yaml | 66 maxItems: 1
87 pcie@1c00000 {
148 #interrupt-cells = <1>;
150 interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
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| D | qcom,pcie-sa8775p.yaml | 62 maxItems: 1
89 pcie@1c00000 {
141 #interrupt-cells = <1>;
143 interrupt-map = <0 0 0 1 &intc GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
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| D | qcom,pcie-sm8250.yaml | 78 maxItems: 1
100 pcie@1c00000 {
115 num-lanes = <1>;
149 #interrupt-cells = <1>;
151 interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
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| D | qcom,pcie-sm8550.yaml | 72 minItems: 1
76 minItems: 1
97 pcie@1c00000 {
143 #interrupt-cells = <1>;
145 interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
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| D | qcom,pcie-sm8450.yaml | 54 - enum: [aggre0, aggre1] # Aggre NoC PCIe0/1 AXI clock
78 maxItems: 1
101 pcie@1c00000 {
116 num-lanes = <1>;
157 #interrupt-cells = <1>;
159 interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
|
| /Documentation/devicetree/bindings/sram/ |
| D | allwinner,sun4i-a10-system-control.yaml | 20 const: 1
23 const: 1
54 maxItems: 1
116 system-control@1c00000 {
119 #address-cells = <1>;
120 #size-cells = <1>;
126 #address-cells = <1>;
127 #size-cells = <1>;
142 #address-cells = <1>;
143 #size-cells = <1>;
|
| /Documentation/devicetree/bindings/clock/ |
| D | qcom,sc7280-lpasscorecc.yaml | 35 maxItems: 1
38 const: 1
41 const: 1
44 const: 1
107 maxItems: 1
127 maxItems: 1
142 #clock-cells = <1>;
143 #power-domain-cells = <1>;
144 #reset-cells = <1>;
152 lpass_hm: clock-controller@3c00000 {
[all …]
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| /Documentation/devicetree/bindings/display/samsung/ |
| D | samsung,fimd.yaml | 27 const: 1
49 | cs-setup+1 | : : :
52 | wr-setup+1 | | wr-hold+1 |
55 | wr-active+1|
71 default: 1
88 minItems: 1
109 maxItems: 1
112 maxItems: 1
138 1 - for CAMIF1 input,
169 fimd@11c00000 {
[all …]
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra186-mc.yaml | 59 const: 1
79 minItems: 1
110 maxItems: 1
150 description: 5 memory controller channels and 1 for stream-id registers
169 description: 17 memory controller channels and 1 for stream-id registers
200 description: 17 memory controller channels and 1 for stream-id registers
242 memory-controller@2c00000 {
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