Searched +full:1 +full:v8 (Results 1 – 17 of 17) sorted by relevance
| /Documentation/hwmon/ |
| D | lochnagar.rst | 31 power1_average_interval Power averaging time input valid from 1 to 1708mS 33 in1_input Measured voltage for 1V8 DSP (milliVolts) 34 in1_label "1V8 DSP" 35 curr2_input Measured current for 1V8 DSP (milliAmps) 36 curr2_label "1V8 DSP" 37 power2_average Measured average power for 1V8 DSP (microWatts) 38 power2_average_interval Power averaging time input valid from 1 to 1708mS 39 power2_label "1V8 DSP" 40 in2_input Measured voltage for 1V8 CDC (milliVolts) 41 in2_label "1V8 CDC" [all …]
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| /Documentation/devicetree/bindings/mmc/ |
| D | nvidia,tegra20-sdhci.yaml | 43 maxItems: 1 46 maxItems: 1 53 minItems: 1 57 minItems: 1 70 maxItems: 1 83 maxItems: 1 112 nvidia,pad-autocal-pull-down-offset-1v8: 117 nvidia,pad-autocal-pull-down-offset-1v8-timeout: 140 nvidia,pad-autocal-pull-up-offset-1v8: 145 nvidia,pad-autocal-pull-up-offset-1v8-timeout: [all …]
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| /Documentation/devicetree/bindings/regulator/ |
| D | fixed-regulator.yaml | 61 maxItems: 1 64 maxItems: 1 71 maxItems: 1 78 maxItems: 1 87 maxItems: 1 111 maxItems: 1 125 reg_1v8: regulator-1v8 { 127 regulator-name = "1v8"; 137 reg_1v8_clk: regulator-1v8-clk { 139 regulator-name = "1v8"; [all …]
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| D | as3722-regulator.txt | 34 controlling this rail. Valid values are 0, 1, 2 ad 3. 36 1: Rail is controlled by ENABLE1 input pin. 66 ams,ext-control = <1>; 84 regulator-name = "vdd-1v8";
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| D | regulator-max77620.txt | 22 in-ldo0-1-supply: Input supply for LDO0 and LDO1. 125 in-ldo0-1-supply = <&max77620_sd2>; 153 regulator-name = "vdd-1v8";
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| /Documentation/devicetree/bindings/arm/ |
| D | arm,coresight-cti.yaml | 31 are implementation defined, except when the CTI is connected to an ARM v8 34 In this case the ARM v8 architecture defines the required signal connections 35 between CTI and the CPU core and ETM if present. In the case of a v8 37 indicate this feature (arm,coresight-cti-v8-arch). 87 - const: arm,coresight-cti-v8-arch 92 maxItems: 1 99 maxItems: 1 114 arm,coresight-cti-v8-arch used. If the associated device has not been 125 const: 1 141 maxItems: 1 [all …]
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| D | cpus.yaml | 43 maxItems: 1 68 On ARM v8 64-bit systems this property is required 79 * If cpus node's #address-cells property is set to 1 213 # On ARM v8 64-bit this property is required 247 # Only valid on ARM 32-bit, see above for ARM v8 64-bit 271 maxItems: 1 302 maxItems: 1 401 #address-cells = <1>; 409 cpu@1 { 432 #address-cells = <1>; [all …]
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| /Documentation/devicetree/bindings/media/ |
| D | samsung,s5p-mfc.yaml | 25 - samsung,mfc-v8 # Exynos5800 34 maxItems: 1 37 minItems: 1 41 minItems: 1 45 maxItems: 1 48 minItems: 1 52 minItems: 1 58 maxItems: 1 61 minItems: 1 89 maxItems: 1 [all …]
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| /Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra186-pmc.yaml | 194 sdmmc1_1v8: sdmmc1-1v8 { 213 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8"; 215 pinctrl-1 = <&sdmmc1_1v8>;
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| /Documentation/devicetree/bindings/clock/ |
| D | silabs,si5341.txt | 5 [1] Si5341 Data Sheet 41 The first value is "0" for outputs, "1" for synthesizers. 70 - #address-cells: shall be set to 1. 87 1 = differential (defaults to LVDS levels) 112 #address-cells = <1>; 123 silabs,format = <1>; /* LVDS 3v3 */ 131 * LVDS 1v8 135 silabs,format = <1>; /* LVDS 1v8 */ 159 assigned-clocks = <&si5341 0 7>, <&si5341 1 3>; 160 assigned-clock-parents = <&si5341 1 3>; [all …]
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| /Documentation/devicetree/bindings/display/rockchip/ |
| D | rockchip,dw-hdmi.yaml | 38 avdd-1v8-supply: 74 maxItems: 1 85 minItems: 1 91 maxItems: 1 105 endpoint@1: 107 port@1: 113 - port@1 155 #address-cells = <1>; 160 #address-cells = <1>; 168 hdmi_in_vopl: endpoint@1 { [all …]
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| /Documentation/arch/arm64/ |
| D | sve.rst | 22 1. General 134 delivery. [1] 154 size and layout. Macros SVE_SIG_* are defined [1] to facilitate access to 164 extra space. Refer to [1] for further details about this mechanism. 434 vector length of the init process (PID 1). 478 A.1. Registers 491 * 1 VL-bit special-purpose predicate register FFR (the "first-fault register") 512 8VL-1 128 0 bit index 517 Z8 | : * V8 | 525 VL-1 0 +-------+ [all …]
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| /Documentation/devicetree/bindings/mfd/ |
| D | as3722.txt | 113 controlling this rail. Valid values are 0, 1, 2 ad 3. 115 1: Rail is controlled by ENABLE1 input pin. 189 ams,ext-control = <1>; 207 regulator-name = "vdd-1v8";
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-stm32-usbphyc.yaml | 19 |_ PHY port#1 _________________ HOST controller 21 | / 1|________________| 34 maxItems: 1 37 maxItems: 1 40 maxItems: 1 43 const: 1 49 description: regulator providing 1V1 power supply to the PLL block 52 description: regulator providing 1V8 power supply to the PLL block 59 minItems: 1 65 "^usb-phy@[0|1]$": [all …]
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| /Documentation/userspace-api/ |
| D | mseal.rst | 24 VM_FLAGS_PERMANENT flag [1] and on OpenBSD with the mimmutable syscall [2]. 180 The idea that inspired this patch comes from Stephen Röttger’s work in V8 185 - [1] https://github.com/apple-oss-distributions/xnu/blob/1031c584a5e37aff177559b9f69dbd3c8c3fd30a/… 188 - [4] https://docs.google.com/document/d/1O2jwK4dxI3nRcOJuPYkonhTkNQfbmwdvxQMyXgeaRHo/edit#heading=…
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| /Documentation/trace/coresight/ |
| D | coresight-ect.rst | 47 defined, unless the CPU/ETM combination is a v8 architecture, in which case 80 If this shows as enabled (1), but ``powered`` shows unpowered (0), then 123 0-1 155 >$ echo 0 1 > ./cti_sys0/channels/trigout_attach 158 Attaches trigout(1) to channel(0), then activates channel(0) generating a 159 set state on cti_sys0.trigout(1) 189 * ``chan_xtrigs_reset``: Write 1 to clear all channel / trigger programming. 193 The example below attaches input trigger index 1 to channel 2, and output 197 The settings mean that if either input trigger 1, or channel 2 go active then 205 .../cti_sys0/channels# echo 2 1 > trigin_attach [all …]
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| /Documentation/devicetree/bindings/cpu/ |
| D | idle-states.yaml | 15 1 - Introduction 87 Diagram 1: CPU idle state execution phases 167 0| 1 time(ms) 169 Graph 1: Energy vs time example 171 The graph is split in two parts delimited by time 1ms on the X-axis. 172 The graph curve with X-axis values = { x | 0 < x < 1ms } has a steep slope 175 The graph curve in the area delimited by X-axis values = {x | x > 1ms } has 238 a direct child of the cpus node [1] and provides a container where the 306 [1] ARM Linux Kernel documentation - CPUs bindings 335 On ARM v8 64-bit this property is required. [all …]
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