Searched +full:2 +full:- +full:wire (Results 1 – 25 of 124) sorted by relevance
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| /Documentation/w1/masters/ |
| D | omap-hdq.rst | 2 Kernel driver for omap HDQ/1-wire module
7 HDQ/1-wire controller on the TI OMAP 2430/3430 platforms.
15 The HDQ/1-Wire module of TI OMAP2430/3430 platforms implement the hardware
17 Semiconductor 1-Wire protocols. These protocols use a single wire for
18 communication between the master (HDQ/1-Wire controller) and the slave
19 (HDQ/1-Wire external compliant device).
21 A typical application of the HDQ/1-Wire module is the communication with battery
24 The controller supports operation in both HDQ and 1-wire mode. The essential
25 difference between the HDQ and 1-wire mode is how the slave device responds to
29 does not respond with a presence pulse as it does in the 1-Wire protocol.
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| /Documentation/devicetree/bindings/w1/ |
| D | w1-uart.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/w1/w1-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UART 1-Wire Bus
10 - Christoph Winklhofer <cj.winklhofer@gmail.com>
13 UART 1-wire bus. Utilizes the UART interface via the Serial Device Bus
14 to create the 1-Wire timing patterns.
16 The UART peripheral must support full-duplex and operate in open-drain
18 baud-rate and transmitted byte, which corresponds to a 1-Wire read bit,
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| D | amd,axi-1wire-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/w1/amd,axi-1wire-host.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AMD AXI 1-wire bus host for programmable logic
10 - Kris Chaplin <kris.chaplin@amd.com>
14 const: amd,axi-1wire-host
26 - compatible
27 - reg
28 - clocks
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| D | maxim,ds2482.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim One wire bus master controller
10 - Stefan Wahren <stefan.wahren@chargebyte.com>
13 I2C to 1-wire bridges
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ds2482-100.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/DS2482-800.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/DS2484.pdf
22 - maxim,ds2482
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| D | fsl-imx-owire.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/w1/fsl-imx-owire.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX One wire bus master controller
10 - Martin Fuzzey <mfuzzey@parkeon.com>
15 - const: fsl,imx21-owire
16 - items:
17 - enum:
18 - fsl,imx27-owire
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| /Documentation/devicetree/bindings/iio/temperature/ |
| D | maxim,max31865.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Navin Sankar Velliangiri <navin@linumiz.com>
22 maxim,3-wire:
25 enables 3-wire RTD connection. Else 2-wire or 4-wire RTD connection.
28 spi-cpha: true
31 - compatible
32 - reg
33 - spi-cpha
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | intel,ce4100-lapic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
28 [1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf
32 const: intel,ce4100-lapic
37 interrupt-controller: true
39 '#interrupt-cells':
40 const: 2
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | ti,am3359-tsc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/touchscreen/ti,am3359-tsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
14 const: ti,am3359-tsc
17 description: Wires refer to application modes i.e. 4/5/8 wire touchscreen
22 ti,x-plate-resistance:
26 ti,coordinate-readouts:
30 X, 5 for Y and 2 for Z (always). This utilises 12 of the 16 software steps
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| /Documentation/devicetree/bindings/sound/ |
| D | awinic,aw8738.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephan Gerhold <stephan@gerhold.net>
14 (set using one-wire pulse control). The mode configures the speaker-guard
18 - $ref: dai-common.yaml#
24 mode-gpios:
26 GPIO used for one-wire pulse control. The pin is typically called SHDN
27 (active-low), but this is misleading since it is actually more than
32 description: Operation mode (number of pulses for one-wire pulse control)
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| D | mt6359.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eason Yen <eason.yen@mediatek.com>
11 - Jiaxin Yu <jiaxin.yu@mediatek.com>
12 - Shane Chien <shane.chien@mediatek.com>
20 mediatek,dmic-mode:
24 signal. 0 means two wires, 1 means one wire. Default value is 0.
26 - 0 # two wires
27 - 1 # one wire
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| D | mediatek,mt8365-afe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mediatek,mt8365-afe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Mergnat <amergnat@baylibre.com>
14 const: mediatek,mt8365-afe-pcm
19 "#sound-dai-cells":
24 - description: 26M clock
25 - description: mux for audio clock
26 - description: audio i2s0 mck
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| /Documentation/devicetree/bindings/display/panel/ |
| D | leadtek,ltk035c5444t.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Leadtek ltk035c5444t 3.5" (640x480 pixels) 24-bit IPS LCD panel
10 - Paul Cercueil <paul@crapouillou.net>
11 - Christophe Branchereau <cbranchereau@gmail.com>
14 - $ref: panel-common.yaml#
15 - $ref: /schemas/spi/spi-peripheral-props.yaml#
24 spi-3wire: true
27 - compatible
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| D | fascontek,fs035vg158.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Fascontek FS035VG158 3.5" (640x480 pixels) 24-bit IPS LCD panel
10 - John Watts <contact@jookia.org>
13 - $ref: panel-common.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
23 spi-3wire: true
26 - compatible
27 - reg
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| D | kingdisplay,kd035g6-54nt.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/kingdisplay,kd035g6-54nt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: panel-common.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
18 const: kingdisplay,kd035g6-54nt
25 power-supply: true
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| D | anbernic,rg35xx-plus-panel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/anbernic,rg35xx-plus-panel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Anbernic RG35XX series (WL-355608-A8) 3.5" 640x480 24-bit IPS LCD panel
10 - Ryan Walklin <ryan@testtoast.com>
13 - $ref: panel-common.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
19 - const: anbernic,rg35xx-plus-panel
20 - items:
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| D | ilitek,ili9341.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ilitek-9341 Display Panel
10 - Dillon Min <dillon.minfei@gmail.com>
18 - $ref: panel-common.yaml#
19 - $ref: /schemas/spi/spi-peripheral-props.yaml#
24 - enum:
25 - adafruit,yx240qv29
26 # ili9341 240*320 Color on stm32f429-disco board
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| /Documentation/devicetree/bindings/leds/backlight/ |
| D | kinetic,ktd253.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Kinetic Technologies KTD253 and KTD259 one-wire backlight
10 - Linus Walleij <linus.walleij@linaro.org>
16 using pulses on the enable wire. This is sometimes referred to as
20 - $ref: common.yaml#
25 - enum:
26 - kinetic,ktd253
27 - kinetic,ktd259
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| /Documentation/devicetree/bindings/rtc/ |
| D | maxim-ds1302.txt | 1 * Maxim/Dallas Semiconductor DS-1302 RTC
5 The device uses the standard MicroWire half-duplex transfer timing.
12 - compatible : Should be "maxim,ds1302"
16 - reg : Should be address of the device chip select within
19 - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V,
20 and 2MHz if powered at 5V.
22 - spi-3wire : The device has a shared signal IN/OUT line.
24 - spi-lsb-first : DS-1302 requires least significant bit first
27 - spi-cs-high: DS-1302 has active high chip select line. This is
33 #address-cells = <1>;
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| /Documentation/w1/ |
| D | w1-generic.rst | 2 Introduction to the 1-wire (w1) subsystem
5 The 1-wire bus is a simple master-slave bus that communicates via a single
6 signal wire (plus ground, so two wires).
18 - DS9490 usb device
19 - W1-over-GPIO
20 - DS2482 (i2c to w1 bridge)
21 - Emulated devices, such as a RS232 converter, parallel port adapter, etc
25 ------------------------------
29 - sysfs entries for that w1 master are created
30 - the w1 bus is periodically searched for new slave devices
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad7944.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <Michael.Hennerich@analog.com>
11 - Nuno Sá <nuno.sa@analog.com>
14 A family of pin-compatible single channel differential analog to digital
21 $ref: /schemas/spi/spi-peripheral-props.yaml#
26 - adi,ad7944
27 - adi,ad7985
28 - adi,ad7986
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| /Documentation/hwmon/ |
| D | adt7411.rst | 17 -----------
22 The ADT7411 can use an I2C/SMBus compatible 2-wire interface or an
23 SPI-compatible 4-wire interface. It provides a 10-bit analog to digital
26 loses 2 inputs then). There are high- and low-limit registers for all inputs.
30 sysfs-Interface
31 ---------------
35 in[1-8]_input analog 1-8 input
48 -----
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| D | lm85.rst | 79 - Philip Pokorny <ppokorny@penguincomputing.com>,
80 - Frodo Looijaard <frodol@dds.nl>,
81 - Richard Barrington <rich_b_nz@clear.net.nz>,
82 - Margit Schubert-While <margitsw@t-online.de>,
83 - Justin Thiessen <jthiessen@penguincomputing.com>
86 -----------
92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
94 temperatures and five (5) voltages. It has four (4) 16-bit counters for
108 transistor like the 2N3904.
127 ----------------
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| /Documentation/devicetree/bindings/clock/ |
| D | ti,lmk04832.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Beguin <liambeguin@gmail.com>
21 - ti,lmk04832
26 '#address-cells':
29 '#size-cells':
32 '#clock-cells':
35 spi-max-frequency:
40 - description: PLL2 reference clock.
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| /Documentation/devicetree/bindings/iio/addac/ |
| D | adi,ad74115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The AD74115H is a single-channel software configurable input/output
17 chip solution with an SPI interface. The device features a 16-bit ADC and a
18 14-bit DAC.
25 - adi,ad74115h
30 spi-max-frequency:
33 spi-cpol: true
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| /Documentation/devicetree/bindings/watchdog/ |
| D | zii,rave-sp-wdt.txt | 7 Documentation/devicetree/bindings/mfd/zii,rave-sp.txt)
11 - compatible: Depending on wire protocol implemented by RAVE SP
13 - "zii,rave-sp-watchdog"
14 - "zii,rave-sp-watchdog-legacy"
18 - wdt-timeout: Two byte nvmem cell specified as per
23 rave-sp {
24 compatible = "zii,rave-sp-rdu1";
25 current-speed = <38400>;
28 wdt_timeout: wdt-timeout@8E {
29 reg = <0x8E 2>;
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