Home
last modified time | relevance | path

Searched +full:24 +full:- +full:bit (Results 1 – 25 of 276) sorted by relevance

12345678910>>...12

/Documentation/core-api/
Dpacking.rst6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
15 definitions from the hardware documentation into bit field indices for the
18 (sometimes even 64 bit ones). This creates the inconvenience of having to
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
[all …]
/Documentation/devicetree/bindings/display/
Dlvds-data-mapping.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/lvds-data-mapping.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
19 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
27 FPD-Link and FlatLink brands.
30 data-mapping:
[all …]
Dsimple-framebuffer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/simple-framebuffer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hans de Goede <hdegoede@redhat.com>
13 A simple frame-buffer describes a frame-buffer setup by firmware or
19 sub-nodes of the chosen node (*). Simplefb nodes must be named
41 interaction, then the chosen node stdout-path property should point
46 It is advised that devicetree files contain pre-filled, disabled
52 If pre-filled framebuffer nodes are used, the firmware may need
[all …]
/Documentation/input/devices/
Dwalkera0701.rst2 Walkera WK-0701 transmitter
5 Walkera WK-0701 transmitter is supplied with a ready to fly Walkera
10 http://zub.fei.tuke.sk/walkera-wk0701/
13 cg-clone http://zub.fei.tuke.sk/GIT/walkera0701-joystick
19 At back side of transmitter S-video connector can be found. Modulation
26 Walkera WK-0701 TX S-VIDEO connector::
29 __ __ S-video: canon25
35 ------- 3 __________________________________|________________ 25 GND
55 Driver use interrupt from parport ACK input bit to measure pulse length
59 Based on walkera WK-0701 PCM Format description by Shaul Eizikovich.
[all …]
/Documentation/devicetree/bindings/dma/
Datmel-xdma.txt5 - compatible: Should be "atmel,sama5d4-dma", "microchip,sam9x60-dma" or
6 "microchip,sama7g5-dma" or
7 "microchip,sam9x7-dma", "atmel,sama5d4-dma".
8 - reg: Should contain DMA registers location and length.
9 - interrupts: Should contain DMA interrupt.
10 - #dma-cells: Must be <1>, used to represent the number of integer cells in
12 - The 1st cell specifies the channel configuration register:
13 - bit 13: SIF, source interface identifier, used to get the memory
15 - bit 14: DIF, destination interface identifier, used to get the peripheral
17 - bit 30-24: PERID, peripheral identifier.
[all …]
/Documentation/sound/cards/
Daudiophile-usb.rst2 Guide to using M-Audio Audiophile USB with ALSA and Jack
9 This document is a guide to using the M-Audio Audiophile USB (tm) device with
15 * v1.4 - Thibault Le Meur (2007-07-11)
17 - Added Low Endianness nature of 16bits-modes
19 - Modifying document structure
21 * v1.5 - Thibault Le Meur (2007-07-12)
22 - Added AC3/DTS passthru info
35 - This port supports 2 pairs of line-level audio inputs (1/4" TS and RCA)
36 - When the 1/4" TS (jack) connectors are connected, the RCA connectors
47 * sample depth of 16 or 24 bits
[all …]
/Documentation/devicetree/bindings/sound/
Dsamsung-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - $ref: dai-common.yaml#
19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
25 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
[all …]
Dti,tas2781.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 - 2023 Texas Instruments Incorporated
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Shenghao Ding <shenghao-ding@ti.com>
14 The TAS2563/TAS2781 is a mono, digital input Class-D audio
16 small loudspeakers. An integrated on-chip DSP supports Texas
28 ti,tas2563: 6.1-W Boosted Class-D Audio Amplifier With Integrated
29 DSP and IV Sense, 16/20/24/32bit stereo I2S or multichannel TDM.
31 ti,tas2781: 24-V Class-D Amplifier with Real Time Integrated Speaker
[all …]
Dfsl,micfil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 The MICFIL digital interface provides a 16-bit or 24-bit audio signal
19 - items:
20 - enum:
21 - fsl,imx95-micfil
22 - const: fsl,imx93-micfil
24 - enum:
[all …]
Dqcom,q6dsp-lpass-ports.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
18 - qcom,q6afe-dais
20 '#sound-dai-cells':
23 '#address-cells':
26 '#size-cells':
31 '^dai@[0-9]+$':
[all …]
Drockchip,rk3308-codec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,rk3308-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 SoC. It has 8 24-bit ADCs and 2 24-bit DACs. The maximum supported
19 * grp 0 -- MIC1 / MIC2
20 * grp 1 -- MIC3 / MIC4
21 * grp 2 -- MIC5 / MIC6
22 * grp 3 -- MIC7 / MIC8
25 - Luca Ceresoli <luca.ceresoli@bootlin.com>
[all …]
/Documentation/devicetree/bindings/mfd/
Dmc13xxx.txt4 - compatible : Should be "fsl,mc13783" or "fsl,mc13892"
7 - fsl,mc13xxx-uses-adc : Indicate the ADC is being used
8 - fsl,mc13xxx-uses-codec : Indicate the Audio Codec is being used
9 - fsl,mc13xxx-uses-rtc : Indicate the RTC is being used
10 - fsl,mc13xxx-uses-touch : Indicate the touchscreen controller is being used
12 Sub-nodes:
13 - codec: Contain the Audio Codec node.
14 - adc-port: Contain PMIC SSI port number used for ADC.
15 - dac-port: Contain PMIC SSI port number used for DAC.
16 - leds : Contain the led nodes and initial register values in property
[all …]
/Documentation/userspace-api/media/rc/
Drc-protos.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
17 Other things can be encoded too. Some IR protocols encode a toggle bit; this
20 toggle bit will invert from one IR message to the next.
22 Some remotes have a pointer-type device which can used to control the
29 rc-5 (RC_PROTO_RC5)
30 -------------------
38 .. flat-table:: rc5 bits scancode mapping
41 * - rc-5 bit
43 - scancode bit
45 - description
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dtda1997x.txt1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
[all …]
/Documentation/ABI/testing/
Dsysfs-class-net-peak_usb5 Contact: Stephane Grosjean <s.grosjean@peak-system.com>
7 PEAK PCAN-USB devices support user-configurable CAN channel
12 This attribute provides read-only access to the currently
14 device type, the identifier has a length of 8 or 32 bit. The
15 value read from this attribute is always an 8 digit 32 bit
17 supports an 8 bit identifier, the upper 24 bit of the value are
Drtc-cdev4 Contact: linux-rtc@vger.kernel.org
6 The ioctl interface to drivers for real-time clocks (RTCs).
10 format is a Gregorian calendar date and 24 hour wall clock
17 RTCs that support alarms. Can be set upto 24 hours in the
22 powerful interface, which can issue alarms beyond 24 hours and
37 supported. The value is a bit field of RTC_VL_*, giving the
48 newer features -- including those enabled by ACPI -- are exposed
/Documentation/fb/
Ds3fb.rst2 s3fb - fbdev driver for S3 Trio/Virge chips
15 - only PCI bus supported
16 - only BIOS initialized VGA devices supported
17 - probably not working on big endian
26 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
27 * 8 bpp pseudocolor mode (with 18bit palette)
29 * 24 bpp truecolor mode (RGB 888) on (only on Virge VX)
39 lower pixclocks (maximum usually between 50-60 MHz, depending on specific
40 hardware, i get best results from plain S3 Trio32 card - about 75 MHz). This
41 limitation is not enforced by driver. Text mode supports 8bit wide fonts only
[all …]
/Documentation/devicetree/bindings/clock/
Dstarfive,jh7110-syscrg.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Emil Renner Berthing <kernel@esmil.dk>
14 const: starfive,jh7110-syscrg
21 - items:
22 - description: Main Oscillator (24 MHz)
23 - description: GMAC1 RMII reference or GMAC1 RGMII RX
24 - description: External I2S TX bit clock
[all …]
/Documentation/devicetree/bindings/iio/cdc/
Dadi,ad7746.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AD7746 24-Bit Capacitance-to-Digital Converter with Temperature Sensor
10 - Michael Hennerich <michael.hennerich@analog.com>
13 AD7746 24-Bit Capacitance-to-Digital Converter with Temperature Sensor
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7291.pdf
21 - adi,ad7745
22 - adi,ad7746
23 - adi,ad7747
[all …]
/Documentation/devicetree/bindings/iommu/
Dapple,sart.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sven Peter <sven@svenpeter.dev>
20 and allows 36 bit of physical address space and filter entries with sizes
21 up to 24 bit.
23 SART2, first seen in A14 and M1, allows 36 bit of physical address space
24 and filter entry size up to 36 bit.
27 entry size to 42 bit.
32 - items:
[all …]
/Documentation/devicetree/bindings/display/tilcdc/
Dtilcdc.txt1 Device-Tree bindings for tilcdc DRM driver
4 - compatible: value should be one of the following:
5 - "ti,am33xx-tilcdc" for AM335x based boards
6 - "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards
7 - interrupts: the interrupt number
8 - reg: base address and size of the LCDC device
11 - ti,hwmods: Name of the hwmod associated to the LCDC
14 - max-bandwidth: The maximum pixels per second that the memory
16 - max-width: The maximum horizontal pixel width supported by
18 - max-pixelclock: The maximum pixel clock that can be supported
[all …]
/Documentation/devicetree/bindings/ufs/
Dsnps,tc-dwc-g210.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/snps,tc-dwc-g210.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Wei <liwei213@huawei.com>
18 - snps,dwc-ufshcd-1.40a
20 - compatible
23 - $ref: ufs-common.yaml
28 - enum:
29 - snps,g210-tc-6.00-20bit
[all …]
/Documentation/devicetree/bindings/mips/cavium/
Dcib.txt4 - compatible: "cavium,octeon-7130-cib"
8 - interrupt-controller: This is an interrupt controller.
10 - reg: Two elements consisting of the addresses of the RAW and EN
13 - cavium,max-bits: The index (zero based) of the highest numbered bit
16 - interrupts: The CIU line to which the CIB block is connected.
18 - #interrupt-cells: Must be <2>. The first cell is the bit within the
24 interrupt-controller@107000000e000 {
25 compatible = "cavium,octeon-7130-cib";
28 cavium,max-bits = <23>;
30 interrupt-controller;
[all …]
/Documentation/userspace-api/media/v4l/
Dpixfmt-y12i.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-Y12I:
9 Interleaved grey-scale image, e.g. from a stereo-pair
15 This is a grey-scale image with a depth of 12 bits per pixel, but with
16 pixels from 2 sources interleaved and bit-packed. Each pixel is stored
17 in a 24-bit word in the little-endian order. On a little-endian machine
20 .. code-block:: c
26 **Bit-packed representation.**
30 .. flat-table::
31 :header-rows: 0
[all …]
/Documentation/filesystems/ext4/
Dinodes.rst1 .. SPDX-License-Identifier: GPL-2.0
4 -----------
11 that file. ext4 appears to cheat (for performance reasons) a little bit
15 links and is in general more seek-happy than ext4 due to its simpler
22 ``(inode_number - 1) / sb.s_inodes_per_group``, and the offset into the
23 group's table is ``(inode_number - 1) % sb.s_inodes_per_group``. There
31 .. list-table::
32 :widths: 8 8 24 40
33 :header-rows: 1
36 * - Offset
[all …]

12345678910>>...12