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/Documentation/i2c/
Dslave-eeprom-backend.rst12 The following types are available: 24c02, 24c32, 24c64, and 24c512. Read-only
16 24c02, read/write, address 0x64:
17 # echo slave-24c02 0x1064 > /sys/bus/i2c/devices/i2c-1/new_device
19 24c512, read-only, address 0x42:
20 # echo slave-24c512ro 0x1042 > /sys/bus/i2c/devices/i2c-1/new_device
/Documentation/devicetree/bindings/eeprom/
Dat24.yaml22 - pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
23 - enum: ["microchip,24aa025e48", "microchip,24aa025e64"]
42 … - pattern: "^(atmel|catalyst|microchip|nxp|ramtron|renesas|rohm|st),(24(c|cs|lc|mac)[0-9]+|spd)$"
43 - pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$"
111 - const: atmel,24c01
116 - const: atmel,24c02
123 - const: atmel,24c04
128 - const: atmel,24c16
131 - const: atmel,24c32
134 - const: atmel,24c64
[all …]
/Documentation/devicetree/bindings/misc/
Didt,89hpesx.yaml23 - pattern: '^idt,89hpes(8nt2|12nt3|12n3a?|24n3a?|(12|24)t3g2|4t4g2|10t4g2|[56]t5|8t5a?)$'
24 - pattern: '^idt,89hpes(6t6g2|16t7|(24t6|32t8|48t12|16t4a?)(g2)?)$'
25 - pattern: '^idt,89hpes(24nt6a|32nt8[ab]|12nt12|16nt16|24nt24|32nt24[ab])g2$'
45 pattern: ',24c(32|64|128|256|512)$'
66 compatible = "atmel,24c64";
/Documentation/translations/zh_CN/core-api/
Dpacking.rst63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
77 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
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102 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
110 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
122 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
132 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
143 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
/Documentation/devicetree/bindings/clock/
Dtesla,fsd-clock.yaml16 The root clock comes from external OSC clock (24 MHz).
56 - description: External reference clock (24 MHz)
70 - description: External reference clock (24 MHz)
90 - description: External reference clock (24 MHz)
114 - description: External reference clock (24 MHz)
134 - description: External reference clock (24 MHz)
152 - description: External reference clock (24 MHz)
166 - description: External reference clock (24 MHz)
Dstarfive,jh7110-aoncrg.yaml22 - description: Main Oscillator (24 MHz)
29 - description: Main Oscillator (24 MHz)
37 - description: Main Oscillator (24 MHz)
/Documentation/devicetree/bindings/display/
Dlvds-data-mapping.yaml33 - jeida-24
34 - vesa-24
51 - "jeida-24" - 24-bit data mapping compatible with the [DSIM] and [LDI]
63 - "vesa-24" - 24-bit data mapping compatible with the [VESA] specification.
/Documentation/iio/
Dadxl380.rst211 002bc300 f7 e7 00 a8 fb c5 24 80 f7 e7 01 04 fb d6 24 80 |......$.......$.|
212 002bc310 f7 f9 00 ab fb dc 24 80 f7 c3 00 b8 fb e2 24 80 |......$.......$.|
213 002bc320 f7 fb 00 bb fb d1 24 80 f7 b1 00 5f fb d1 24 80 |......$...._..$.|
214 002bc330 f7 c4 00 c6 fb a6 24 80 f7 a6 00 68 fb f1 24 80 |......$....h..$.|
215 002bc340 f7 b8 00 a3 fb e7 24 80 f7 9a 00 b1 fb af 24 80 |......$.......$.|
216 002bc350 f7 b1 00 67 fb ee 24 80 f7 96 00 be fb 92 24 80 |...g..$.......$.|
217 002bc360 f7 ab 00 7a fc 1b 24 80 f7 b6 00 ae fb 76 24 80 |...z..$......v$.|
218 002bc370 f7 ce 00 a3 fc 02 24 80 f7 c0 00 be fb 8b 24 80 |......$.......$.|
219 002bc380 f7 c3 00 93 fb d0 24 80 f7 ce 00 d8 fb c8 24 80 |......$.......$.|
220 002bc390 f7 bd 00 c0 fb 82 24 80 f8 00 00 e8 fb db 24 80 |......$.......$.|
[all …]
/Documentation/arch/arm/sunxi/
Dclocks.rst8 Q: Why is the main 24MHz oscillator gateable? Wouldn't that break the
11 A: The 24MHz oscillator allows gating to save power. Indeed, if gated
18 24MHz 32kHz
29 24Mhz 32kHz
/Documentation/devicetree/bindings/mtd/
Drockchip,nand-controller.yaml73 enum: [16, 24, 40, 60, 70]
76 NFC v600 ECC 16, 24, 40, 60
79 NFC v622 ECC 16, 24, 40, 60
101 enum: [16, 24, 40, 60, 70]
106 NFC v600 ECC 16, 24
109 NFC v622 ECC 16, 24, 40, 60
/Documentation/devicetree/bindings/display/bridge/
Dti,tfp410.yaml61 - 24 # 24 data lines connected and single-edge mode
62 default: 24
105 bus-width = <24>;
Dite,it66121.yaml66 - 24 # 24 data lines connected and single-edge mode
67 default: 24
/Documentation/ABI/testing/
Dsysfs-bus-event_source-devices-hv_24x730 Provides access to the binary "24x7 catalog" provided by the
34 https://raw.githubusercontent.com/jmesmon/catalog-24x7/master/hv-24x7-catalog.h
47 Exposes the "version" field of the 24x7 catalog. This is also
76 HCALLs to retrieve hv-24x7 pmu event counter data.
Drtc-cdev10 format is a Gregorian calendar date and 24 hour wall clock
17 RTCs that support alarms. Can be set upto 24 hours in the
22 powerful interface, which can issue alarms beyond 24 hours and
/Documentation/core-api/
Dpacking.rst57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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100 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
108 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
123 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
134 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
145 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
/Documentation/input/devices/
Dwalkera0701.rst96 24 bin+oct values + 1 bin value = 24*4+1 bits = 97 bits
104 One binary and octal value can be grouped to nibble. 24 nibbles + one binary
114 four channels. In nibbles 22 and 23 is a special magic number. Nibble 24 is
117 After last octal value for nibble 24 and next sync pulse one additional
/Documentation/devicetree/bindings/dma/
Dapple,admac.yaml13 The controller has been seen with up to 24 channels. Even-numbered channels
41 maximum: 24
85 dma-channels = <24>;
/Documentation/devicetree/bindings/phy/
Drockchip,rk3288-dp-phy.yaml20 const: 24m
39 clock-names = "24m";
/Documentation/sound/cards/
Daudiophile-usb.rst47 * sample depth of 16 or 24 bits
61 * 24-bit/48kHz ==> 4 channels in + 2 channels out,
66 * 24-bit/96kHz ==> 2 channels in _or_ 2 channels out (half duplex only)
113 24bit-depth-mode and immediately after wants to switch to a 16bit-depth mode,
133 24-bits depth mode.
227 24-bit modes
234 - 24bits 48kHz mode with Di disabled
241 - 24bits 48kHz mode with Di enabled
249 - 24bits 96kHz mode
334 | 0 | 0 | 0 | Di|24B|96K|DTS|SET|
[all …]
/Documentation/devicetree/bindings/sound/
Dnvidia,tegra186-asrc.yaml12 wide range of sample rate ratios (freq_in/freq_out) from 1:24 to 24:1.
18 16, 24 and 32 bits.
Dsamsung-i2s.yaml19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
25 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
41 tesla,fsd-i2s: for 8/16/24bit stereo channel I2S for playback and
Dti,tas2781.yaml29 DSP and IV Sense, 16/20/24/32bit stereo I2S or multichannel TDM.
31 ti,tas2781: 24-V Class-D Amplifier with Real Time Integrated Speaker
32 Protection and Audio Processing, 16/20/24/32bit stereo I2S or
/Documentation/userspace-api/media/v4l/
Dmetafmt-vsp1-hgo.rst51 - [31:24]
76 * - 24
102 - [31:24]
127 - [31:24]
152 - [31:24]
/Documentation/devicetree/bindings/hwmon/pmbus/
Dti,ucd90320.yaml15 monitor. The 24 integrated ADC channels (AMONx) monitor the power supply
17 digital monitors (DMONx), 32 to enable the power supply (ENx), 24 for
/Documentation/scsi/
Dtcm_qla2xxx.rst32 echo 1 > /sys/kernel/config/target/qla2xxx/21:00:00:24:ff:27:8f:ae/tpgt_1/attrib/jam_host
36 echo 0 > /sys/kernel/config/target/qla2xxx/21:00:00:24:ff:27:8f:ae/tpgt_1/attrib/jam_host

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