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| /Documentation/input/devices/ |
| D | alps.rst | 1 ----------------------
3 ----------------------
6 ------------
8 ALPS touchpads, called versions 1, 2, 3, 4, 5, 6, 7 and 8.
10 Since roughly mid-2010 several new ALPS touchpads have been released and
14 adequate. The design choices were to re-define the alps_model_data
29 ---------
32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
37 report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
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| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
17 3. Differentiating hardware versions
20 4.2 Native relative mode 4 byte packet format
21 4.3 Native absolute mode 4 byte packet format
24 5.2 Native absolute mode 6 byte packet format
25 5.2.1 Parity checking and packet re-synchronization
27 5.2.3 Two finger touch
28 6. Hardware version 3
30 6.2 Native absolute mode 6 byte packet format
35 7.2 Native absolute mode 6 byte packet format
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| D | sentelic.rst | 8 :Copyright: |copy| 2002-2011 Sentelic Corporation.
10 :Last update: Dec-07-2011
20 3. Set sample rate to 80;
27 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
28 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
29 1 |Y|X|y|x|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 | | |B|F|W|W|W|W|
30 |---------------| |---------------| |---------------| |---------------|
32 Byte 1: Bit7 => Y overflow
40 Byte 2: X Movement(9-bit 2's complement integers)
41 Byte 3: Y Movement(9-bit 2's complement integers)
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| /Documentation/scsi/ |
| D | arcmsr_spec.rst | 11 ------------
13 - InitThread message and return code
15 2. Doorbell is used for RS-232 emulation
16 ----------------------------------------
34 3. Index Memory Usage
35 ---------------------
46 4. RS-232 emulation
47 -------------------
49 Currently 128 byte buffer is used:
52 1st uint32_t Data length (1--124)
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| /Documentation/userspace-api/media/v4l/ |
| D | pixfmt-packed-yuv.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _packed-yuv:
15 - In all the tables that follow, bit 7 is the most significant bit in a byte.
16 - 'Y', 'Cb' and 'Cr' denote bits of the luma, blue chroma (also known as
30 seen in a 16-bit word, which is then stored in memory in little endian byte
32 format stores a pixel in a 16-bit word [15:0] laid out at as [Y'\ :sub:`4-0`
33 Cb\ :sub:`5-0` Cr\ :sub:`4-0`], and stored in memory in two bytes,
34 [Cb\ :sub:`2-0` Cr\ :sub:`4-0`] followed by [Y'\ :sub:`4-0` Cb\ :sub:`5-3`].
44 .. flat-table:: Packed YUV 4:4:4 Image Formats (less than 8bpc)
45 :header-rows: 2
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| D | pixfmt-sdr-pcu20be.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-SDR-FMT-PCU20BE:
9 Planar complex unsigned 20-bit big endian IQ sample
15 number consist of two parts called In-phase and Quadrature (IQ). Both I
23 **Byte Order.**
24 Each cell is one byte.
26 .. flat-table::
27 :header-rows: 1
28 :stub-columns: 0
30 * - Offset:
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| D | pixfmt-yuv-luma.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _yuv-luma-only:
6 Luma-Only Formats
14 - In all the tables that follow, bit 7 is the most significant bit in a byte.
15 - Formats are described with the minimum number of pixels needed to create a
16 byte-aligned repeating pattern. `...` indicates repetition of the pattern.
17 - Y'\ :sub:`x`\ [9:2] denotes bits 9 to 2 of the Y' value for pixel at column
19 - `0` denotes padding bits set to 0.
28 .. flat-table:: Luma-Only Image Formats
29 :header-rows: 1
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| D | pixfmt-rgb.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
12 bits required to store a pixel is not aligned to a byte boundary, the data is
13 padded with additional bits to fill the remaining byte.
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
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| D | pixfmt-packed-hsv.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _packed-hsv:
13 depends on the hsv-encoding used, see :ref:`colorspaces`.
29 .. _packed-hsv-formats:
31 .. flat-table:: Packed HSV Image Formats
32 :header-rows: 2
33 :stub-columns: 0
35 * - Identifier
36 - Code
37 -
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| D | pixfmt-cnf4.rst | 1 .. -*- coding: utf-8; mode: rst -*-
3 .. _V4L2-PIX-FMT-CNF4:
15 confidence information in range 0-15 with 0 indicating that the sensor was
19 Every two consecutive pixels are packed into a single byte.
20 Bits 0-3 of byte n refer to confidence value of depth pixel 2*n,
21 bits 4-7 to confidence value of depth pixel 2*n+1.
23 **Bit-packed representation.**
25 .. flat-table::
26 :header-rows: 0
27 :stub-columns: 0
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| /Documentation/staging/ |
| D | lzo.rst | 26 - a distance when copying data from the dictionary (past output buffer)
27 - a length (number of bytes to copy from dictionary)
28 - the number of literals to copy, which is retained in variable "state"
35 The first byte of the block follows a different encoding from other bytes, it
37 prior to that byte.
42 rate of at most 255 per extra byte (thus the compression ratio cannot exceed
45 length = byte & ((1 << #bits) - 1)
47 length = ((1 << #bits) - 1)
49 length += first-non-zero-byte
51 length += constant (generally 2 or 3)
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| /Documentation/core-api/ |
| D | packing.rst | 6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
44 perspective, bit 63 always means bit offset 7 of byte 7, albeit only
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| /Documentation/devicetree/bindings/mtd/ |
| D | fsmc-nand.txt | 5 - compatible : "st,spear600-fsmc-nand", "stericsson,fsmc-nand"
6 - reg : Address range of the mtd chip
7 - reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"
10 - bank-width : Width (in bytes) of the device. If not present, the width
11 defaults to 1 byte
12 - nand-skip-bbtscan: Indicates the BBT scanning should be skipped
13 - timings: array of 6 bytes for NAND timings. The meanings of these bytes
15 byte 0 TCLR : CLE to RE delay in number of AHB clock cycles, only 4 bits
18 byte 1 TAR : ALE to RE delay, 4 bits are valid. Same format as TCLR.
19 byte 2 THIZ : number of HCLK clock cycles during which the data bus is
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| /Documentation/hwmon/ |
| D | abituguru-datasheet.rst | 14 Olle Sandberg <ollebull@gmail.com>, 2005-05-25
27 Hans de Goede <j.w.r.degoede@hhs.nl>, 28-01-2006
33 As far as known the uGuru is always placed at and using the (ISA) I/O-ports
34 0xE0 and 0xE4, so we don't have to scan any port-range, just check what the two
35 ports are holding for detection. We will refer to 0xE0 as CMD (command-port)
39 present. We have to check for two different values at data-port, because
41 later on attached again data-port will hold 0x08, more about this later.
57 ----------
82 -----------
101 ----------------------------------------------
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| /Documentation/driver-api/ |
| D | mtdnand.rst | 10 The generic NAND driver supports almost all NAND and AG-AND based chips
31 --------------------------
37 - [MTD Interface]
43 - [NAND Interface]
48 - [GENERIC]
53 - [DEFAULT]
65 -------------------------------
71 - [INTERN]
77 - [REPLACEABLE]
86 - [BOARDSPECIFIC]
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| /Documentation/hid/ |
| D | hid-alps.rst | 6 ------------
19 --------------
22 Byte Field Value Notes
42 ---------
45 ReportID-1 (Input Reports) (HIDUsage-Mouse) for TP&SP
46 ReportID-2 (Input Reports) (HIDUsage-keyboard) for TP
47 ReportID-3 (Input Reports) (Vendor Usage: Max 10 finger data) for TP
48 ReportID-4 (Input Reports) (Vendor Usage: ON bit data) for GP
49 ReportID-5 (Feature Reports) Feature Reports
50 ReportID-6 (Input Reports) (Vendor Usage: StickPointer data) for SP
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| D | hidreport-parsing.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 $ hexdump -C /sys/bus/hid/devices/0003\:093A\:2510.0002/report_descriptor
23 +----------+
25 +----------+
27 ---- Length of data (see HID spec 6.2.2.2)
29 ------ Type of the item (see HID spec 6.2.2.2, then jump to 6.2.2.7)
31 --------- Function of the item (see HID spec 6.2.2.7, then HUT Sec 3)
33 In our case, the length is 1 byte, the type is ``Global`` and the
34 function is ``Usage Page``, thus for parsing the value 0x01 in the second byte
35 we need to refer to HUT Sec 3.
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| /Documentation/devicetree/bindings/dma/ |
| D | intel,ldma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - chuanhua.lei@intel.com
11 - mallikarjunax.reddy@intel.com
14 - $ref: dma-controller.yaml#
19 - intel,lgm-cdma
20 - intel,lgm-dma2tx
21 - intel,lgm-dma1rx
22 - intel,lgm-dma1tx
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| /Documentation/devicetree/bindings/display/msm/ |
| D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
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| /Documentation/netlink/specs/ |
| D | tcp_metrics.yaml | 1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
5 protocol: genetlink-legacy
10 c-family-name: tcp-metrics-genl-name
11 c-version-name: tcp-metrics-genl-version
12 max-by-define: true
13 kernel-policy: global
16 -
17 name: tcp-fastopen-cookie-max
21 attribute-sets:
22 -
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| /Documentation/i2c/ |
| D | i2c-stub.rst | 2 i2c-stub
9 types of SMBus commands: write quick, (r/w) byte, (r/w) byte data, (r/w)
21 A pointer register with auto-increment is implemented for all byte
22 operations. This allows for continuous byte reads like those supported by
33 The typical use-case is like this:
36 2. use i2cset (from the i2c-tools project) to pre-load some data
37 3. load the target chip driver module
40 There's a script named i2c-stub-from-dump in the i2c-tools package which
52 value 0x1f0000 would only enable the quick, byte and byte data
62 If your target driver polls some byte or word waiting for it to change, the
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| /Documentation/devicetree/bindings/clock/ |
| D | qcom,mmcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeffrey Hugo <quic_jhugo@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8226
23 - qcom,mmcc-msm8660
24 - qcom,mmcc-msm8960
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| /Documentation/arch/sparc/oradax/ |
| D | dax-hv-api.txt | 3 Publication date 2017-09-25 08:21
5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf"
16 live-migration and other system management activities.
20 …high speed processoring of database-centric operations. The coprocessors may support one or more of
28 …e Completion Area and, unless execution order is specifically restricted through the use of serial-
45 …device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device
51 36.1.1.1. "ORCL,sun4v-dax" Device Compatibility
54 • No-op/Sync
81 36.1.1.2. "ORCL,sun4v-dax-fc" Device Compatibility
82 … "ORCL,sun4v-dax-fc" is compatible with the "ORCL,sun4v-dax" interface, and includes additional CCB
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| /Documentation/w1/slaves/ |
| D | w1_ds2413.rst | 7 * Maxim DS2413 1-Wire Dual Channel Addressable Switch
18 -----------
20 The DS2413 chip has two open-drain outputs (PIO A and PIO B).
24 -------------
25 The "state" file provides one-byte value which is in the same format as for
32 Bit 3: PIOB Output Latch State
33 Bit 4-7: Complement of Bit 3 to Bit 0 (verified by the kernel module)
39 --------------
41 It is writable, you can write one-byte value to this sysfs file.
42 Similarly the byte format is the same as for the PIO_ACCESS_WRITE command:
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| /Documentation/devicetree/bindings/misc/ |
| D | ifm-csi.txt | 4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
22 csi@3,0 {
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