Searched +full:3 +full:v3 (Results 1 – 25 of 100) sorted by relevance
1234
| /Documentation/devicetree/bindings/hwmon/ |
| D | ltc2990.txt | 15 2: V1-V2, V3, V4
16 3: TR1, V3, V4
17 4: TR1, V3-V4
19 6: V1-V2, V3-V4
20 7: V1, V2, V3, V4
22 The second integer defines the bits 4..3 in the control register. This
27 2: TR2, V3 or V3-V4 only per mode
28 3: All measurements per mode
35 lltc,meas-mode = <7 3>; /* V1, V2, V3, V4 */
|
| /Documentation/devicetree/bindings/mmc/ |
| D | nvidia,tegra20-sdhci.yaml | 122 nvidia,pad-autocal-pull-down-offset-3v3:
127 nvidia,pad-autocal-pull-down-offset-3v3-timeout:
150 nvidia,pad-autocal-pull-up-offset-3v3:
162 nvidia,pad-autocal-pull-up-offset-3v3-timeout:
228 - const: sdmmc-3v3
232 - const: sdmmc-3v3-drv
237 - const: sdmmc-3v3-drv
257 - const: sdmmc-3v3
296 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
297 "sdmmc-3v3-drv", "sdmmc-1v8-drv";
[all …]
|
| D | socionext,uniphier-sd.yaml | 17 - socionext,uniphier-sd-v3.1
18 - socionext,uniphier-sd-v3.1.1
56 maxItems: 3
109 resets = <&mio_rst 0>, <&mio_rst 3>;
|
| /Documentation/devicetree/bindings/pci/ |
| D | v3-v360epc-pci.txt | 1 V3 Semiconductor V360 EPC PCI bridge
7 "v3,v360epc-pci"
8 "arm,integrator-ap-pci", "v3,v360epc-pci"
10 first the base address of the V3 host bridge controller, 64KB
12 - interrupts: should contain a reference to the V3 error interrupt
29 operate the V3 host bridge.
34 compatible = "arm,integrator-ap-pci", "v3,v360epc-pci";
37 #address-cells = <3>;
58 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
63 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
[all …]
|
| D | pcie-al.txt | 14 - "amazon,al-alpine-v3-pcie" for alpine_v3
32 compatible = "amazon,al-alpine-v3-pcie";
39 #address-cells = <3>;
|
| D | qcom,pcie-common.yaml | 35 minItems: 3
39 minItems: 3
81 vddpe-3v3-supply:
|
| /Documentation/userspace-api/media/v4l/ |
| D | metafmt-d4xx.rst | 20 types are MetadataId_CaptureStats (ID 3), MetadataId_CameraExtrinsics (ID 4),
29 This document implements Intel Configuration version 3 [9_].
51 2 and 3. The version number will be incremented when new fields are
77 * - __u8 Emitter mode (v3 only) (__u32 Laser mode for v1) [8_]
79 * - __u8 RFU byte (v3 only)
81 * - __u16 LED Power (v3 only)
93 - A bitmask of flags: see [3_] below
110 - Size in bytes, include ID (v1:36, v3:40)
133 * - __u16 Calibration count (v3 only)
135 * - __u8 GPIO input data (v3 only)
[all …]
|
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic-v3.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml#
7 title: ARM Generic Interrupt Controller, version 3
26 - qcom,msm8996-gic-v3
27 - const: arm,gic-v3
28 - const: arm,gic-v3
42 Must be a single cell with a value of at least 3.
47 interrupts, 2 for interrupts in the Extended SPI range, 3 for the
55 The 3rd cell is the flags, encoded as follows:
56 bits[3:0] trigger type and level flags.
69 enum: [ 3, 4 ]
[all …]
|
| /Documentation/bpf/ |
| D | clang-notes.rst | 13 Clang defined "CPU" versions, where a CPU version of 3 corresponds to the current eBPF ISA.
15 Clang can select the eBPF ISA version using ``-mcpu=v3`` for example to select version 3.
20 For CPU versions prior to 3, Clang v7.0 and later can enable ``BPF_ALU`` support with
21 ``-Xclang -target-feature -Xclang +alu32``. In CPU version 3, support is automatically included.
32 Clang can generate atomic instructions by default when ``-mcpu=v3`` is
|
| /Documentation/translations/zh_CN/arch/arm64/ |
| D | booting.txt | 49 3、解压内核映像
76 3、解压内核映像
107 - 自 v3.17 起，除非另有说明，所有域都是小端模式。
116 - v3.17 之前，未明确指定 text_offset 的字节序。此时，image_size 为零，
121 - flags 域 (v3.17 引入) 为 64 位小端模式，其编码如下：
127 3 - 64K
128 位 3: 内核物理位置
191 对于拥有 GICv3 中断控制器并以 v3 模式运行的系统：
193 ICC_SRE_EL3.Enable (位 3) 必须初始化为 0b1。
196 ICC_SRE_EL2.Enable (位 3) 必须初始化为 0b1。
|
| /Documentation/translations/zh_TW/arch/arm64/ |
| D | booting.txt | 53 3、解壓內核映像
80 3、解壓內核映像
111 - 自 v3.17 起，除非另有說明，所有域都是小端模式。
120 - v3.17 之前，未明確指定 text_offset 的字節序。此時，image_size 爲零，
125 - flags 域 (v3.17 引入) 爲 64 位小端模式，其編碼如下：
131 3 - 64K
132 位 3: 內核物理位置
195 對於擁有 GICv3 中斷控制器並以 v3 模式運行的系統：
197 ICC_SRE_EL3.Enable (位 3) 必須初始化爲 0b1。
200 ICC_SRE_EL2.Enable (位 3) 必須初始化爲 0b1。
|
| /Documentation/ABI/testing/ |
| D | sysfs-class-rapidio | 15 KernelVersion: v3.15
27 KernelVersion: v3.15
48 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
49 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
50 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0007
51 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0002
52 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0003
53 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0005
|
| D | sysfs-bus-rbd | 40 KernelVersion: v3.14
54 KernelVersion: v3.14
114 KernelVersion: v3.6
124 KernelVersion: v3.7
138 KernelVersion: v3.8
147 KernelVersion: v3.14
172 '[1:2:3:4:5:6:7:8]:1234/5678'.
|
| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,saw2.yaml | 35 - qcom,msm8909-saw2-v3.0-cpu
36 - qcom,msm8916-saw2-v3.0-cpu
37 - qcom,msm8939-saw2-v3.0-cpu
43 - qcom,msm8976-gold-saw2-v2.3-l2
44 - qcom,msm8976-silver-saw2-v2.3-l2
108 * Example 3: SAW2 with the bundled regulator definition.
|
| /Documentation/arch/powerpc/ |
| D | elf_hwcaps.rst | 52 instructions that can be used differ between the v3.0B and v3.1B ISA
55 3. Categories
58 The Power ISA before v3.0 uses the term "category" to describe certain
209 The processor supports the v3.0B / v3.0C userlevel architecture. Processors
228 The processor supports the v3.1 userlevel architecture. Processors
|
| /Documentation/devicetree/bindings/rtc/ |
| D | allwinner,sun6i-a31-rtc.yaml | 24 - allwinner,sun8i-v3-rtc
55 maxItems: 3
83 - allwinner,sun8i-v3-rtc
103 minItems: 3
138 minItems: 3
146 minItems: 3
|
| /Documentation/devicetree/bindings/phy/ |
| D | mediatek,tphy.yaml | 18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode:
37 Version 2/3:
63 and reserved on V3;
92 - const: mediatek,generic-tphy-v3
103 T-PHY V2/V3, such as mt2712.
176 Available only for U2 PHY or U3/PCIe PHY of version 2/3, these
231 maximum: 3
252 the field should always be 3 cells long.
261 enum: [0, 1, 2, 3]
|
| /Documentation/ABI/stable/ |
| D | sysfs-acpi-pmprofile | 3 KernelVersion: v3.2
21 3 Workstation
|
| D | sysfs-devices-system-cpu | 3 KernelVersion: v3.15.0
14 KernelVersion: v3.15.0
70 The format is like 0-3, 8-11, 14,17.
81 The format is like 0-3, 8-11, 14,17.
95 The format is like 0-3, 8-11, 14,17.
104 The format is like 0-3, 8-11, 14,17.
115 The format is like 0-3, 8-11, 14,17. it's only used on s390.
126 The format is like 0-3, 8-11, 14,17. it's only used on s390.
|
| /Documentation/devicetree/bindings/regulator/ |
| D | ti-abb-regulator.txt | 7 - "ti,abb-v3" for a generic definition where setup and control registers are
13 - "control-address" - contains control register address of ABB module (ti,abb-v3)
14 - "setup-address" - contains setup register address of ABB module (ti,abb-v3)
34 3-Reverse Body Bias(RBB)
83 1200000 3 0 0 0 0 /* RBB mandatory */
109 Example #3: Efuse bits contain ABB mode setting and LDO override capability
|
| /Documentation/devicetree/bindings/display/panel/ |
| D | feiyang,fy07024di26a30d.yaml | 27 description: 3v3 digital regulator
56 reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
|
| D | seiko,43wvf1g.yaml | 23 description: 3v3 digital regulator
|
| /Documentation/devicetree/bindings/iio/frequency/ |
| D | adi,admfm2000.yaml | 67 DSA-V4 DSA-V3 DSA-V2 DSA-V1 DSA-V0
80 - description: DSA-V3 GPIO
117 switch-gpios = <&gpio 3 GPIO_ACTIVE_LOW>,
|
| /Documentation/devicetree/bindings/gpio/ |
| D | fcs,fxl6408.yaml | 55 "PWR_EN_+V3.3_WiFi_N", "PCIe_REF_CLK_EN",
|
| /Documentation/devicetree/bindings/sound/ |
| D | xmos,xvf3500.yaml | 35 Regulator for the 3V3 supply.
|
1234